| PART |
Description |
Maker |
| CY7C142XAV18 CY7C130XBV25 CY7C132XBV25 |
(CY7C1xxxxVxx) RAM9 QDR-I/DDR-I/QDR-II/DDR- II Errata
|
Cypress Semiconductor
|
| LTC3718 |
Low Input Voltage, DC/DC Controller for DDR/QDR Memory Termination
|
Linear Technology
|
| LTC3717 |
Wide Operating Range / No RSENSE Step-Down Controller for DDR/QDR Memory Termination
|
Linear
|
| LTC3717-1 LTC3717EUH-1 |
Wide Operating Range, No RSENSE TM Step-Down Controller for DDR/QDR Memory Termination
|
Linear Technology
|
| LTC3717 LTC3717EGN |
Wide Operating Range, No RSENSE Step-Down Controller for DDR/QDR Memory Termination
|
Linear Technology
|
| CY7C1412BV18-167BZXI CY7C1414BV18-167BZXI |
36-Mbit QDR-IISRAM 2-Word Burst Architecture 1M X 36 QDR SRAM, 0.5 ns, PBGA165
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| CY7C1315CV18-200BZC CY7C1315CV18-250BZC |
18-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V 512K X 36 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1513JV18-250BZXC |
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CAT64LC10ZJ CAT64LC10ZP CAT64LC10J-TE7 CAT64LC10J- |
18-Mbit QDR™-II SRAM 4-Word Burst Architecture
18-Mbit DDR-II SRAM 2-Word Burst Architecture
36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
4-Mbit (256K x 18) Flow-Through Sync SRAM SPI串行EEPROM
SPI Serial EEPROM SPI串行EEPROM
|
Analog Devices, Inc.
|
| IDT72T40108L6-7BB IDT72T40118L6-7BB IDT72T40118L6- |
64K x 40 TeraSync DDR FIFO, 2.5V
128K x 40 TeraSync DDR FIFO, 2.5V
2.5 VOLT HIGH-SPEED TeraSync?? DDR/SDR FIFO 40-BIT CONFIGURATION
16K x 40 TeraSync DDR FIFO, 2.5V
32K x 40 TeraSync DDR FIFO, 2.5V
|
IDT
|
| CY7C1168V18-400BZXC CY7C1168V18-375BZXC CY7C1168V1 |
1M X 18 DDR SRAM, 0.45 ns, PBGA165 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 1M X 18 DDR SRAM, 0.45 ns, PBGA165
2M X 8 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
