| PART |
Description |
Maker |
| 74AUP2G32DC125 74AUP2G32GT 74AUP2G32GM 74AUP2G32GT |
Low-power dual 2-input OR gate; Package: SOT765-1 (VSSOP8); Container: Reel Pack, Reverse, Reverse AUP/ULP/V SERIES, DUAL 2-INPUT OR GATE, PDSO8
Low-power dual 2-input OR gate; Package: SOT833-1 (XSON8U); Container: Reel Pack, SMD, 7" AUP/ULP/V SERIES, DUAL 2-INPUT OR GATE, PDSO8
|
NXP Semiconductors N.V.
|
| NC7WV04P6X NC7WV04 NC7WV04L6X NC7WV04P6XNL |
TinyLogic ULP-A Dual Inverter AUP/ULP/V SERIES, DUAL 1-INPUT INVERT GATE, PDSO6
TinyLogic ULP-A Dual Inverter AUP/ULP/V SERIES, DUAL 1-INPUT INVERT GATE, DSO6
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| 74AUP1G885GN 74AUP1G885GS 74AUP1G885DC |
Low-power dual function gate AUP/ULP/V SERIES, DUAL 3-INPUT XOR GATE, PDSO8
Low-power dual function gate 低功耗双功能
|
NXP Semiconductors N.V.
|
| 74AUP1G885DC125 |
Low-power dual function gate; Package: SOT765-1 (VSSOP8); Container: Reel Pack, Reverse, Reverse AUP/ULP/V SERIES, DUAL 3-INPUT XOR GATE, PDSO8
|
NXP Semiconductors N.V.
|
| 74AUP2G80GN 74AUP2G80GD |
Low-power dual D-type flip-flop; positive-edge trigger AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO8
Low-power dual D-type flip-flop; positive-edge trigger 低功耗双D型触发器;上升沿触
|
NXP Semiconductors N.V.
|
| 74AUP1G09GF 74AUP1G09GM 74AUP1G09GS |
Low-power 2-input AND gate with open-drain AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO6
|
NXP Semiconductors N.V.
|
| NC7SV05P5X NC7SV05 NC7SV05L6X |
TinyLogic ULP-A Inverter (Open Drain Output)
TinyLogic ULP-A Inverter (Open Drain Output) AUP/ULP/V SERIES, 1-INPUT INVERT GATE, PDSO6
TinyLogic ULP-A Inverter (Open Drain Output) AUP/ULP/V SERIES, 1-INPUT INVERT GATE, PDSO5
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor, Corp.
|
| 74AUP1G157GM 74AUP1G157GN 74AUP1G157GS |
Low-power 2-input multiplexer AUP/ULP/V SERIES, 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO6
Low-power 2-input multiplexer 低功2输入复用
|
NXP Semiconductors N.V.
|
| 74AUP1G19GW125 |
Low-power 1-of-2 decoder/demultiplexer; Package: SOT363 (SC-88); Container: Tape reel smd, Reverse AUP/ULP/V SERIES, 1 LINE TO 2 LINE MULTIPLEXER AND DEMUX/DECODER, COMPLEMENTARY OUTPUT, PDSO6
|
NXP Semiconductors N.V.
|
| 74AUP1G02GN 74AUP1G02GF |
Low-power 2-input NOR-gate AUP/ULP/V SERIES, 2-INPUT NOR GATE, PDSO6
Low-power 2-input NOR-gate 低功输入或非
|
NXP Semiconductors N.V.
|
| 74AUP2G80GD125 74AUP2G80GM125 |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT996-2 (XSON8U); Container: Reel Pack, Reverse, Reverse AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse
|
NXP Semiconductors N.V.
|
| NC7WV17 |
TinyLogic ULP-A Dual Buffer with Schmitt Trigger Input
|
Fairchild
|
