| PART |
Description |
Maker |
| 5962F9863501VXC 5962F9863501VCC 5962F9863501V9A AC |
3-line to 8-line decoder / demultiplexer 16-SOIC 0 to 70
Contact Protector; Weight:163g
Radiation Hardened Quad D-Type Flip-Flop
with Reset(抗辐射四D触发器（带复位功能）)
Radiation Hardened Quad D-Type Flip- Flop with Reset AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Quad D-Type Flip- Flop with Reset AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC16
Radiation Hardened Quad D-Type Flip- Flop with Reset
|
Intersil Corporation
Intersil, Corp.
|
| MC74HC273AN MC74HC273ADTR2 MC74HC273ADT MC74HC273 |
Octal D-Type Flip-Flop
OCTAL D FLIP FLOP WITH COMMON CLOCK AND RESET HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
|
ON Semiconductor
ONSEMI
|
| MC10H106 MC100EL29DWR2 MC10H117 MC10H117FN MC100EP |
Triple 4-3-3-Input NOR Gate
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing
5V ECL 2-Input XOR/XNOR
4-Wide OR-AND/OR-ANDbar Gate
5V ECL 1:2 Differential Fanout Buffer
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL ÷2 Divider
5V ECL Differential Data and Clock D Flip-Flop
|
ON Semiconductor
|
| 74LV107 74LV107D 74LV107DB 74LV107N 74LV107PW 74LV |
CLP SINE LV/LV-A/LVX/H SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
Dual JK flip-flop with reset; negative-edge trigger
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| MC74HC109 ON1335 |
Dual J-K Flip-Flop with Set and Rest
From old datasheet system
DUAL J-K FLIP-FLOP WITH SET AND RESET
|
Motorola, Inc
ON Semi
|
| ACTS74HMSR-02 |
Dual D Type Flip Flop with Set and Reset, Advanced Logic, CMOS; Temperature Range: -55°C to 125°C; Package: Die (Military Visual) ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC14
|
Intersil, Corp.
|
| 74HC74DR2 74HC74DG |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
ON Semiconductor
|
| NLV74HC73ADR2G |
Dual J-K Flip-Flop with Reset
|
ON Semiconductor
|
| IN74HC74AD IN74HC74A |
Dual D Flip-Flop with Set and Reset
|
IK Semicon Co., Ltd
|
| CD54AC109 CD54AC103A CD54ACT109 CD54ACT103A CD54AC |
Dual J-K Flip-Flop with Set and Reset
|
INTERSIL[Intersil Corporation]
|
| MC74VHCT74A-D |
Dual D-Type Flip-Flop with Set and Reset
|
ON Semiconductor
|
| MC74VHC74-D MC74VHC74MEL MC74VHC74DR2 MC74VHC74DTR |
Dual D-Type Flip-Flop with Set and Reset
|
ON Semiconductor
|
