| PART |
Description |
Maker |
| STEVAL-IKR002V5 |
SPIRIT1 - Low Data Rate Transceiver - 915 MHz - FULL KIT
|
ST Microelectronics
|
| STEVAL-IKR002V2D |
SPIRIT1 - Low Data Rate Transceiver - 315 MHz - DAUGHTER BOARD
|
ST Microelectronics
|
| STEVAL-IKR001V2 |
SPIRIT1 - Low Data Rate Transceiver - 315 MHz - FULL KIT
Sub-GHz transceiver development kit based on the SPIRIT1 (315 MHz band)
|
ST Microelectronics
STMicroelectronics
|
| PSI-REP-DNET-CAN |
Automatic data rate detection or fixed data rate setting via DIP switches
|
PHOENIX CONTACT
|
| K4D623238B-GQC |
512K x 32Bit x 4 Banks Double Data Rate Synchronous RAM wi Extended Data Out Data Sheet
|
Samsung Electronic
|
| K4D28163HD |
2M x 16Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL Data Sheet
|
Samsung Electronic
|
| K4D26323RA-GC |
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL Data Sheet
|
Samsung Electronic
|
| SP3485EN-L |
3.3V Low Power Half-Duplex RS-485 Transceiver with 10Mbps Data Rate
|
Exar Corporation
|
| GS8170DD36C-333 GS8170DD36C-250 GS8170DD36C-300 GS |
18Mb x2Lp CMOS I/O Double Data Rate SigmaRAM 512K X 36 STANDARD SRAM, 2.1 ns, PBGA209
18Mb 1x2Lp CMOS I/O Double Data Rate SigmaRAM 35.71x2Lp的CMOS的I / O双数据速率SigmaRAM
|
GSI Technology, Inc.
|
| M13S5121632A-2S |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| W9751G6KB-18 W9751G6KB-25 W9751G6KB-3 W9751G6KB25A |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
