| PART |
Description |
Maker |
| ASP-135020-01 |
CONTACT CONFIGURATION NOT AVAILABLE AS STANDARD.
|
Samtec, Inc
|
| AT17LV010A AT17LV010A-10JC AT17LV010A-10JI AT17C01 |
FPGA Serial Configuration Memories 512K X 1 CONFIGURATION MEMORY, PQCC20
FPGA Configuration EEPROM Memory
|
Atmel, Corp.
ATMEL[ATMEL Corporation]
|
| XC1800 TMSS TDOV TDOXZ TDOZX TCKMIN TDIH TDIS TMSH |
128K X 1 CONFIGURATION MEMORY, 45 ns, PQCC20
XC1800 Series of In-System Programmable Configuration PROMs
|
XILINX INC
Xilinx Inc
Xilinx, Inc.
XILINX[Xilinx, Inc]
|
| T-31201 T-31202 |
Single Configuration / Dual Configuration
|
Rhombus Industries Inc.
|
| EPC1064LC-20 EPC1064VLC-20 EPC2TC32 EPC1064LI-20 E |
Configuration EPROM
Configuration EEPROM
|
|
| AT17LV128-10SC AT17LV128-10SI AT17LV256-10CU AT17L |
FPGA Configuration EEPROM Memory
10MHZ, 20 PLCC, IND TEMP, GREEN(FPGA) 512K X 1 CONFIGURATION MEMORY, PQCC20
10MHZ, 20 PLCC, IND TEMP, GREEN(FPGA) 1M X 1 CONFIGURATION MEMORY, PQCC20
256K X 1 CONFIGURATION MEMORY, PDSO8
|
ATMEL Corporation
聚兴科技股份有限公司
Atmel, Corp.
ATM Electronic, Corp.
|
| AT17LV65A-10JC AT17LV65A06 AT17LV256A-10JI AT17LV6 |
FPGA Configuration EEPROM Memory
10MHZ, 20 PLCC, IND TEMP, GREEN(FPGA) 512K X 1 CONFIGURATION MEMORY, PQCC20
|
ATMEL Corporation
ATM Electronic, Corp.
|
| XC17S50APDG8C XC17S50ASO20C |
XC2S50 PROM C grade 559200 X 1 CONFIGURATION MEMORY, PDIP8
SERIAL PROM FOR 50000 SYSTEM GATE LOGIC 559200 X 1 CONFIGURATION MEMORY, PDSO20
|
Xilinx, Inc.
|
| XC18V00-SERIES-OF-IN-SYSTEM-PROGRAMMABLE XC18V256V |
XC18V00 Series of In-System Programmable Configuration PROMs
In-system programmable configuration PROM.
|
Xilinx
|
| IDT72T4088L6-7BB IDT72T4098L6-7BB IDT72T4088L6-7BB |
Insulation Displacement (IDC) Connector; No. of Contacts:36; Contact Termination:IDC; Gender:Female; Pitch Spacing:0.1" RoHS Compliant: Yes 64K X 40 OTHER FIFO, 3.2 ns, PBGA208
Insulation Displacement (IDC) Connector; No. of Contacts:36; Contact Termination:IDC; Gender:Female; Pitch Spacing:0.1" RoHS Compliant: Yes 2.5伏高速TeraSync？？复员/特别提款权的FIFO 40位配
2.5 VOLT HIGH-SPEED TeraSync DDR/SDR FIFO 40-BIT CONFIGURATION 16K X 40 OTHER FIFO, 3.6 ns, PBGA208
Insulation Displacement (IDC) Connector; No. of Contacts:44; Contact Termination:IDC; Gender:Female; Pitch Spacing:0.1" RoHS Compliant: Yes 2.5伏高速TeraSync？？复员/特别提款权的FIFO 40位配
2.5 VOLT HIGH-SPEED TeraSync?? DDR/SDR FIFO 40-BIT CONFIGURATION
|
Integrated Device Technology, Inc.
INTEGRATED DEVICE TECHNOLOGY INC
|
| ATT17128-P8 ATT1736-P8 |
128K X 1 CONFIGURATION MEMORY, PDIP8
36288 X 1 CONFIGURATION MEMORY, PDIP8
|
|
| IRFK2D450 IRFK2F450 |
500V HALF BRDG HEXFET Power MOSFET in a TO-240AA package
Lsolated Base Power HEX-pak Assembly Half Bridge Configuration
ISOLATED BASE POWER HEX PAK ASSEMBLY HALF BRIDGE CONFIGURATION
|
IRF[International Rectifier]
|
