PART |
Description |
Maker |
NC7WV04P6X NC7WV04 NC7WV04L6X NC7WV04P6XNL |
TinyLogic ULP-A Dual Inverter AUP/ULP/V SERIES, DUAL 1-INPUT INVERT GATE, PDSO6 TinyLogic ULP-A Dual Inverter AUP/ULP/V SERIES, DUAL 1-INPUT INVERT GATE, DSO6
|
Fairchild Semiconductor, Corp. FAIRCHILD[Fairchild Semiconductor]
|
NC7WV07P6X NC7WV07 NC7WV07L6X |
TinyLogic ULP-A Dual Buffer (Open Drain Output) AUP/ULP/V SERIES, DUAL 1-INPUT NON-INVERT GATE, DSO6
|
Fairchild Semiconductor, Corp. FAIRCHILD[Fairchild Semiconductor]
|
NC7SV08FHX |
AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO6
|
FAIRCHILD SEMICONDUCTOR CORP
|
74AUP2GU04 74AUP2GU04GF132 74AUP2GU04GM115 74AUP2G |
Low-power dual unbuffered inverter; Package: SOT891 (XSON6); Container: Tape reel smd AUP/ULP/V SERIES, DUAL 1-INPUT INVERT GATE, PDSO6 Low-power dual unbuffered inverter; Package: SOT886 (XSON6); Container: Tape reel smd AUP/ULP/V SERIES, DUAL 1-INPUT INVERT GATE, PDSO6 Low-power dual unbuffered inverter; Package: SOT363 (SC-88); Container: Tape reel smd, Reverse AUP/ULP/V SERIES, DUAL 1-INPUT INVERT GATE, PDSO6
|
NXP Semiconductors N.V.
|
74AUP1G09GF 74AUP1G09GM 74AUP1G09GS |
Low-power 2-input AND gate with open-drain AUP/ULP/V SERIES, 2-INPUT AND GATE, PDSO6
|
NXP Semiconductors N.V.
|
74AUP2G34GF 74AUP2G34GM132 74AUP2G34GW |
Low-power dual buffer; Package: SOT886 (XSON6); Container: Tape reel smd AUP/ULP/V SERIES, 1-INPUT NON-INVERT GATE, PDSO6
|
NXP Semiconductors N.V.
|
74AUP2G07GW125 |
Low-power dual buffer with open-drain output; Package: SOT363 (SC-88); Container: Tape reel smd, Reverse AUP/ULP/V SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6
|
NXP Semiconductors N.V.
|
74AUP1G157GM 74AUP1G157GN 74AUP1G157GS |
Low-power 2-input multiplexer AUP/ULP/V SERIES, 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO6 Low-power 2-input multiplexer 低功2输入复用
|
NXP Semiconductors N.V.
|
74AUP2G240GS |
Low-power dual inverting buffer-line driver; 3-state AUP/ULP/V SERIES, DUAL 1-BIT DRIVER, INVERTED OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
74AUP1G373GF 74AUP1G373GN |
Low-power D-type transparent latch; 3-state 低功D型透明锁存器;3 Low-power D-type transparent latch; 3-state AUP/ULP/V SERIES, POSITIVE EDGE TRIGGERED D LATCH, TRUE OUTPUT, PDSO6
|
NXP Semiconductors N.V.
|
NC7SP32 NC7SP32L6X NC7SP32P5X |
TinyLogic ULP 2-Input OR Gate TinyLogic ULP 2-Input OR Gate
|
FAIRCHILD[Fairchild Semiconductor]
|
NC7SP02 NC7SP02L6X NC7SP02P5X |
TinyLogic ULP 2-Input NOR Gate TinyLogic ULP 2-Input NOR Gate
|
Fairchild Semiconductor Corporation FAIRCHILD[Fairchild Semiconductor]
|