| PART |
Description |
Maker |
| KVR400X64C3A/1G |
1024MB 400MHz DDR Non-ECC CL3 (3-3-3) DIMM 1024MB00MHz的复员非ECC CL3-3-3）内
|
Electronic Theatre Controls, Inc.
|
| A43L8316AV-5 A43L8316AV-5.5 A43L8316AV-6 A43L8316A |
Cycle time:5ns; 200MHz CL=3 access time:4.5ns 128K x 16bit x 2banks synchronous DRAM
Cycle time:5.5ns; 183MHz CL=3 access time:5.0ns 128K x 16bit x 2banks synchronous DRAM
Cycle time:6ns; 166MHz CL=3 access time:5.5ns 128K x 16bit x 2banks synchronous DRAM
Cycle time:7ns; 143MHz CL=3 access time:6.0ns 128K x 16bit x 2banks synchronous DRAM
|
AMIC Technology
|
| W83194BR-730 |
166MHZ CLOCK FOR SIS CHIPSET
|
WINBOND[Winbond]
|
| KVR133X64C364 KVR133X64C3_64 KVR133X64C3/64 |
64MB 8M x 64-BIT PC133 CL3 168-PIN DIMM Module
|
Kingston Technology
ETC[ETC]
List of Unclassifed Manufacturers
|
| KVR400X64C3A512 KVR400X64C3A |
512MB 64M x 64-Bit DDR400 CL3 184-Pin DIMM
|
List of Unclassifed Manufacturers
ETC[ETC]
|
| KVR133X72RC3L/1024 |
1024MB 133MHz ECC Registered CL3 Low Profile DIMM 1024MB33MHz的ECC的超薄注册CL3内存
|
RIA Connect
|
| KVR133X64C3L/128 |
128Mb 16M x 64-Bit PC133 CL3 Low Profile 168-Pin DIMM
|
Kingston Technology
|
| KVR133X64C3L/512 |
512MB 64M x 64-Bit PC133 CL3 Low Profile 168-Pin DIMM
|
Kingston Technology
|
| KVR400D2N3K2512 KVR400D2N3K2 KVR400D2N3K2_512 KVR4 |
MEMORY MODULE SPECIFICATION 512MB (256MB 32M x 64-BIT x 2 PCS.) DDR2-400 CL3 240-PIN DIMM KIT
|
List of Unclassifed Manufacturers
ETC
|
| UT1553BRTIGCA UT1553B-RTIPC 5962-8862801-XA 5962-8 |
RTI remote terminal interface. 10% to 35% clock duty cycle. Jan class Q. Lead finish optional.
RTI remote terminal interface. 10% to 35% clock duty cycle. Jan class Q. Lead finish gold.
RTI remote terminal interface. 10% to 35% clock duty cycle. Jan class Q. Lead finish solder.
From old datasheet system
BCRT Bus Controller/Remote Terminal/Monitor
|
Aeroflex Circuit Technology
ETC[ETC]
|
| CY7C1165V18 CY7C1163V18 CY7C1161V18 CY7C1176V18 CY |
18-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 9 QDR SRAM, 0.45 ns, PBGA165
18-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 18兆位的国防评估报告⑩- II SRAM字突发架构（2.5周期读写延迟
18-Mbit QDR??II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
