| PART |
Description |
Maker |
| W9725G6JB25I |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| R2705E |
27.195MHz FSK Radio Data Receiver for Manchester Data Format
|
List of Unclassifed Manufacturers
|
| M14D2561616A-2E |
Internal pipelined double-data-rate architecture; two data access per clock cycle
|
Elite Semiconductor Mem...
|
| AD1801JST |
1400 kbps DATA, MODEM-DATA/FAX/VOICE, PQFP128 TQFP-128
|
Analog Devices, Inc.
|
| HI-8783 |
(HI-8783 - HI-8785) 8 bit parallel data converted to 429 & 561 serial data out
|
Holt Integrated Circuits
|
| HI-878306 |
ARINC INTERFACE DEVICE 8 bit parallel data converted to 429 & 561 serial data out
|
Holt Integrated Circuits
|
| K4D26323RA K4D26323RA-GC2A K4D26323RA-GC33 K4D2632 |
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL
|
SAMSUNG SEMICONDUCTOR CO. LTD.
SAMSUNG[Samsung semiconductor]
Samsung Electronic
|
| MC68HC908JB12 MC68HC908JB12DW MC68HC908JB12JDW MC6 |
Addendum to MC68HC908JB16 Technical Data
This section updates data sheet information and introduces the 20-pin SOIC
|
FREESCALE[Freescale Semiconductor, Inc]
|
| W9412G6JH W9412G6JH-5 |
2M ?4 BANKS ?16 BITS DDR SDRAM
Double Data Rate architecture; two data transfers per clock cycle
|
Winbond
|
| ST7FDALI ST7FDALIF2B6 ST7FDALIF2M6 ST7FLITE2 ST7FL |
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI, DALI (DATA BRIEFING)
|
ST Microelectronics
|
| W9412G2IB W9412G2IB4 W9412G2IB-6I |
1M × 4 BANKS × 32 BITS GDDR SDRAM
Double Data Rate architecture; two data transfers per clock cycle
4M X 32 DDR DRAM, 0.7 ns, PBGA144
|
Winbond
WINBOND ELECTRONICS CORP
|
