| PART |
Description |
Maker |
| CY7C1314BV18-167BZXC |
18-Mbit QDRII SRAM 2 Word Burst Architecture 512K X 36 QDR SRAM, 0.5 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1141V18 CY7C1145V18 CY7C1156V18 CY7C1143V18 CY |
18-Mbit QDRII SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 2M X 9 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor Corp.
|
| CYPT1543AV18-250GCMB CYPT1545AV18-250GCMB CYRS1543 |
72-Mbit QDRII SRAM Four-Word Burst Architecture with RadStop™ Technology
|
Cypress
|
| CY7C1264XV18-366BZXC CY7C1264XV18-450BZXC |
36-Mbit QDRII Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)
|
Cypress
|
| CY7C2163KV18-450BZXI CY7C2163KV18-550BZXI CY7C2165 |
18-Mbit QDRII SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT
|
Cypress
|
| CY7C1241V18 CY7C1243V18 CY7C1241V18-300BZC CY7C124 |
36-Mbit QDRII SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 36兆位的国防评估报告⑩- II SRAM4字突发架构（2.0周期读写延迟
|
Cypress Semiconductor Corp.
|
| CAT64LC10ZJ CAT64LC10ZP CAT64LC10J-TE7 CAT64LC10J- |
18-Mbit QDR™-II SRAM 4-Word Burst Architecture
18-Mbit DDR-II SRAM 2-Word Burst Architecture
36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
4-Mbit (256K x 18) Flow-Through Sync SRAM SPI串行EEPROM
SPI Serial EEPROM SPI串行EEPROM
|
Analog Devices, Inc.
|
| CY7C1263XV18 CY7C1265XV18-633BZXC CY7C1263XV18-600 |
36-Mbit QDR? II Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)
36-Mbit QDRII Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)
|
Cypress Semiconductor
|
| UPD44165364F5-E60-EQ1 UPD44165084 UPD44165084F5-E4 |
18M-BIT QDRII SRAM 4-WORD BURST OPERATION
|
NEC[NEC]
|
| CY7C1415BV18-250BZI CY7C1415BV18-167BZI |
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 1M X 36 QDR SRAM, 0.45 ns, PBGA165
36-Mbit QDR™-II SRAM 4-Word Burst Architecture
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| CY7C1514KV18 CY7C1514KV18-300BZXC CY7C1512KV18-300 |
72-Mbit QDR II SRAM 2-Word Burst Architecture Two-word burst on all accesses
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 QDR SRAM, 0.45 ns, PBGA165
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1514V18 CY7C1514V18-200BZC CY7C1514V18-250BZC |
72-Mbit QDR-II?SRAM 2-Word Burst Architecture
72-Mbit QDR-II(TM) SRAM 2-Word Burst Architecture
72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture
72-MBIT QDR-II⒙ SRAM 2-WORD BURST ARCHITECTURE
72-Mbit QDR-II SRAM 2-Word Burst Architecture
|
CYPRESS[Cypress Semiconductor]
|
