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DATA SHEET COMPOUND FIELD EFFECT POWER TRANSISTOR PA1552B N-CHANNEL POWER MOS FET ARRAY SWITCHING USE DESCRIPTION The PA1552B is N-channel Power MOS FET Array that built in 4 circuits designed, for solenoid, motor and lamp driver. PACKAGE DIMENSIONS in millimeters 26.8 MAX. 10 4.0 FEATURES * Large Current and Low On-state Resistance ID(DC) = 5.0 A RDS(on)1 0.18 MAX. (VGS = 10 V, ID = 3 A) RDS(on)2 0.24 MAX. (VGS = 4 V, ID = 3 A) * Low Input Capacitance Ciss = 200 pF TYP. 1 2 3 4 5 6 7 8 9 10 1.4 0.60.1 2.5 * 4 V driving is possible 2.54 1.4 0.50.1 ORDERING INFORMATION Type Number Package 10 Pin SIP 2 3 CONNECTION DIAGRAM 5 7 9 PA1552BH 4 6 8 10 ABSOLUTE MAXIMUM RATINGS (TA = 25 C) Drain to Source Voltage Gate to Source Voltage Drain Current (DC) Drain Current (pulse) Total Power Dissipation Total Power Dissipation Channel Temperature Storage Temperature Single Avalanche Current Single Avalanche Energy VDSS Note 1 VGSS Note 2 ID(DC) ID(pulse) Note 3 PT1 Note 4 PT2 Note 5 TCH Tstg IAS Note 6 EAS Note 6 60 20 5.0 20 28 3.5 150 -55 to +150 5.0 2.5 V V A/unit A/unit W W C C A mJ 1 ELECTRODE CONNECTION 2, 4, 6, 8 : Gate 3, 5, 7, 9 : Drain 1, 10 : Source Notes 1. VGS = 0 3. PW 10 s, Duty Cycle 1 % 5. 4 Circuits, TA = 25 C 2. VDS = 0 4. 4 Circuits, TC = 25 C 6. Starting TCH = 25 C, V DD = 30 V, VGS = 20 V 0, RG = 25 , L = 100 H The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device is actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. Document No. G10599EJ2V0DS00 (2nd edition) Date Published December 1995 P Printed in Japan (c) 10 MIN. 1995 PA1552B ELECTRICAL CHARACTERISTICS (TA = 25 C) CHARACTERISTIC Drain Leakage Current Gate Leakage Current Gate Cutoff Voltage Forward Transfer Admittance Drain to Source On-State Resistance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge SYMBOL IDSS IGSS VGS(off) | Yfs | RDS(on)1 RDS(on)2 Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Qrr IF = 5.0 A, VGS = 0 IF = 5.0 A, VGS = 0, di/dt = 50 A/s VGS = 10 V, ID = 5.0 A, VDD = 48 V ID = 3.0 A, VGS = 10 V, VDD * * 30 V, = RL = 10 TEST CONDITIONS VDS = 60 V, VGS = 0 VGS = 20 V, VDS = 0 VDS = 10 V, ID = 1.0 mA VDS = 10 V, ID = 3.0 A VGS = 10 V, ID = 3.0 A VGS = 4.0 V, ID = 3.0 A VDS = 10 V, VGS = 0, f = 1.0 MHz 1.0 2.4 0.09 0.12 200 150 55 20 100 670 310 13 2 4.7 1.0 280 820 0.18 0.24 MIN. TYP. MAX. 10 10 2.0 UNIT A A V S pF pF pF ns ns ns ns nC nC nC V ns nC Test Circuit 1 Avalanche Capability Test Circuit 2 Switching Time D.U.T. RG = 25 PG VGS = 20 V 0 50 L D.U.T. RL VDD PG. VGS RG RG = 10 Wave Form VGS 0 ID ID Wave Form 10 % 90 % VGS (on) 90 % VDD 90 % ID 10 % td (off) toff tf BVDSS IAS ID VDD VDS VGS 0 t t = 1 s Duty Cycle 1 % 0 10 % td (on) ton tr Starting TCH Test Circuit 3 Gate Charge D.U.T. IG = 2 mA PG. RL 50 VDD 2 PA1552B CHARACTERISTICS (TA = 25 C) TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 6 PT - Total Power Dissipation - W PA1552BH TOTAL POWER DISSIPATION vs. CASE TEMPERATURE 30 PT - Total Power Dissipation - W NEC ,,, ,,, , 5 4 3 2 1 Lead Print Circuit Boad Under same dissipation in each circuit 4 Circuits operation 3 Circuits operation 2 Circuits operation 1 Circuit operation Under same dissipation in each circuit 4 Circuits operation 3 Circuits operation 2 Circuits operation 1 Circuit operation 20 10 0 50 100 150 TC is grease Temperature on back surface 0 50 100 TC - Case Temperature - C 150 TA - Ambient Temperature - C FORWARD BIAS SAFE OPERATING AREA 100 dT - Percentage of Rated Power - % DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA ID - Drain Current - A 10 on )L im i ted G (V S =1 ) 0V ID(pulse) PW = 1 m 100 80 60 40 20 ID(DC) 10 0 50 10 s s R ( DS ms s m m 1 DC 0.1 0.1 TC = 25 C Single Pulse 1 10 100 0 20 40 60 80 100 120 140 160 VDS - Drain to Source Voltage - V FORWARD TRANSFER CHARACTERISTICS 100 Pulsed VGS = 10 V ID - Drain Current - A TC - Case Temperature - C DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE 20 VGS = 20 V 10 V Pulsed ID - Drain Current - A 10 VGS = 4 V 10 1.0 TA = 125 C 75 C 25 C -25 C 0.1 0 2 4 6 0 1 2 3 4 VGS - Gate to Source Voltage - V VDS - Drain to Source Voltage - V 3 PA1552B TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1 000 Single Pulse, For each Circuit Rth(CH-A) 4Circuits 3Circuits 2Circuits 1Circuit rth(t) - Transient Thermal Resistance - C/W 100 10 Rth(CH-C) 1.0 0.1 100 1m 10 m 100 m 1 10 100 1 000 PW - Pulse Width - sec | yfs | - Forward Transfer Admittance - S 100 VDS = 10 V Pulsed 10 TA = -25 C 25 C 75 C 125 C RDS(on) - Drain to Source On-State Resistance - m FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 300 Pulsed 200 ID = 5 A 3A 1A 1.0 100 0.1 0.1 1.0 ID - Drain Current - A 10 0 10 VGS - Gate to Source Voltage - V 20 RDS(on) - Drain to Source On-State Resistance - m DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 300 GATE TO SOURCE CUTOFF VOLTAGE vs. CHANNEL TEMPERATURE Pulsed VGS(off) - Gate to Source Cutoff Voltage - V 2 VDS = 10 V ID = 1 mA 200 VGS = 4 V 1 100 VGS = 10 V 0 1.0 ID - Drain Current - A 10 0 -50 0 50 100 150 TCH - Channel Temperature - C 4 PA1552B RDS(on) - Drain to Source On-State Resistance - m DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE SOURCE TO DRAIN DIODE FORWARD VOLTAGE Pulsed ISD - Diode Forward Current - A 200 VGS = 4 V 10 150 1.0 VGS = 10 V 100 VGS = 10 V VGS = 0 0.1 50 ID = 3 A 0 50 100 150 0 - 50 0.01 0 0.5 1.0 1.5 TCH - Channel Temperature -C CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 1 000 VSD - Source to Drain Voltage - V SWITCHING CHARACTERISTICS 1 000 td(on), tr, td(off), tf - Switching Time - ns Ciss, Coss, Crss - Capacitance - pF VGS = 0 f = 1 MHz td(off) tf Ciss 100 Coss 100 tr Crss td(on) 10 0.1 1.0 10 . VDD = 30 V . VGS = 10 V RG = 10 10 0.1 1 10 100 100 VDS - Drain to Source Voltage - V REVERSE RECOVERY TIME vs. DRAIN CURRENT 1 000 ID - Drain Current - A DYNAMIC INPUT/OUTPUT CHARACTERISTICS 60 12 VDD = 12 V 30 V 48 V 10 8 6 20 4 2 0 ID = 5 A VDS - Drain to Source Voltage - V di/dt = 50 A/ s VGS = 0 40 100 VDS 0 2 4 6 8 10 12 14 16 10 0.1 1.0 10 100 ID - Drain Current - A QG - Gate Charge - nC 5 VGS - Gate to Source Voltage - V trr - Reverse Recovery time - ns VGS PA1552B SINGLE AVALANCHE ENERGY vs. INDUCTIVE LOAD 10 IAS - Single Avalanche Energy - mJ SINGLE AVALANCHE ENERGY DERATING FACTOR 100 IAS = 5 A Energy Derating Factor - % 80 VDD = 30 V RG = 25 VGS = 20 V 0 IAS < 5.0 A = EA S= 2.5 mJ 60 1.0 40 VDD = 30 V VGS = 20 V 0 RG = 25 Starting TCH = 25 C 0.1 10 100 1m 10 m 20 0 25 50 75 100 125 150 L - Inductive Load - H Starting TCH - Starting Channel Temperature - C REFERENCE Document Name NEC semiconductor device reliability/quality control system Quality grade on NEC semiconductor devices Semiconductor device mounting technology manual Semiconductor device package manual Guide to quality assurance for semiconductor devices Semiconductor selection guide Power MOS FET features and application switching power supply Application circuits using Power MOS FET Safe operating area of Power MOS FET Document No. TEI-1202 IEI-1209 IEI-1207 IEI-1213 MEI-1202 MF-1134 TEA-1034 TEA-1035 TEA-1037 6 PA1552B [MEMO] 7 PA1552B No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customer must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices in "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact NEC Sales Representative in advance. Anti-radioactive design is not implemented in this product. M4 94.11 2 |
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