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 INTEGRATED CIRCUITS
DATA SHEET
TEA1206T High efficiency DC/DC converter
Preliminary specification Supersedes data of 1998 Mar 24 File under Integrated Circuits, IC03 1999 Sep 16
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
FEATURES * Fully integrated DC/DC converter circuit * Up-or-down conversion * Start-up from 1.8 V input * Adjustable output voltage * High efficiency over large load range * Power handling capability up to 1 A continuous average current * 600 kHz switching frequency * Low quiescent power consumption * Synchronizes to external 9 to 20 MHz clock * True current limit for Li-ion battery compatibility * Up to 100% duty cycle in down mode * Undervoltage lockout * Shut-down function * 8-pin SO package. APPLICATIONS
TEA1206T
* Cellular and cordless phones, PDAs and others * Supply voltage source for low-voltage chip sets * Portable computers * Battery backup supplies * Cameras. GENERAL DESCRIPTION The TEA1206T (see Fig.1) is a fully integrated DC/DC converter circuit. Efficient, compact and dynamic power conversion is achieved using a novel, digitally controlled Pulse Width and Frequency Modulation (PWFM) like control concept, integrated low RdsON CMOS power switches with low parasitic capacitances, and fully synchronous rectification. The device operates at a high 590 kHz switching frequency which enables the use of minimum size external components. Deadlock is prevented by an on-chip undervoltage lockout circuit. Compatibility with Li-ion batteries is guaranteed by an accurate current limit function.
ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TEA1206T SO8 DESCRIPTION plastic small outline package; 8 leads; body width 3.9 mm VERSION SOT96-1
1999 Sep 16
2
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
QUICK REFERENCE DATA SYMBOL Voltage levels VO(up) VO(down) Vi(up) Vi(down) Vstart Vfb Iq Ishdwn IlimN IlimP ILx RdsON(N) RdsON(P) output voltage range in up mode output voltage range in down mode input voltage range in up mode input voltage range in down mode start-up voltage feedback voltage level U/D = LOW U/D = HIGH U/D = LOW U/D = HIGH up mode; IL < 200 mA 2.80 1.25 Vstart 2.80 1.40 1.19 - - - - 1.60 1.24 PARAMETER CONDITIONS MIN. TYP.
TEA1206T
MAX.
UNIT
5.50 5.50 5.50 5.50 1.85 1.29
V V V V V V A A A A A
Current levels quiescent current at pin 3 shut-down current current limit NFET current limit PFET maximum continuous current at pin 4 up mode; note 1 down mode; note 1 down mode, Vi = 3.6 V 65 - 0.5 0.5 - 0.08 0.10 Vi = 3.6 V; L = 10 H IL = 1 mA IL = 10 mA IL = 50 mA IL = 100 mA IL = 500 mA IL = 1000 mA; pulsed load current Vi = 3.6 down to 1.8 V IL = 1 mA IL = 10 mA IL = 50 mA IL = 100 mA IL = 500 mA IL = 1000 mA; pulsed load current Timing fsw fsync tres Note 1. Current limit is defined by an external resistor Rlim, having 1% accuracy. The typical value is presettable between 0.5 and 5.0 A with a spread of 17.5%. 1999 Sep 16 3 switching frequency sync input frequency response time from standby to Pmax PWM mode 475 9 - 560 13 25 645 20 - kHz MHz s - - - - - - - - - - - - - 75 2 - - - 0.14 0.16 - 86 93 93 93 93 87 83 90 91 87 88 82 85 10 5.0 5.0 1.0
Power MOSFETS pin-to-pin resistance NFET pin-to-pin resistance PFET 0.20 0.25 - - - - - - - - - - - - - % % % % % % % % % % % %
Efficiency; see Fig.5 efficiency Vi = 3.6 up to 4.6 V
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 1999 Sep 16
LX 4 I/V CONVERTER ILIM 2 START-UP CIRCUIT I/V CONVERTER N-type POWER FET CURRENT LIMIT COMPARATORS
BLOCK DIAGRAM
Philips Semiconductors
P-type POWER FET
handbook, full pagewidth
High efficiency DC/DC converter
3
UPOUT/DNIN
sense FET
INTERNAL SUPPLY
TEA1206T
CONTROL LOGIC AND MODE GEARBOX
7
FB
4
6 GND
TEMPERATURE PROTECTION sense FET 13 MHz OSCILLATOR SYNC GATE
TIME COUNTER DIGITAL CONTROLLER
BAND GAP REFERENCE
5
8
1
MGM666
SYNC
SHDN
U/D
Preliminary specification
TEA1206T
Fig.1 Block diagram.
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
PINNING SYMBOL U/D ILIM UPOUT/DNIN LX SYNC GND FB SHDWN PIN 1 2 3 4 5 6 7 8 DESCRIPTION conversion mode selection input current limit resistor connection up mode; output voltage/ down mode; input voltage inductor connection synchronization clock input
MGM667
TEA1206T
handbook, halfpage
U/D 1 ILIM 2
8 7
SHDWN FB GND SYNC
TEA1206T
UPOUT/DNIN 3 LX 4 6 5
ground feedback input shut-down input cycle. As soon as more load current is taken from the output the output voltage starts to decay. When the output voltage becomes lower than the low limit of the window, a corrective action is taken by a ramp-up of the inductor current during a much longer time. As a result, the DC current level is increased and normal PWM control can continue. The output voltage (including ESR effect) is again within the predefined window. Figure 4 depicts the spread of the output voltage window. The absolute value is most dependent on spread, while the actual window size is not affected. For one specific device, the output voltage will not vary more than 2% typically. In low output power situations, TEA1206T will switch over to PFM (discontinuous conduction) mode operation. In this mode, regulation information from earlier PWM mode operation is used. This results in optimum inductor peak current levels in PFM mode, which are slightly larger than the inductor ripple current in PWM mode. As a result, the transition between PFM and PWM mode is optimal under all circumstances. In PFM mode, TEA1206T regulates the output voltage to the high window limit shown in Fig.3. Synchronous rectification For optimal efficiency over the whole load range, synchronous rectifiers inside TEA1206T ensure that during the whole second switching phase, all inductor current will flow through the low-ohmic power MOSFETS. Special circuitry is included which detects that the inductor current reaches zero. Following this detection, the digital controller switches off the power MOSFET and proceeds regulation. Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION Control mechanism The TEA1206T DC/DC converter is able to operate in PFM (discontinuous conduction) or PWM (continuous conduction) operation. All switching actions are completely determined by a digital control circuit which uses the output voltage level as its control input. This novel digital approach enables the use of a new pulse width and frequency modulation scheme, which ensures optimum power efficiency over the complete range of operation of the converter. The scheme works as follows. When high output power is requested, the device will operate in PWM (continuous conduction) mode. This results in minimum AC currents in the circuit components and hence optimum efficiency, cost and EMC. In this mode, the output voltage is allowed to vary between two predefined voltage levels. As long as the output voltage stays within this so-called window, switching continues in a fixed pattern. When the output voltage reaches one of the window borders, the digital controller immediately reacts by adjusting the pulse width and inserting a current step in such a way that the output voltage stays within the window with higher or lower current capability. This approach enables very fast reaction to load variations. Figure 3 shows the converter's response to a sudden load increase. The upper trace shows the output voltage. The ripple on top of the DC level is a result of the current in the output capacitor, which changes in sign twice per cycle, times the capacitor's internal Equivalent Series Resistance (ESR). After each ramp-down of the inductor current, i.e. when the ESR effect increases the output voltage, the converter determines what to do in the next
1999 Sep 16
5
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
Start-up Start-up from low input voltage in boost mode is realised by an independent start-up oscillator, which starts switching the N-type powerfet as soon as the voltage at pin 3 is measured to be sufficiently high. The switch actions of the start-up oscillator will increase the output voltage. As soon as the output voltage is high enough for normal regulation, the digital control system takes over the control over the power MOSFETS. Undervoltage lockout As a result of too high load or disconnection of the input power source, the output voltage can drop so low that normal regulation cannot be guaranteed. In that case, the device switches back to start-up mode. If the output voltage would drop down even further, switching is stopped completely. Shut-down When the shut-down pin is made HIGH, the converter disables both switches and power consumption is reduced to a few A. Power switches The power switches in the IC are one N-type and one P-type MOSFET, having a typical pin-to-pin resistance of 0.14 and 0.16 respectively. The maximum average current in the switches is 1.0 A. Temperature protection When the device operates in PWM mode, and the device temperature gets too high (typically 175 C), the converter stops operating. It resumes operation when the device temperature falls below 175 C again. As a result, low-frequent cycling between on and off state will occur. It should be noted that in the event of device temperatures around the cut-off limit, the application differs strongly from maximum specifications. External synchronisation Current limiters
TEA1206T
If the current in one of the power switches exceeds its limit in PWM mode, current ramping is stopped immediately, and the next switching phase is entered. Current limitation is required to enable optimal use of energy in Lithium-Ion batteries, and to keep power conversion efficient during temporary high loads. Furthermore, current limitation protects the IC against overload conditions, inductor saturation, etc. The current limit level is set by an external resistor which must be connected to pin 2.
If a high-frequency clock is applied to the external synchronisation pin, the switching frequency in PWM mode will be exactly that frequency divided by 22. In PFM mode, the switching frequency is always lower. The quiescent current of the device increases when an external clock is applied. In case no external synchronisation is necessary, the sync pin must be tied to ground level. Behaviour at regulation limits In two cases, the output voltage will not stay in normal regulation because of excessive input voltage: * Upconversion (see Fig.6): the output voltage will exceed the high window limit if the input voltage is higher than this limit plus the voltage drop over the diode. In that case, the converter will stop switching and the external schottky diode will take over all current. The output voltage will be equal to Vi minus the diode voltage drop. The input voltage must not exceed 5.5 V. The current limit function is not active since all current flows through the external diode in this situation. * Downconversion (see Fig.7): the output voltage will get lower than the lower window limit when the input voltage is lower than this limit plus the voltage drop over the P-type FET. In that case, the P-type FET will stay conducting (100% duty cycle) resulting in Vo being equal to Vi minus some resistive voltage drop. The input voltage must not be lower than 2.8 V. The current limit function remains active.
1999 Sep 16
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Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
TEA1206T
handbook, full pagewidth
load increase Vo
start corrective action high window limit low window limit
time
IL
time
MGK925
Fig.3 Response to load increase.
handbook, full pagewidth
maximum positive spread Vh 2% +4% Vh Vout, typ 2% Vl -4% Vl
upper specification limit
Vh 2%
typical situation
Vl maximum negative spread
lower specification limit
MGM669
Fig.4 Output voltage window spread.
1999 Sep 16
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Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL Vn Tj Tamb Tstg Ves Ves Note PARAMETER voltage on any pin junction temperature operating ambient temperature storage temperature electrostatic handling, pins 1,2,3,5,6,8 electrostatic handling, pins 4 and 7 note 1 note 1 CONDITIONS shut-down mode operational mode MIN. -0.2 -0.2 -25 -40 -40 -3000 -1000
TEA1206T
MAX. +6.5 +5.9 +150 +80 +150 +3000 +1000
UNIT V V C C C V V
1. Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air VALUE 150 UNIT K/W
QUALITY SPECIFICATION In accordance with "SNW-FQ-611 part E".
1999 Sep 16
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Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
TEA1206T
CHARACTERISTICS Tj = -40 to +80 C; all voltages with respect to ground; positive currents flow into the IC; unless otherwise specified. SYMBOL Voltage levels VO(up) VO(down) Vi(up) Vi(down) Vstart Vfb Vwdw Vuvlo Iq Ishdwn IlimN IlimP ILx RdsON(N) RdsON(P) output voltage range in up mode output voltage range in down mode input voltage range in up mode input voltage range in down mode start-up voltage feedback voltage level output voltage window spread undervoltage lockout level PWM mode; see Fig.4 up mode; note 2 U/D = LOW U/D = HIGH U/D = LOW U/D = HIGH; note 1 up mode; IL < 200 mA 2.80 1.25 Vstart 2.80 1.40 1.19 1.5 1.50 - - - - 1.60 1.24 2.0 2.10 5.50 5.50 5.50 5.50 1.85 1.29 3.0 2.50 V V V V V V % V A A A A A PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Current levels quiescent current at pin 3 shut-down current current limit NFET current limit PFET maximum continuous current at pin 4 up mode; note 4 down mode; note 4 V3 = 3.6 V; note 3 65 - 0.5 0.5 - 0.08 0.10 - - - - - - - - - - - - - 75 2 - - - 0.14 0.16 - 86 93 93 93 93 87 83 90 91 87 88 82 85 10 5.0 5.0 1.0
Power MOSFETS pin-to-pin resistance NFET pin-to-pin resistance PFET 0.20 0.25 - - - - - - - - - - - - - % % % % % % % % % % % %
Efficiency; see Fig.5 efficiency Vi = 3.6 up to 4.6 V Vi = 3.6 V; note 5 IL = 1 mA IL = 10 mA IL = 50 mA IL = 100 mA IL = 500 mA IL = 1000 mA; pulsed load current Vi = 3.6 down to 1.8 V IL = 1 mA IL = 10 mA IL = 50 mA IL = 100 mA IL = 500 mA IL = 1000 mA; pulsed load current Timing fsw fsync tres switching frequency sync input frequency response time from standby to Pmax 9 PWM mode 475 9 - 560 13 25 645 20 - kHz MHz s
1999 Sep 16
Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
TEA1206T
SYMBOL Temperature Tamb Tmax VlL VIH VIH Notes
PARAMETER
CONDITIONS
MIN. -40 150
TYP.
MAX.
UNIT C C V
operating ambient temperature internal cut-off temperature
+25 175 - -
+80 200
Digital levels LOW-level input voltage pins 1, 5 and 8 HIGH-level input voltage pin 1 HIGH-level input voltage pins 5 and 8 note 6 note 6 0 0.55V3 0.5 V3 - 0.4 - V3 + 0.3 V V3 + 0.3 V
1. At Vi lower than the target output voltage, but higher than 2.8 V, the PFET will remain conducting (100% duty cycle), resulting in Vo following the input voltage. 2. The undervoltage lockout level shows wide specification limits since it decreases at increasing temperature. Since the minimum supply voltage of the digital control part also decreases when temperature goes up, correct operation of this function is guaranteed over the whole temperature range. 3. V3 is the voltage at pin 3 (UPOUT/DNIN). 4. Current limit is defined by an external resistor Rlim, having 1% accuracy. The typical value is presettable between 0.5 and 5.0 A with a spread of 17.5%. 5. The specified efficiency is valid when using an output capacitor having an ESR of 0.10 and a Coilcraft DT1608C-103 10 H small size inductor. 6. If the applied high level is less than V3 - 1 V, the quiescent current level of the device will increase.
handbook, full pagewidth
100
MGM668
efficiency (%) 90
(1)
(2)
80
70
60 1 10
102
IL (mA)
103
(1) Represents the curve for upconversion from 3.6 to 4.6 V. The solid line indicates PFM and the dashed line indicates PWM. (2) Represents the curve for downconversion from 3.6 to 1,8 V. The solid line indicates PFM and the dashed line indicates PWM. Vi = 3.6 V; L = 10 H (DT1608-103); Cout = 330 F (Sprague 595D) capacitor.
Fig.5 Efficiency as a function of load current IL.
1999 Sep 16
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Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
APPLICATION INFORMATION
TEA1206T
handbook, full pagewidth
D1
UPOUT/DNIN L1 VI LX
VO R1
TEA1206T
FB
C2 R2
C1
U/D
GND SYNC SHDWN
ILIM Rlim
MGM670
Fig.6 Complete application for upconversion.
handbook, full pagewidth
L1 VI UPOUT/DNIN LX VO
TEA1206T
FB C2 U/D ILIM SYNC Rlim GND SHDWN D2
R1
C1 R2
MGM671
Fig.7 Complete application for downconversion.
1999 Sep 16
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Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
External component selection INDUCTOR The performance of the TEA1206 is not very sensitive to inductance value. Best efficiency performance over a wide load current range is achieved by using e.g. TDK SLF7032-6R8M1R6, having an inductance of 6.8 H and a saturation current level of 1.6 A. In case the maximum output current is lower, other inductors are also suitable like the small sized Coilcraft DT1608 range. INPUT CAPACITANCE The value of Cin strongly depends on the type of input source. In general, a 100 F tantalum capacitor will do, or a 10 F ceramic capacitor featuring very low series resistance (ESR). OUTPUT CAPACITOR The value and type of Cout depends on the maximum output current and the ripple voltage which is allowed in the application. Low-ESR tantalum as well as ceramic capacitors show good results. Most important specification of Cout is its ESR, which mainly determines output voltage ripple. DIODE The schottky diode is only used during a small time during takeover from N-type powerfet and P-type powerfet and vice versa. Therefore, a medium-power diode like Philips PRLL5819 is sufficient. OUTPUT VOLTAGE SETTING
TEA1206T
The output voltage level is determined by the resistors R1 and R2. The following conditions apply: * Use 1% accurate SMD type resistors only. In case larger body resistors are used, the capacitance on pin 7 (FB) will be too large, causing inaccurate operation. * Resistors R1 and R2 shall have a maximum value of 50 k when connected in parallel. A higher value will result in inaccurate operation. Under these conditions, the output voltage can be set by the formula: Vout = 1.24 x (1 + R1/R2). CURRENT LIMIT SETTING The maximum instantaneous current is set by the external resistor Rlim. Preferred type is SMD, 1% accurate. The connection of Rlim differs per mode: * In UP conversion mode, Rlim must be connected between pin 2 (ILIM) and pin 3 (UPOUT/DNIN). The current limit level is defined by: IlimN = 440/ Rlim. * In DOWN conversion mode, Rlim must be connected between pin 2 (ILIM) and pin 6 (GND). The current limit level is defined by: IlimP = 650/ Rlim. The average inductor current during current limit also depends on inductance value and resistive losses in all components in the power path. Ensure that Ilim < Isat of the inductor.
1999 Sep 16
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Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
PACKAGE OUTLINE SO8: plastic small outline package; 8 leads; body width 3.9 mm
TEA1206T
SOT96-1
D
E
A X
c y HE vMA
Z 8 5
Q A2 A1 pin 1 index Lp 1 e bp 4 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3
0.010 0.057 0.069 0.004 0.049
0.019 0.0100 0.014 0.0075
0.244 0.039 0.028 0.050 0.041 0.228 0.016 0.024
0.028 0.004 0.012
8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03S JEDEC MS-012AA EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-04 97-05-22
1999 Sep 16
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Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave.
TEA1206T
* For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1999 Sep 16
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Philips Semiconductors
Preliminary specification
High efficiency DC/DC converter
Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes not suitable not not not suitable(2) recommended(3)(4) recommended(5) suitable suitable suitable suitable suitable suitable
TEA1206T
REFLOW(1)
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
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15
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 62 5344, Fax.+381 11 63 5777
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1999
Internet: http://www.semiconductors.philips.com
SCA 68
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
465002/25/02/pp16
Date of release: 1999
Sep 16
Document order number:
9397 750 05984


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