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Semiconductors
TFDU6100E/TFDS6500E/TFDT6500E
2.7-5.5V Fast Infrared Transceiver Module Family (FIR, 4 Mbit/s)
Features
D Compliant to IrDA 1.2 (Up to D BabyFace (Universal) Package
Applications
D Notebook Computers, Desktop
D D D D D D
4 Mbit/s), HP-SIR, Sharp ASK and TV Remote Wide Operating Voltage Range (2.7 to 5.5 V ) Low-Power Consumption (3 mA Supply Current) Power Shutdown Mode (1 mA Shutdown Current) Long Range (Up to 2.0 m at 4 Mbit/s in Nominal Design) High Efficiency Emitter (120 mW/sr min "15_) Three Surface Mount Package Options - Universal (9.7 x 4.7 x 4.0 mm) - Side View (13.0 x 5.95 x 5.3 mm) - Top View (13.0 x 7.6 x 5.95 mm)
D D D D
Capable of Surface Mount Solderability to Side and Top View Orientation Directly Interfaces With Various Super I/O and Controller Devices Built-In EMI Protection - No External Shielding Necessary Few External Components Required Backward Compatible to All TEMIC SIR and FIR Infrared Transceivers
D D D D D D
PCs, Palmtop Computers (Win CE, Palm PC), PDAs Digital Still and Video Cameras Printers, Fax Machines, Photocopiers, Screen Projectors Telecommunication Products (Cellular Phones, Pagers) Internet TV Boxes, Video Conferencing Systems External Infrared Adapters (Dongles) Medical and Industrial Data Collection Devices
Description
The TFDU6100E, TFDS6500E, and TFDT6500E are a family of low-power infrared transceiver modules compliant to the IrDA 1.2 standard for fast infrared (FIR) data communication, supporting IrDA speeds up to 4.0 Mbit/s, HP-SIR, Sharp ASK and carrier based remote control modes up to 2 MHz. Integrated within the transceiver modules are a photo PIN diode, infrared emitter (IRED), and a low-power CMOS control IC to provide a total front-end solution in a single package. TEMIC's FIR transceivers are available in three package options, including our BabyFace package (TFDU6100E), the smallest FIR transceiver available on the market. This wide selection provides flexibility for a variety of applications and space constraints. The transceivers are capable of directly interfacing with a wide variety of I/O chips which perform the pulse-width modulation/demodulation function, including National Semiconductor's PC87338, PC87108 and PC87109, SMSC's FDC37C669, FDC37N769 and CAM35C44, and Hitachi's SH3. At a minimum, a current-limiting resistor in series with the infrared emitter and a VCC bypass capacitor are the only external components required to implement a complete solution.
Package Options
TFDU6100E Baby Face (Universal) TFDS6500E Side View TFDT6500E Top View
This product is currently in devleopment. Inquiries regarding the status of this product should be directed to TEMIC Marketing.
Pending--Rev. A, 03-Apr-98
1
Pre-Release Information
TFDU6100E/TFDS6500E/TFDT6500E
Functional Block Diagram
VCC
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Driver Amplifier Comparator Rxd
SD/Mode Txd
AGC Logic
IRED Anode
IRED Cathode Open Collector Driver
GND
Pin Assignment and Description
Pin Number " U ", " T " Option
1 2 3 4
"S" Option
8 1 7 2
Function
IRED Anode IRED Cathode Txd Rxd
Description
IRED anode, should be externally connected to VCC through a current control resistor IRED cathode, internally connected to driver transistor Transmit Data Input Received Data Output, push-pull CMOS driver output capable of driving a standard CMOS or TTL load. No external pull-up or pull-down resistor is required (pin is floating when device is in shutdown mode). Shutdown/Mode Supply Voltage Do not connect. Ground 8 7 6 5 IRED
I/O
Active
I O
HIGH LOW
5 6 7 8
6 3 5 4
SD/Mode VCC NC GND
I
HIGH
IRED
Detector
Detector
1 2345 678 1 IRED "U" Option BabyFace (Universal) 2 3 4 Detector 1 2 3 4 5 67 8
"S" Option Side View
"T" Option Top View
2
Pending--Rev. A, 03-Apr-98
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TFDU6100E/TFDS6500E/TFDT6500E
Qty/ Reel
1000 pcs 1000 pcs 750 pcs 750 pcs
Ordering Information
Part Number
TFDU6100E-TR3 TFDU6100E-TT3 TFDS6500E-TR3 TFDT6500E-TR3
Description
Oriented in carrier tape for side view surface mounting Oriented in carrier tape for top view surface mounting
Absolute Maximum Ratings
Parameter
Supply Voltage Range Supply Voltage Range (Anode) Input Currentsd Output Sinking Current Power Dissipatione Junction Temperature Ambient Temperature Range (Operating) Storage Temperature Range Soldering Temperature Average Output Current Repetitive Pulsed Output Current IRED Anode Voltage at Current Output Transmitter Data Input Voltage Receiver Data Output Voltage Virtual Source Sizef IIRED (DC) IIRED (RP) VIREDA VTxd VRxd d EN60825, 1997 <90 s, ton <20% - 0.5 - 0.5 - 0.5 2.5 2.8 320 PD TJ Tamb Tstg See Recommended Solder Profile -25 -25
Symbol
VCC Vanode
Test Conditionsa
Minb
- 0.5 0
Typc
Maxb
6
Unit
V
VCC+1.5 10 mA 25 350 125 85 85 240 130 mA 600 6 VCC+0.5 VCC+0.5 mm mW/sr V C mW
Maximum Intensity for Class 1 Operation of IEC 825 or EN60825g
Notes a. Reference point GND pin unless otherwise noted. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. Maximum input current for all pins (except IRED Anode pin). e. See Derating Curve. f. Method: (1-1/e) encircled energy. g. Worst case IrDA SIR pulse pattern.
Pending--Rev. A, 03-Apr-98
3
Pre-Release Information
TFDU6100E/TFDS6500E/TFDT6500E
Electrical Characteristics
Parameter
Transceiver Supply Voltage Dynamic Supply Currentd Dynamic Supply Current Standby Supply Currente Standby Supply Current Standby Supply Currente Operating Temperature Range Output Voltage Low Output Voltage High Input Voltage Low Input Voltage Input Voltage Highf Highg VCC ICC ICC ISD ISD ISD TA VOL VOH VIL VIH VIH IL CI VCC 4.5V Rload = 2.2 k, Cload = 15 pF Rload = 2.2 k, Cload = 15 pF VCC-0.5 0 0.9 * VCC 2.4 -10 SD = Low, Ee = 0 mW/m2 SD = Low, Ee = 1 klxd SD = High, Mode = floating, 25C, Ee = 0 klx SD = High, Mode = floating, T =25C, Ee = 1 klxd SD = High, Mode = floating, T = 85C -25 2.7
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Symbol
Test Conditionsa
Minb
Typc
Maxb
5.5
Unit
V mA
3 3
4 4 1 1.5 5 85
A
C
0.5
0.8
0.8
V
Input Leakage Current Input Capacitance
+10 5
A pF
Notes a. Tamb = 25_, VCC = 2.7 - 5.5 V unless otherwise noted. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. Receive mode only. In transmit mode, add additional 100 mA (typ) to IRED current. e. Not ambient light sensitive. f. CMOS levels. g. TTL levels.
4
Pending--Rev. A, 03-Apr-98
Pre-Release Information
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TFDU6100E/TFDS6500E/TFDT6500E
Symbol Test Conditionsa Minb Typc Maxb Unit
Optoelectronic Characteristics
Parameter Receiver
Minimum Detection Threshold Irradiance Minimum Detection Threshold Irradiance Maximum Detection Threshold Irradiance Logic LOW Receiver Input Irradiance Rise Time of Output Signal Fall Time of Output Signal Rx Pulse Width of Output Signal, 50% Rx Pulse Width of Output Signal, 50% Rx Pulse Width of Output Signal, 50% Rx Pulse Width of Output Signal, 50% Rx Pulse Width of Output Signal, 50% Jitter, Leading Edge Latency tL VCC = 5 V, R1= 5.6 Txd = High, SD = Low, R1= 5.6 Txd = Low or SD = Highe, RL=5.6 880 IF = 600 mA, pulse length 2 s, duty cycle 25% tR, tF 10 400 120 Ee Ee Ee Ee tRR tFR Pw Pw Pw Pw Pw 10% to 90%, @2.2 k, 15pF 90% to 10%, @2.2 k, 15pF Input pulse length 20 s, 9.6 kbit/s Input pulse length 1.41s, 115.2 kbit/s mode Input pulse length 217 ns, 4.0 Mbit/s mode Input pulse length 125 ns, 4.0 Mbit/s mode Input pulse length 250 ns, 4.0 Mbit/s mode (double pulse) Input Irradiance = 90 mW/m2, 4.0 Mbit/s mode 9.6 kbit/s to 115.2 kbit/s 1.152 Mbit/s to 4 Mbit/s 5 4 10 10 1.2 1.2 190 90 210 10 40 40 20 2.2 260 165 ns 290 10 120 s s 20 50 10 35 80 kW/m2 mW/m2 ns mW/m2
Transmitter
IRED Operating Current Output Radiant Intensityd Output Radiant Intensity Half Angle Output Radiant Intensityd Peak Wavelength Voltage drop at output driver Rise Time, Fall Time Optical Overshoot Notes a. Tamb = 25_C, VCC = 2.7 - 5.5 V unless otherwise noted. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. VCC = 5 V, a = 0_, 15_ e. Receiver is inactive as long as SD = High ID Ie Ie P 0.48 140 24 .04 900 800 40 25 0.55 280 A mW/sr _ mW/sr nm mV ns %
Pending--Rev. A, 03-Apr-98
5
Pre-Release Information
TFDU6100E/TFDS6500E/TFDT6500E
Recommended Circuit Diagram
The only required components for designing an IrDA 1.2 compatible design using TEMIC FIR transceivers are a current limiting resistor, R1, to the IRED. However, depending on the entire system design and board layout, additional components may be required (see Figure 1).
300 250
Intensity (mW/sr)
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200 150 100 50
5.25 V, Min. Efficiency, Min. VF, Min. RDSon
TEMIC FIR transceivers integrate a sensitive receiver and a built-in power driver. The combination of both needs a careful circuit board layout. The use of thin, long resistive and inductive wiring should be avoided. The inputs (Txd, SD/Mode) and the output Rxd should be directly (DC) coupled to the I/O circuit.
4.75 V, Min. Efficiency, Min. VF, Max. RDSon
IrDA Field of View: Cone of "15_ 0 4.0 6.0 8.0 10.0 12.0 14.0 16.0
VCC2
Current Control Resistor (W)
TFDx6x00 R2 Rxd Txd GND C1 C2 IRED Cathode Rxd VCC GND IRED Anode Txd SD/Mode NC R1
Figure 2. Ie vs. Rl The placement of these parts is critical. It is strongly recommended to position C2 as near as possible to the transceiver power supply pins. A tantalum capacitor should be used for C1 while a ceramic capacitor is used for C2. Also, when connecting the described circuit to the power supply, low impedance wiring should be used. Table 1. Recommended Application Circuit Components
SC Note: Outlined components are optional depending on quality of power supply.
Component
C1 C2 R1 R2
Recommended Value
4.7 mF, Tantalum 0.1 F, Ceramic 5.6 , 0.25 W (recommend using two 0.125 W resistors in parallel) 47 , 0.125 W
Figure 1. Recommended Application Circuit
R1 is used for controlling the current through the IR emitter. For increasing the output power of the IRED, the value of the resistor should be reduced. Similarly, to reduce the output power of the IRED, the value of the resistor should be increased. For typical values of R1 see Figure 2 . For IrDA compliant operation, a current control resistor of 5.6 is recommended. The upper drive current limitation is dependent on the duty cycle and is given by the absolute maximum ratings on the data sheet.
Mode Switching
The TFDU6100E, TFDS6500E and TFDT6500E powers on in a no default mode, therefore the data transfer rate has to be set by a programming sequence as described below or selected by setting the mode pin. When using the Mode pin, the standby current might be increased to about 50 to 60 A. In standby mode, the mode input should float to minimize standby current. The low frequency mode covers speeds up to 115.2 kbit/s. Signals with higher data rates should be detected in the high frequency mode. Lower data frequency data can also Pending--Rev. A, 03-Apr-98
R2, C1 and C2 are optional and dependent on the quality of the supply voltage VCC and injected noise. An unstable power supply with dropping voltage during transmission may reduce sensitivity (and transmission range) of the transceiver. 6
Pre-Release Information
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TFDU6100E/TFDS6500E/TFDT6500E
2. Set Txd input to logic "HIGH". Wait ts w200 ns. 3. Set SD/MODE to logic "LOW" (this negative edge latches state of Txd, which determines speed setting). 4. After waiting th w200 ns Txd can be set to logic "LOW". The hold time of Txd is limited by the maximum allowed pulse length. Txd is now enabled as normal Txd input for the high bandwidth mode.
received in high frequency mode with reduced sensitivity. To switch the transceivers from low frequency mode to the 4.0 Mbit/s mode and vice versa, the programming sequences described below are required.
SD/Mode ts High Txd Low th
Setting to the Lower Bandwidth Mode (2.4 to 115.2 kbit/s)
High: FIR Low: SIR
Mode Pin
Figure 3. Timing Diagram
Setting to the High Bandwidth Mode (0.576 to 4.0 Mbit/s)
1. Set SD/MODE input to logic "HIGH".
1. Set SD/MODE input to logic "HIGH". 2. Set Txd input to logic "LOW". Wait ts w200 ns. 3. Set SD/MODE to logic "LOW" (this negative edge latches state of Txd, which determines speed setting). 4. Txd must be held for th w200 ns. Txd is now enabled as normal Txd input for the lower bandwidth mode.
Pending--Rev. A, 03-Apr-98
7
Pre-Release Information
TFDU6100E/TFDS6500E/TFDT6500E
TFDU6100E - BabyFace (Universal) Package Mechanical Dimensions
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6100E 125
8
Pending--Rev. A, 03-Apr-98
Pre-Release Information
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TFDU6100E/TFDS6500E/TFDT6500E
TFDS6500E - Side View Package Mechanical Dimensions
TK84 731 TFDS6500
Pending--Rev. A, 03-Apr-98
9
Pre-Release Information
TFDU6100E/TFDS6500E/TFDT6500E
TFDT6500E - Top View Package Mechanical Dimensions
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10
Pending--Rev. A, 03-Apr-98
Pre-Release Information
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TFDU6100E/TFDS6500E/TFDT6500E
Recommended SMD Pad Layouta
TFDU6100E - BabyFace (Universal) Package
0.8
TFDT6500E - Top View Package TFDS6500E - Side View Package
(note: leads of the device should be at least 0.3 mm within the ends of the pads. Pad 1 is longer to designate Pin 1 connection to transceiver.)
a.
The leads of the device should be sodered in the center position pads.
Pending--Rev. A, 03-Apr-98
11
Pre-Release Information
TFDU6100E/TFDS6500E/TFDT6500E
Recommended Solder Profile
260 240 220 200
C)
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10 s Max. @ 230 _C 2 - 4 _C/Seconds
180 160 140 120 100 80 60 40 20 0 0 50 100 150 200 250 300 350 2 - 4 _C/Seconds 120 - 180 Seconds 90 s Max.
Temperature (
_
Time (Seconds)
Current Derating Curve
600
500
Peak Operating Current (mA)
400
300 Current derating as a function of the maximum forward current of IRED. Maximum duty cycle: 25%
200
100
0 -40 -20 0 20 40 60 80 100 120 140
Temperature (_C)
12
Pending--Rev. A, 03-Apr-98
Pre-Release Information

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