View K6X0808C1D-TQ55_64020.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

K6X0808C1D Family
Document Title
32Kx8 bit Low Power CMOS Static RAM
CMOS SRAM
Revision History
Revision No.
0.0 1.0
History
Initial draft Finalized - Changed ICC from 10mA to 5mA - Changed ICC1 from 8mA to 7mA - Changed ICC2 from 35mA to 25mA - Changed ISB from 3mA to 0.4mA - Changed IDR for K6X0808C1D-F 15A to 10A - Changed IDR for K6X0808C1D-Q 25A to 20A - Errata correction
Draft Data
October 09, 2002 December 16, 2003
Remark
Preliminary Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserves the right to change the specifications and products. SAMSUNG Electronics will answer to your questions. If you have any questions, please contact the SAMSUNG branch offices.
1
Revision 1.0 December 2003
K6X0808C1D Family
32Kx8 bit Low Power full CMOS Static RAM
FEATURES
* Process Technology: Full CMOS * Organization: 32K x 8 * Power Supply Voltage: 4.5~5.5V * Low Data Retention Voltage: 2V(Min) * Three state output and TTL Compatible * Package Type: 28-DIP-600B, 28-SOP-450, 28-TSOP1-0813.4F/R
CMOS SRAM
GENERAL DESCRIPTION
The K6X0808C1D families are fabricated by SAMSUNGs advanced CMOS process technology. The families support verious operating temperature ranges and have various package types for user flexibility of system design. The families also support low data retention voltage for battery back-up operation with low data retention current.
PRODUCT FAMILY
Power Dissipation Product Family Operating Temperature Vcc Range Speed Standby (ISB1, Max) 15A 4.5~5.5V K6X0808C1D-Q Automotive(-40~125C) 551)/70ns 25A 25mA Operating (ICC2, Max) PKG Type 28-DIP-600B, 28-SOP-450, 28-TSOP1-0813.4F/R 28-SOP-450, 28-TSOP1-0813.4F
K6X0808C1D-F
Industrial(-40~85C)
1. The parameters are tested with 50pF test load
PIN DESCRIPTION
OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24
FUNCTIONAL BLOCK DIAGRAM
A10 CS I/O8 I/O7 I/O6 I/O5 I/O4 VSS I/O3 I/O2 I/O1 A0 A1 A2
Clk gen.
Precharge circuit.
A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 VSS
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23
VCC WE A13 A8 A9 A11 OE A10 CS I/O8 I/O7 I/O6 I/O5 I/O4
28-TSOP Type1 - Forward
23 22 21 20 19 18 17 16 15
Row Addresses
Row select
Memory array
28-DIP 28-SOP
22 21 20 19 18 17 16 15
A3 A4 A5 A6 A7 A12 A14 VCC WE A13 A8 A9 A11 OE
14 13 12 11 10 9 8 7 6 5 4 3 2 1
15 16 17 18 19 20
28-TSOP Type1 - Reverse
21 22 23 24 25 26 27 28
A2 A1 A0 I/O1 I/O2 I/O3 VSS I/O4 I/O5 I/O6 I/O7 I/O8 CS A10
I/O1 I/O8
Data cont
I/O Circuit Column select
Data cont Column Addresses
Pin Name
CS OE WE A0~A14
Function
Chip Select Input Output Enable Input Write Enable Input Address Inputs
Pin Name
I/O1~I/O8 Vcc Vss NC
Function
CS
Data Inputs/Outputs
WE
Power Ground No connect
OE
Control logic
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. 2
Revision 1.0 December 2003
K6X0808C1D Family
PRODUCT LIST
Industrial Temp. Products(-40~85C) Part Name K6X0808C1D-DF55 K6X0808C1D-DF70 K6X0808C1D-GF55 K6X0808C1D-GF70 K6X0808C1D-TF55 K6X0808C1D-TF70 K6X0808C1D-RF55 K6X0808C1D-RF70 Function 28-DIP, 55ns, LL Pwr 28-DIP, 70ns, LL Pwr 28-SOP, 55ns, LL Pwr 28-SOP, 70ns, LL Pwr 28-TSOP-F, 55ns, LL Pwr 28-TSOP-F, 70ns, LL Pwr 28-TSOP-R, 55ns, LL Pwr 28-TSOP-R, 70ns, LL Pwr
CMOS SRAM
Automotive Temp. Products(-40~125C) Part Name K6X0808C1D-GQ55 K6X0808C1D-GQ70 K6X0808C1D-TQ55 K6X0808C1D-TQ70 Function 28-SOP, 55ns, L Pwr 28-SOP, 70ns, L Pwr 28-TSOP-F, 55ns, L Pwr 28-TSOP-F, 70ns, L Pwr
FUNCTIONAL DESCRIPTION
CS H L L L OE X1) H L X
1)
WE X1) H H L
I/O High-Z High-Z Dout Din
Mode Deselected Output Disabled Read Write
Power Standby Active Active Active
1. X means dont care (Must be in high or low states)
ABSOLUTE MAXIMUM RATINGS1)
Item Voltage on any pin relative to Vss Voltage on Vcc supply relative to Vss Power Dissipation Storage temperature Operating Temperature Symbol VIN,VOUT VCC PD TSTG TA Ratings -0.5 to VCC+0.5V(Max. 7.0V) -0.3 to 7.0 1.0 -65 to 150 -40 to 85 -40 to 125 Unit V V W C C C Remark K6X0808C1D-F K6X0808C1D-Q
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
3
Revision 1.0 December 2003
K6X0808C1D Family
RECOMMENDED DC OPERATING CONDITIONS1)
Item Supply voltage Ground Input high voltage Input low voltage Symbol Vcc Vss VIH VIL Min 4.5 0 2.2 -0.5
3)
CMOS SRAM
Typ 5.0 0 -
Max 5.5 0 Vcc+0.5 0.8
2)
Unit V V V V
Note: 1. Industrial Product: TA=-40 to 85C, Otherwise specified Automotive Product: TA=-40 to 125C, Otherwise specified 2. Overshoot: Vcc+3.0V in case of pulse width30ns. 3. Undershoot: -3.0V in case of pulse width30ns. 4. Overshoot and undershoot are sampled, not 100% tested.
CAPACITANCE1) (f=1MHz, TA=25C)
Item Input capacitance Input/Output capacitance
1. Capacitance is sampled, not 100% tested
Symbol CIN CIO
Test Condition VIN=0V VIO=0V
Min -
Max 8 10
Unit pF pF
DC AND OPERATING CHARACTERISTICS
Item Input leakage current Output leakage current Operating power supply current Average operating current Symbol ILI ILO ICC ICC1 ICC2 Output low voltage Output high voltage Standby Current(TTL) Standby Current (CMOS) VOL VOH ISB ISB1 VIN=Vss to Vcc CS=VIH or OE=VIH or WE=VIL, VIO=VSS to Vcc IIO=0mA, CS=VIL, VIN=VIH or VIL, Read Cycle time=1s, 100% duty, IIO=0mA, CS0.2V, VIN0.2VINVcc -0.2V Cycle time=Min,100% duty, IIO=0mA, CS=VIL, VIN=VIH or VIL IOL=2.1mA IOH=-1.0mA CS=VIH, Other inputs=VIH or VIL CSVcc-0.2V, Other inputs=0~Vcc K6X0808C1D-F K6X0808C1D-Q Test Conditions Min -1 -1 2.4 Typ Max 1 1 5 7 25 0.4 0.4 15 25 Unit A A mA mA mA V V mA A A
4
Revision 1.0 December 2003
K6X0808C1D Family
AC OPERATING CONDITIONS
TEST CONDITIONS (Test Load and Test Input/Output Reference)
Input pulse level: 0.8 to 2.4V Input rising and falling time: 5ns Input and output reference voltage: 1.5V Output load (See right): CL=100pF+1TTL CL=50pF+1TTL CL1)
CMOS SRAM
1. Including scope and jig capacitance
AC CHARACTERISTICS (Vcc=4.5~5.5V, Commercial product: TA=0 to 70C, Industrial product: TA=-40 to 85C)
Speed Bins Parameter List Symbol 55 ns Min Read cycle time Address access time Chip select to output Output enable to valid output Read Chip select to low-Z output Output enable to low-Z output Chip disable to high-Z output Output disable to high-Z output Output hold from address change Write cycle time Chip select to end of write Address set-up time Address valid to end of write Write Write pulse width Write recovery time Write to output high-Z Data to write time overlap Data hold from write time End write to output low-Z
1. The parameter is tested with 50pF test load.
1)
70ns Min 70 10 5 0 0 10 70 60 0 60 50 0 0 30 0 5 Max 70 70 35 30 30 25 -
Units
Max 55 55 25 20 20 20 -
tRC tAA tCO tOE tLZ tOLZ tHZ tOHZ tOH tWC tCW tAS tAW tWP tWR tWHZ tDW tDH tOW
55 10 5 0 0 10 55 45 0 45 40 0 0 25 0 5
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
DATA RETENTION CHARACTERISTICS
Item Vcc for data retention Data retention current Data retention set-up time Recovery time Symbol VDR IDR tSDR tRDR CSVcc-0.2V Vcc=3.0V, CSVcc-0.2V K6X0808C1D-F K6X0808C1D-Q See data retention waveform Test Condition Min 2.0 0 5 Typ Max 5.5 10 20 ms Unit V A
5
Revision 1.0 December 2003
K6X0808C1D Family
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS=OE=VIL, WE=VIH)
tRC Address tOH Data Out Previous Data Valid tAA
CMOS SRAM
Data Valid
TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH)
tRC Address tAA tCO CS tOE OE tOLZ tLZ Data Valid tOHZ tHZ tOH
Data out
NOTES (READ CYCLE)
High-Z
1. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage levels. 2. At any given temperature and voltage condition, tHZ(Max.) is less than tLZ(Min.) both for a given device and from device to device interconnection.
6
Revision 1.0 December 2003
K6X0808C1D Family
TIMING WAVEFORM OF WRITE CYCLE(1) (WE Controlled)
tWC Address tCW(2) CS tAW tWP(1) WE tAS(3) Data in tWHZ Data out Data Undefined tDW Data Valid tDH tWR(4)
CMOS SRAM
tOW
TIMING WAVEFORM OF WRITE CYCLE(2) (CS
Controlled)
tWC Address tAS(3) CS tAW tWP(1) WE tDW Data in Data Valid tDH tCW(2) tWR(4)
Data out
High-Z
High-Z
NOTES (WRITE CYCLE) 1. A write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going Low and WE going low : A write end at the earliest transition among CS going high and WE going high, tWP is measured from the begining of write to the end of write. 2. tCW is measured from the CS going low to the end of write. 3. tAS is measured from the address valid to the beginning of write. 4. tWR is measured from the end or write to the address change. tWR applied in case a write ends as CS or WE going high.
DATA RETENTION WAVE FORM
CS controlled
VCC 4.5V tSDR Data Retention Mode tRDR
2.2V VDR CSVCC - 0.2V CS GND
7
Revision 1.0 December 2003
K6X0808C1D Family
PACKAGE DIMENSIONS
28 PIN DUAL INLINE PACKAGE(600mil)
CMOS SRAM
Units: millimeter(inch)
0.25
+0.10 -0.05
+0.004 0.010-0.002
#28
#15
#1 36.72 MAX 1.446 36.320.20 1.4300.008
#14 0~15 3.810.20 0.1500.008 5.08 0.200 MAX
( 1.65 ) 0.065
0.460.10 0.0180.004 1.520.10 0.0600.004
2.54 0.100
0.38 0.015 MIN
28 PIN PLASTIC SMALL OUTLINE PACKAGE(450mil)
0~8 #28 #15
15.24 0.600 3.300.30 0.1300.012
13.600.20 0.5350.008
11.810.30 0.4650.012
8.380.20 0.3300.008
#1 18.69 0.736 MAX 18.290.20 0.7200.008
#14 2.590.20 0.1020.008 3.00 0.118MAX
11.43 0.450
0.15
+0.10 -0.05 0.006+0.004 -0.002
1.020.20 0.0400.008
0.10 MAX 0.004 MAX
(
0.89 ) 0.035
0.410.10 0.0160.004
1.27 0.050
0.05 MIN 0.002
8
Revision 1.0 December 2003
K6X0808C1D Family
PACKAGE DIMENSIONS
28 PIN THIN SMALL OUTLINE PACKAGE TYPE I (0813.4F)
CMOS SRAM
Units: millimeter(inch)
+0.10 -0.05 0.008+0.004 -0.002
0.20
13.400.20 0.5280.008 #28 ( 8.40 0.331 MAX 8.00 0.315 0.425 ) 0.017
#1
0.55 0.0217
#14
#15 1.000.10 0.0390.004 1.20 0.047 MAX 0.05 0.002 MIN
28 PIN THIN SMALL OUTLINE PACKAGE TYPE I (0813.4R)
0.10 MAX 0.004 MAX
+0.10 -0.05 +0.004 0.008-0.002
0.20
13.400.20 0.5280.008 #15 ( 8.40 0.331 MAX 8.00 0.315 0.425 ) 0.017
#14
0.55 0.0217
#1 0.25 0.010 TYP 11.800.10 0.4650.004
#28
+0.10 -0.05 +0.004 0.006-0.002
0.15
1.000.10 0.0390.004 1.20 0.047 MAX
0~8
0.45 ~0.75 0.018 ~0.030
(
0.50 ) 0.020
9
0.10 MAX 0.004 MAX 0.05 0.002 MIN
Revision 1.0 December 2003

▲Up To Search▲

Price & Availability of K6X0808C1D-TQ55

	To Download K6X0808C1D-TQ55 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .