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Features * * * * * * * * * Supply Voltage: 5 V Low Power Consumption: 15 mA/5 V Output Level and Spurious Products Adjustable (Optional) Excellent Sideband Suppression by Means of Duty Cycle Regeneration of the LO Input Signal Phase-control Loop for Precise 90 Phase Shifting Power-down Mode Low LO Input Level: -15 dBm 50- Single-ended LO and RF Port LO Frequency Range of 30 MHz to 300 MHz Benefits * Low Current Consumption * Few External Components Result in Cost and Board Space Saving * Adjustment Free Hence Saves Time 300-MHz Quadrature Modulator U2793B Electrostatic sensitive device. Observe precautions for handling. Description The IC U2793B is a 300-MHz quadrature modulator that uses Atmel`s advanced UHF process. It features low current consumption, single-ended RF ports and adjustmentfree application, which makes the device suitable for all digital radio systems, e.g., GSM, PCN, JDC and WLAN. As an option, output level and spurious products are adjustable at pins 19 and 20. In conjunction with Atmel's U2795B mixer, an up-converter up to 2 GHz can be realized. Figure 1. Block Diagram SPD BBAi BBAi 10 9 8 PU 1 LOi LOi 14 Duty cycle 15 regenerator Frequency doubler 0 90 90 control loop Power 6,7 VS up VRef 13 19 LP2 LP1 20 RFo 4 BBBi BBBi 11 12 3,16,17,18 GND 2 5 ACGND ACGND Rev. 4651C-CELL-07/04 Pin Configuration Figure 2. Pinning SSO20 PU ACGND GND RFO ACGND VS VS SPU BBAI BBAI 1 2 3 4 5 U2793B 6 7 8 9 10 15 14 13 12 11 LOI LOI VREF BBBI BBBI 20 19 18 17 16 LP1 LP2 GND GND GND 2 U2793B 4651C-CELL-07/04 U2793B Pin Description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Symbol PU ACGND GND RFO ACGND VS VS SPU BBAI BBAI BBBI BBBI VREF LOI LOI GND GND GND LP2 LP1 Function Power-up input AC ground Ground RF output AC ground Supply voltage Supply voltage Settling time power-up Baseband input A Baseband input A inverse Baseband input B Baseband input B inverse Reference voltage (2.5 V) Input LO Input LO inverse, typically grounded Ground Ground Ground Output low pass and power control Output low pass and power control 3 4651C-CELL-07/04 Absolute Maximum Ratings Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Supply voltage Input voltage Junction temperature Storage temperature range Symbol VS Vi Tj TStg Value 6 0 to VS 125 -40 to +125 Unit V V C C Thermal Resistance Parameters Junction ambient SSO20 Symbol RthJA Value 140 Unit K/W Operating Range Parameters Supply voltage Ambient temperature range Symbol VS Tamb Value 4.5 to 5.5 -40 to +85 Unit V C Electrical Characteristics Test conditions (unless otherwise specified); VS = 5 V, Tamb = 25C, referred to test circuit. System impedance Zo = 50 , fLO =150 MHz, PLO = -15 dBm, VBBi = 1.0 Vpp, differential No. 1.1 1.2 2 2.1 2.2 2.3 3 3.1 3.2 3.3 3.4 3.5 Notes: Parameters Supply voltage range Supply current Baseband Inputs, Pin 9-10, 11-12 Input-voltage range (differential) Input impedance Input-frequency range LO Input, Pins 14 and 15 Frequency range Input level(1) Input impedance Voltage standing wave ratio Duty-cycle range fLOi PLOi ZiLO VSWRLO DCRLO 0.4 30 -15 (2) Test Conditions Pin 6, 7 6, 7 Symbol VS IS Min. 4.5 Typ. 5 15 Max. 5.5 Unit V mA Type* A A VBBi ZBBi fBBi 0 1000 30 1500 mVpp k D D D D D D D D 50 300 -5 MHz MHz dBm 3.5 0.6 1. Required LO level is a function of the LO frequency. 2. The LO input impedance is consisting of a 50 resistor in series with a 15 pF capacitor. 3. With the pins 19 and 20 spurious performance especially for low frequency application can be improved by adding a chip capacitor between LP1 and LP2. In conjunction with a parallel resistor the output level can be adjusted to the following mixer stage without degration of LO suppression and noise performance which would decrease if the I/Q input level is reduced 4. For Tamb = -40C to +85C and VS = 4.5 V to 5.5 V 4 U2793B 4651C-CELL-07/04 U2793B Electrical Characteristics (Continued) Test conditions (unless otherwise specified); VS = 5 V, Tamb = 25C, referred to test circuit. System impedance Zo = 50 , fLO =150 MHz, PLO = -15 dBm, VBBi = 1.0 Vpp, differential (Continued) No. 4 Parameters RF Output, Pin 4 fLO = 150 MHz, VBBi = 1 Vpp, differential fLO = 50 MHz, VBBi = 0.3 Vpp, differential PLO = -20 dBM (3) Test Conditions Pin Symbol Min. -3 Typ. -1 0 Max. +2 Unit Type* 4.1 Output level PRFo LORFO VSWRRF SBSRFo Pe Ae 35 32 dBm A/B 4.2 4.3 4.4 4.5 4.6 4.7 5 5.1 5.2 6 6.1 7 7.1 7.2 Notes: LO suppression Voltage standing wave ratio Sideband suppression Phase error (4) 45 1.4 45 <1 < 0.25 -137 -143 2 dB dB deg dB dBm/Hz A D A D D D Amplitude error Noise floor Power-up Mode Supply current Settling time Switching Voltage, Pin 1 Power on Reference Voltage, Pin 13 Voltage range Output impedance VPU 0.5 V, pins 6, 7 VPU = 1 V Pins 1 to 4, CSPU = 100 pF CLO = 100 pF, CRFo = 1 nF VBBi = 2 V, VBBi = 3 V VBBi = VBBi = 2.5 V NFL IPU tSPU 10 10 1 A s D D VPUON VRef ZoRef 4 2.375 2.5 30 2.625 V V D A D 1. Required LO level is a function of the LO frequency. 2. The LO input impedance is consisting of a 50 resistor in series with a 15 pF capacitor. 3. With the pins 19 and 20 spurious performance especially for low frequency application can be improved by adding a chip capacitor between LP1 and LP2. In conjunction with a parallel resistor the output level can be adjusted to the following mixer stage without degration of LO suppression and noise performance which would decrease if the I/Q input level is reduced 4. For Tamb = -40C to +85C and VS = 4.5 V to 5.5 V 5 4651C-CELL-07/04 Figure 3. Reference Voltage versus Tamb 2.57 2.56 2.55 VRef (V) 2.54 2.53 2.52 2.51 2.5 -40 0 40 Temperature (C) 80 120 Figure 4. OIP3 versus Tamb, LO = 150 MHz, Level -10 dBm 8 6 IP3 (dBm) 4 2 0 -40 0 40 Temperature (C) 80 120 Figure 5. Supply Current versus Tamb 20 16 Supply Current (mA) 12 8 4 0 -40 0 40 Temperature (C) 80 120 6 U2793B 4651C-CELL-07/04 U2793B Figure 6. Recommended LO Power Range versus LO Frequency at Tamb = 25 C 0 -10 PLO (dBm) -20 -30 -40 0 50 100 150 200 250 300 fLO (MHz) Figure 7. Output Power versus Tamb 0 -0.4 Output Power (dBm) -0.8 -1.2 -1.6 -2 -40 0 40 Temperature (C) 80 120 Figure 8. Typical Output Power versus LO Frequency at Tamb = 25 C, VBBi = 250 mV (Differential) 0 Output Power (dBm) -4 -8 -12 -16 0 50 100 150 200 250 300 fLO (MHz) 7 4651C-CELL-07/04 Figure 9. Typical Required VBBi Input Signal (Differential) versus LO Frequency for PO = 1 dBm and PO = -3 dBm 1200 PO = 1 dBm 1000 PO = 0 dBm VBBI (mVpp) 800 600 400 200 0 0 50 100 150 200 250 300 fLO (MHz) PO = 3 dBm Figure 10. Evaluation Board Circuitry C1 1 C2 2 19 20 C9 R1 L1 PU 3 C3 OUT C4 5 U2793B L2 C5 6 4 18 17 16 C7 15 VS 7 14 C8 LO 8 C6 9 13 12 10 11 A Ainv GND B VRef Binv 8 U2793B 4651C-CELL-07/04 U2793B Part List C1, C2, C3, C4, C6 C7, C8 C5 C9, R1 1 nF 100 pF 100 nF 1 pF to 10 pF 50- Microstrip optional The above listed components result in a PD settling time of < 20 s. The use of other component values will require consideration for time requirements in burst-mode applications. Figure 11. PCB Layout Evaluation Board 9 4651C-CELL-07/04 Application Circuits Bias network for AC-coupled baseband inputs (VBA, VBB). R1 = 2.5 k, R2 10 k for 35 dB LO suppression which is in reference to < 2 mV input offset. Figure 12. Application Circuit with AC-coupled Baseband Inputs R1 VRef R2 10 BBAi BBAi LOi LOi 14 15 Duty cycle regenerator Frequency doubler 0 90 90 control loop 9 13 1n PU 1 Power up 6,7 VS 8 SPU 19 LP2 LP1 RFo ACGND BBBi BBBi 11 12 3,16,17,18 GND 2 5 ACGND Power down 100n 20 4 Figure 13. Application Circuit with DC-coupled Baseband Inputs 1n PU 1 Power up Power down 6,7 VS 8 SPU 19 Duty cycle regenerator Frequency doubler 0 90 90 control loop LP2 LP1 1n OUT 1n 1n 2 1n 3,16,17,18 GND 5 ACGND 100n VRef 100n 10 10k BBAi 9 13 Baseband processing 10k BBAi 100p LOi 14 LO LOi 15 20 4 RFo ACGND 10k 10k 100n BBBI 11 BBBI 12 10 U2793B 4651C-CELL-07/04 U2793B Ordering Information Extended Type Number U2793B-MFS U2793B-MFSG3 U2793B-NFSH U2793B-NFSG3H Package SSO20 SSO20 SSO20 SSO20 Remarks Tube Taped and reeled Tube, lead free Taped and reeled, lead free Package Information 11 4651C-CELL-07/04 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France Tel: (33) 4-76-58-30-00 Fax: (33) 4-76-58-34-80 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 ASIC/ASSP/Smart Cards Zone Industrielle 13106 Rousset Cedex, France Tel: (33) 4-42-53-60-00 Fax: (33) 4-42-53-60-01 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel: (44) 1355-803-000 Fax: (44) 1355-242-743 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Literature Requests www.atmel.com/literature Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company's standard warranty which is detailed in Atmel's Terms and Conditions located on the Company's web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel's products are not authorized for use as critical components in life support devices or systems. (c) Atmel Corporation 2004. All rights reserved. Atmel (R) and combinations thereof are the registered trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be the trademarks of others. Printed on recycled paper. 4651C-CELL-07/04 |
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