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August 1996 NDT014L N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes.Thesedevices are particularly suited for low voltage applications such as DC motor control and DC/DC conversion where fast switching, low in-line power loss, and resistance to transients are needed. Features 2.8 A, 60 V. RDS(ON) = 0.2 @ VGS = 4.5 V RDS(ON) = 0.16 @ VGS = 10 V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. _________________________________________________________________________________ D D G D S G S Absolute Maximum Ratings Symbol VDSS VGSS ID Parameter Drain-Source Voltage Gate-Source Voltage Drain Current T A = 25C unless otherwise noted NDT014L 60 20 (Note 1a) Units V V A - Continuous - Pulsed 2.8 10 PD Maximum Power Dissipation (Note 1a) (Note 1b) (Note 1c) 3 1.3 1.1 -65 to 150 W TJ,TSTG Operating and Storage Temperature Range C THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 42 12 C/W C/W (c) 1997 Fairchild Semiconductor Corporation NDT014L Rev.D Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS IDSS IGSSF IGSSR VGS(th) RDS(ON) Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = 250 A VDS = 60 V, VGS = 0 V TJ = 55C Gate - Body Leakage, Forward Gate - Body Leakage, Reverse VGS = 20 V, VDS = 0 V VGS = -20 V, VDS= 0 V VDS = VGS, ID = 250 A TJ = 125C Static Drain-Source On-Resistance VGS= 4.5 V, ID = 2.8 A TJ = 125C VGS = 10 V, ID = 3.4 A ID(on) GFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd On-State Drain Current VGS = 4.5 V , VDS = 5 V VGS = 10 V, VDS = 5 V Forward Transconductance VGS = 5 V, ID = 2.8 A VDS = 30 V, VGS = 0 V, f = 1.0 MHz DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 214 70 27 pF pF pF 5 10 4.2 S 1 0.8 1.5 1.1 0.17 0.22 0.12 60 25 250 100 -100 V A A nA nA ON CHARACTERISTICS (Note 2) Gate Threshold Voltage 3 2 0.2 0.36 0.16 A V SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 10 V, ID = 2.8 A, VGS = 4.5 V VDD = 30 V, ID = 3 A, VGEN = 10 V, RGEN = 12 6 14 15 10 3.6 0.8 1.4 12 25 28 18 5 ns ns ns ns nC nC nC NDT014L Rev.D Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS VSD trr Notes: 1. Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time PD (t) = VGS = 0 V, IS = 2.3 A (Note 2) VGS = 0 V, IF = 2.3 A dIF/dt = 100 A/s 0.85 2.3 1.3 140 A V ns T J -T A T J -T A = R JC+R CA (t) = I 2 (t) x R DS(ON)@T J RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the D R JA(t) solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is defined by users. For general reference: Applications on 4.5"x5" FR-4 PCB under still air environment, typical RJA is found to be: a. 42oC/W with 1 in2 of 2 oz copper mounting pad. b. 95oC/W with 0.066 in2 of 2 oz copper mounting pad. c. 110oC/W with 0.0123 in2 of 2 oz copper mounting pad. 1a 1b 1c Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%. NDT014L Rev.D Typical Electrical Characteristics 10 2 6.0 8 4.5 4.0 R DS(on) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE , DRAIN-SOURCE CURRENT (A) VGS = 10V 5.0 1.75 1.5 VGS =3.0V 3.5 6 3.5 1.25 4.0 4.5 5.0 6.0 10 4 3.0 1 D 2 2.5 0 0 1 2 3 VDS, DRAIN-SOURCE VOLTAGE (V) 4 5 0.75 I 0.5 0 2 4 6 I , DRAIN CURRENT (A) D 8 10 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Gate Voltage and Drain Current. 1.75 2 I D = 2.8A DRAIN-SOURCE ON-RESISTANCE V 1.75 GS = 4.5V TJ = 125C DRAIN-SOURCE ON-RESISTANCE R DS(on) , NORMALIZED 1.5 V GS = 4.5V R DS(ON) , NORMALIZED 1.5 1.25 1.25 25C 1 1 0.75 0.75 -55C 0.5 -50 -25 0 25 50 75 100 T , JUNCTION TEMPERATURE (C) J 125 150 0.5 0 2 4 6 I , DRAIN CURRENT (A) D 8 10 Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Drain Current and Temperature. 10 VDS = 5V 8 I D , DRAIN CURRENT (A) T = -55C J 25C 125C VGS(th) , NORMALIZED GATE-SOURCE THRESHOLD VOLTAGE 1.2 1.1 VDS = VGS I D = 250A 6 1 4 0.9 2 0.8 0 0 1 V GS 2 3 4 5 6 0.7 -50 -25 , GATE TO SOURCE VOLTAGE (V) 0 25 50 75 100 T , JUNCTION TEMPERA TURE (C) J 125 150 Figure 5. Transfer Characteristics. Figure 6. Gate Threshold Variation with Temperature. NDT014L Rev.D Typical Electrical Characteristics 1.12 10 DRAIN-SOURCE BREAKDOWN VOLTAGE I D = 250A 1.08 V GS = 0V I , REVERSE DRAIN CURRENT (A) 1 BV DSS , NORMALIZED T J = 125C 0.1 1.04 25C 0.01 1 -55C 0.001 0.96 0.92 -50 -25 0 25 50 75 100 T J , JUNCTION TEMPERATURE (C) 125 150 S 0.0001 0.2 0.4 0.6 0.8 1 V SD , BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 7. Breakdown Voltage Variation with Temperature. Figure 8. Body Diode Forward Voltage Variation with Current and Temperature. 700 500 , GATE-SOURCE VOLTAGE (V) 10 I D = 2.8A V DS = 5V 20V 10V Ciss CAPACITANCE (pF) 200 8 Coss 100 50 6 4 10 0.1 V 20 f = 1 MHz V GS = 0V Crss GS 2 0.2 0.5 V DS 1 2 5 10 , DRAIN TO SOURCE VOLTAGE (V) 20 40 60 0 0 2 Q g 4 6 , GATE CHARGE (nC) 8 10 Figure 9. Capacitance Characteristics. Figure 10. Gate Charge Characteristics. V DD t on t d(on) tr 90% t off t d(off) 90% tf V IN D RL V OUT VGS R GEN VOUT G DUT 10% 10% INVERTED 90% S V IN 10% 50% 50% PULSE WIDTH Figure 11. Switching Test Circuit. Figure 12. Switching Waveforms. NDT014L Rev.D Typical Thermal Characteristics 8 STEADY-STATE POWER DISSIPATION (W) 3.5 gFS, TRANSCONDUCTANCE (SIEMENS) VDS = 5V T = -55C J 25C 1a 3 6 2.5 4 2 125C 1.5 1b 1c 2 1 4.5"x5" FR-4 Board TA = 2 5 C Still Air o 0 0.5 0 0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 ) 1 0 2 4 6 I , DRAIN CURRENT (A) D 8 10 Figure 13. Transconductance Variation with Drain Current and Temperature. Figure 14. SOT-223 Maximum Steady- State Power Dissipation versus Copper Mounting Pad Area. 4 20 10 5 IT IM )L ON S( RD ID , STEADY-STATE DRAIN CURRENT (A) 10u 100 10 10 ms s us s I D , DRAIN CURRENT (A) 3 1a 1 0.5 2 1c 1b 0m VGS = 4.5V 0.1 0.05 1 4 .5"x5" FR-4 Board T A = 25 o C = 4.5V Still Air V GS SINGLE PULSE R JA =See Note1c T A = 25C 1s 10s DC 0 0 0.1 0.2 0.3 0.4 2 2oz COPPER MOUNTING PAD AREA (in ) 0.5 0.01 0.1 0.5 1 2 5 10 VDS , DRAIN-SOURCE VOLTAGE (V) 30 50 80 Figure 15. Maximum Steady- State Drain Current versus Copper Mounting Pad Area. 1 0.5 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE D = 0.5 0.2 0.1 0.05 0.02 0.01 Figure 16. Maximum Safe Operating Area. 0.2 0.1 0.05 0.02 0.01 0.005 R JA (t) = r(t) * R JA R JA = See Note 1 c P(pk) t1 t2 Single Pulse 0.002 0.001 0.0001 0.001 0.01 0.1 t 1 , TIME (sec) 1 TJ - TA = P * R (t) JA Duty Cycle, D = t 1 / t 2 10 100 300 Figure 17. Typical Transient Thermal Impedance Curve. Remark: Thermal characterization performed under the conditions of Note 1c. Should better thermal design employs, RJA will be lower and reach thermal equivalent sooner. NDT014L Rev.D SOT-223 Tape and Reel Data and Package Dimensions SOT-223 Packaging Configuration: Figure 1.0 Customized Label Packaging Description: SOT-223 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or 177cm diameter reel. This and some other options are further described in the Packaging Information table. These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped. F63TNR Label Antistatic Cover Tape Static Dissipative Embossed Carrier Tape F852 014 SOT-223 Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard (no flow code) TNR 2,500 13" Dia 343x64x343 5,000 0.1246 0.7250 D84Z TNR 500 7" Dia 184x187x47 1,000 0.1246 0.1532 F852 014 F852 014 F852 014 SOT-223 Unit Orientation 343mm x 342mm x 64mm Intermediate box for Standard F63TNR Label F63TNR Label 184mm x 184mm x 47mm Pizza Box for D84Z Option F63TNR Label sample LOT: CBVK741B019 FSID: PN2222A QTY: 3000 SPEC: SOT-223 Tape Leader and Trailer Configuration: Figure 2.0 D/C1: D9842 D/C2: QTY1: QTY2: SPEC REV: CPN: N/F: F (F63TNR)3 Carrier Tape Cover Tape Components Trailer Tape 300mm minimum or 38 empty pockets Leader Tape 500mm minimum or 62 empty pockets September 1999, Rev. B SOT-223 Tape and Reel Data and Package Dimensions, continued SOT-223 Embossed Carrier Tape Configuration: Figure 3.0 T E1 P0 D0 F K0 Wc B0 E2 W Tc A0 P1 D1 User Direction of Feed Dimensions are in millimeter Pkg type SOT-223 (12mm) A0 6.83 +/-0.10 B0 7.42 +/-0.10 W 12.0 +/-0.3 D0 1.55 +/-0.05 D1 1.50 +/-0.10 E1 1.75 +/-0.10 E2 10.25 min F 5.50 +/-0.05 P1 8.0 +/-0.1 P0 4.0 +/-0.1 K0 1.88 +/-0.10 T 0.292 +/0.0130 Wc 9.5 +/-0.025 Tc 0.06 +/-0.02 Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C). 20 deg maximum Typical component cavity center line 0.5mm maximum B0 20 deg maximum component rotation 0.5mm maximum Sketch A (Side or Front Sectional View) Component Rotation A0 Sketch B (Top View) Typical component center line Sketch C (Top View) Component lateral movement SOT-223 Reel Configuration: Figure 4.0 Component Rotation W1 Measured at Hub Dim A Max Dim A max Dim N See detail AA 7" Diameter Option B Min Dim C See detail AA W3 Dim D min 13" Diameter Option W2 max Measured at Hub DETAIL AA Dimensions are in inches and millimeters Tape Size 12mm Reel Option 7" Dia Dim A 7.00 177.8 13.00 330 Dim B 0.059 1.5 0.059 1.5 Dim C 512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2 Dim D 0.795 20.2 0.795 20.2 Dim N 5.906 150 7.00 178 Dim W1 0.488 +0.078/-0.000 12.4 +2/0 0.488 +0.078/-0.000 12.4 +2/0 Dim W2 0.724 18.4 0.724 18.4 Dim W3 (LSL-USL) 0.469 - 0.606 11.9 - 15.4 0.469 - 0.606 11.9 - 15.4 12mm 13" Dia July 1999, Rev. B SOT-223 Tape and Reel Data and Package Dimensions, continued SOT-223 (FS PKG Code 47) 1:1 Scale 1:1 on letter size paper Part Weight per unit (gram): 0.1246 September 1999, Rev. C TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM GTOTM HiSeCTM DISCLAIMER ISOPLANARTM MICROWIRETM POPTM PowerTrenchTM QFETTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 TinyLogicTM UHCTM VCXTM FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. |
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