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LTC1151 Dual 15V Zero-Drift Operational Amplifier
FEATURES
s s s s s s s s s s s s
DESCRIPTIO
Maximum Offset Voltage Drift: 0.05V/C High Voltage Operation: 18V No External Components Required Maximum Offset Voltage: 5V Low Noise: 1.5VP-P (0.1Hz to 10Hz) Minimum Voltage Gain: 125dB Minimum CMRR: 106dB Minimum PSRR: 110dB Low Supply Current: 0.9mA/Amplifier Single Supply Operation: 4.75V to 36V Input Common-Mode Range Includes Ground Typical Overload Recovery Time: 20ms
The LTC1151 is a high voltage, high performance dual zero-drift operational amplifier. The two sample-and-hold capacitors per amplifier required externally by other chopper amplifiers are integrated on-chip. The LTC1151 also incorporates proprietary high voltage CMOS structures which allow operation at up to 36V total supply voltage. The LTC1151 has a typical offset voltage of 0.5V, drift of 0.01V/C, 0.1Hz to 10Hz input noise voltage of 1.5VP-P, and a typical voltage gain of 140dB. It has a slew rate of 3V/s and a gain-bandwidth product of 2.5MHz with a supply current of 0.9mA per amplifier. Overload recovery times from positive and negative saturation are 3ms and 20ms, respectively. The LTC1151 is available in a standard 8-lead plastic DIP package as well as a 16-lead wide body SO. The LTC1151 is pin compatible with industry-standard dual op amps and runs from standard 15V supplies, allowing it to plug in to most standard bipolar op amp sockets while offering significant improvement in DC performance.
APPLICATI
s s s s s s
S
Strain Gauge Amplifiers Instrumentation Amplifiers Electronic Scales Medical Instrumentation Thermocouple Amplifiers High Resolution Data Acquisition
TYPICAL APPLICATI
15V Dual Thermocouple Amplifier
51 100* 240k 15V
60
0.1F
50
NOISE VOLTAGE (nV/Hz)
0.1F 6 15V VIN K 7 LT1025 3 VO GND 4 R- 5 470k -15V TYPE K 2
-
8 7 OUTPUT A 100mV/C
40 30 20 10
-
+
2k
5
1/2 LTC1151
+
240k
51 100*
-
0.1F 1 OUTPUT B 100mV/C
0 1 10 100 1k FREQUENCY (Hz) 10k
1151 TA02
-
+
2k
3
1/2 LTC1151 4
+
0.1F TYPE K * FULL SCALE TRIM: TRIM FOR 10.0V OUTPUT WITH THERMOCOUPLE AT 100C -15V
1151 TA01
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Noise Spectrum
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1
LTC1151 ABSOLUTE
(Note 1)
AXI U
RATI GS
Operating Temperature Range LTC1151C............................................... 0C to 70C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
Total Supply Voltage (V + to V -) ............................. 36V Input Voltage (Note 2) .......... (V + + 0.3V) to (V - - 0.3V) Output Short Circuit Duration ......................... Indefinite Burn-In Voltage ...................................................... 36V
PACKAGE/ORDER I FOR ATIO
TOP VIEW OUT A 1 -IN A 2 +IN A 3 V- 4 8 7 6 5 V+ OUT B -IN B +IN B
ORDER PART NUMBER LTC1151CN8
N8 PACKAGE 8-LEAD PLASTIC DIP
TJMAX = 110C, JA = 130C/ W
ELECTRICAL CHARACTERISTICS
PARAMETER Input Offset Voltage Average Input Offset Drift Long Term Offset Voltage Drift Input Offset Current Input Bias Current Input Noise Voltage Input Noise Current Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large-Signal Voltage Gain TA = 25C CONDITIONS TA = 25C (Note 3) (Note 3)
VS = 15V, TA = Operating Temperature Range, unless otherwise specified.
MIN
q
TA = 25C
q
RS = 100, 0.1Hz to 10Hz RS = 100, 0.1Hz to 1Hz f = 10Hz (Note 4) Positive Negative VCM = V - to 12V VS = 2.375V to 16V RL = 10k, VOUT = 10V
q q q q q
2
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W
WW
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W
TOP VIEW NC NC OUT A -IN A +IN A V- NC NC 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 S PACKAGE 16-LEAD PLASTIC SOL NC NC V+ OUT B -IN B +IN B NC NC
ORDER PART NUMBER LTC1151CS
TJMAX = 110C, JA = 200C/ W
LTC1151C TYP 0.5 0.01 50 20
MAX 5 0.05 200 0.5 100 0.5
UNITS V V/C nV/mo pA nA pA nA VP-P VP-P fA/Hz V V dB dB dB
q
15 1.5 0.5 2.2 12 -15 106 110 125 13.2 -15.3 130 130 140
LTC1151
VS = 15V, TA = Operating Temperature Range, unless otherwise specified.
PARAMETER Maximum Output Voltage Swing CONDITIONS RL = 10k, TA = 25C RL = 10k RL = 100k RL = 10k, CL = 50pF No Load, TA = 25C No Load
q
ELECTRICAL CHARACTERISTICS
MIN
LTC1151C TYP
MAX
UNITS V V V V/s MHz
13.5 14.50 +10.5/-13.5 14.95 2.5 2 0.9 1.5 2.0
Slew Rate Gain-Bandwidth Product Supply Current per Amplifier Internal Sampling Frequency
q
mA mA Hz
1000
VS = 5V, TA = Operating Temperature Range, unless otherwise specified.
Input Offset Voltage Average Input Offset Drift Long Term Offset Voltage Drift Input Offset Current Input Bias Current Input Noise Voltage Input Noise Current Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large-Signal Voltage Gain Maximum Output Voltage Swing Slew Rate Gain Bandwidth Product Supply Current per Amplifier Internal Sampling Frequency The * denotes the specifications which apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which life of the device may be impaired. Note 2: Connecting any terminal to voltages greater than V + or less than V - may cause destructive latch-up. It is recommended that no sources operating from external supplies be applied prior to power-up of the LTC1151. No Load, TA = 25C
q
TA = 25C (Note 3) (Note 3) TA = 25C TA = 25C RS = 100, 0.1Hz to 10Hz RS = 100, 0.1Hz to 1Hz f = 10Hz (Note 4) Positive Negative VCM = 0V to 2.7V VS = 2.375V to 16V RL = 10k, VOUT = 0.3V to 4.5V RL = 10k to GND RL = 100k to GND RL = 10k, CL = 50pF
q q q
0.05 0.01 50 10 5 2.0 0.7 1.3 2.7 0 110 110 115 130 140 4.85 4.97 1.5 1.5 0.5 750 3.2 - 0.3
5 0.05 100 50
V V/C nV/mo pA pA VP-P VP-P fA/Hz V V dB dB dB V V V/s MHz
1.0 1.5
mA mA Hz
Note 3: These parameters are guaranteed by design. Thermocouple effects preclude measurement of these voltage levels in high speed automatic test systems. VOS is measured to a limit determined by test equipment capability. Note 4: Current Noise is calculated from the formula: IN = (2q * Ib) where q = 1.6 x 10 -19 Coulomb.
3
LTC1151
TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current vs Supply Voltage
2.5 TA = 25C
TOTAL SUPPLY CURRENT (mA)
COMMON-MODE RANGE (V)
2.0
TOTAL SUPPLY CURRENT (mA)
1.5
1.0
0.5
0 4 8 12 16 20 24 28 32 TOTAL SUPPLY VOLTAGE (V) 36
Output Short-Circuit Current vs Supply Voltage
6
SHORT-CIRCUIT OUTPUT CURRENT (mA)
4 2 0 -3 -6 -9 -12 -15 4
TA = 25C
VOUT = V - ISOURCE
OUTPUT VOLTAGE (VP-P)
CMRR (dB)
VOUT = V + ISINK
12 16 20 24 28 32 36 8 TOTAL SUPPLY VOLTAGE, V + TO V - (V)
1151 G04
Gain and Phase vs Frequency
100 80 VS = 15V CL = 100pF PHASE GAIN
100
GAIN (dB)
60 40
60 40
45 0
GAIN
45 0
PSRR (dB)
GAIN (dB)
20 -45 0 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M
1151 G07
4
UW
1151 G01
Supply Current vs Temperature
2.00 VS = 15V
10 5 0 -5 -10 15
Common-Mode Input Voltage Range vs Supply Voltage
TA = 25C
1.75
1.50
1.25 0 10 20 40 50 TEMPERATURE (C) 30 60 70
-15 0 2.5 5.0 7.5
10.0 12.5 15.0
1151 G03
SUPPLY VOLTAGE (V)
1151 G02
Undistorted Output Swing vs Frequency
30 25 20 15 10 5
CMRR vs Frequency
160 140 120 100 80 60 40 VS = 15V
VS = 15V RL = 10k 1k 10k 100k FREQUENCY (Hz) 1M
1151 G05
20 0 1 10 100 1k FREQUENCY (Hz) 10k 100k
1151 G06
0 100
Gain and Phase vs Frequency
160
135
80 VS = 2.5V CL = 100pF PHASE 135 90
PSRR vs Frequency
140 120 100 80 60 40
-45
VS = 15V POSITIVE SUPPLY
90
PHASE (DEG)
PHASE (DEG)
NEGATIVE SUPPLY
20 0 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M
1151 G08
20 0 1 10 100 1k FREQUENCY (Hz) 10k 100k
1151 G09
LTC1151
TYPICAL PERFOR A CE CHARACTERISTICS
Input Bias Current Magnitude vs Temperature
1000 VCM = 0 VS = 15V
INPUT BIAS CURRENT (pA)
INPUT BIAS CURRENT (pA) 18 15 12 9 6 3 TA = 25C VCM = 0V
INPUT BIAS CURRENT (pA)
100
10
1 -50
-25
25 50 75 0 TEMPERATURE (C)
0.1Hz to 10Hz Noise
VS = 15V TA = 25C
1V
1s
Small-Signal Transient Response
5V/DIV
50mV/DIV
2V/DIV
2ms/DIV VS = 15V, AV = 1 CL = 100pF, RL = 10k
1151 G14
VS = 15V, AV = 1 CL = 100pF, RL = 10k
2ms/DIV
1151 G15
2V/DIV
UW
100 125
1151 G10
Input Bias Current Magnitude vs Supply Voltage
60 45 30
Input Bias Current vs Input Common-Mode Voltage
VS = 15V TA = 25C -IB 15 0 -15 +IB -30 -45
0 0 2 4 6 8 10 12 14 16 SUPPLY VOLTAGE (V)
1151 G11
-60 -15
-5 5 10 -10 0 INPUT COMMON-MODE VOLTAGE (V)
15
1151 G12
10s
1151 G13
Large-Signal Transient Response
Negative Overload Recovery
5 0 0
2ms/DIV VS = 15V, AV = -100 NOTE: POSITIVE OVERLOAD RECOVERY IS TYPICALLY 3ms.
1151 G16
5
LTC1151
TEST CIRCUITS
Offset Voltage Test Circuit
1M
100pF
DC-10Hz Noise Test Circuit
100k
1k 2 V+ 7 6
5V 2
OUTPUT RL
5V 2 6 800k 3
- +
LTC1151 3 4 V-
10 3
- +
7
-
8 1 800k
0.04F 800k
6
-
1/2 LT1057 7 OUTPUT
LTC1151 4 -5V
1/2 LT1057
+4
-5V
5
+
1151 TC01
0.02F
0.01F
1151 TC02
APPLICATI
Picoamperes
S I FOR ATIO
ACHIEVING PICOAMPERE/MICROVOLT PERFORMANCE
In order to realize the picoampere level of accuracy of the LTC1151 proper care must be exercised. Leakage currents in circuitry external to the amplifier can significantly degrade performance. High quality insulation should be used (e.g., Teflon); cleaning of all insulating surfaces to remove fluxes and other residues will probably be necessary, particularly for high temperature performance. Surface coating may be necessary to provide a moisture barrier in high humidity environments. Board leakage can be minimized by encircling the input connections with a guard ring operated at a potential close to that of the inputs: in inverting configurations the guard ring should be tied to ground; in noninverting connections to the inverting input. Guarding both sides of the printed circuit board is required. Bulk leakage reduction depends on the guard ring width. Microvolts Thermocouple effects must be considered if the LTC1151's ultra low drift is to be fully utilized. Any connection of dissimilar metals forms a thermoelectric junction producing an electric potential which varies with temperature (Seebeck effect). As temperature sensors, thermocouples exploit this phenomenon to produce useful information. In low drift amplifier circuits the effect is a primary source of error.
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Connectors, switches, relay contacts, sockets, resistors, solder, and even copper wire are all candidates for thermal EMF generation. Junctions of copper wire from different manufacturers can generate thermal EMFs of 200nV/C; four times the maximum drift specification of the LTC1151. Minimizing thermal EMF-induced errors is possible if judicious attention is given to circuit board layout and component selection. It is good practice to minimize the number of junctions in the amplifier's input signal path. Avoid connectors, sockets, switches, and relays where possible. In instances where this is not possible, attempt to balance the number and type of junctions so that differential cancellation occurs. Doing this may involve deliberately introducing junctions to offset unavoidable junctions. Figure 1 is an example of the introduction of an unnecessary resistor to promote differential thermal balance. Maintaining compensating junctions in close physical proximity will keep them at the same temperature and reduce thermal EMF errors. When connectors, switches, relays and/or sockets are necessary they should be selected for low thermal EMF activity. The same techniques of thermally balancing and coupling the matching junctions are effective in reducing the thermal EMF errors of these components.
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LTC1151
APPLICATI
S I FOR ATIO
LEAD WIRE/SOLDER COPPER TRACE JUNCTION
NOMINALLY UNNECESSARY RESISTOR USED TO THERMALLY BALANCE OTHER INPUT RESISTOR
+
LTC1151 OUTPUT
-
RESISTOR LEAD, SOLDER, COPPER TRACE JUNCTION
Figure 1. Extra Resistors Cancel Thermal EMF
Resistors are another source of thermal EMF errors. Table 1 shows the thermal EMF generated for different resistors. The temperature gradient across the resistor is important, not the ambient temperature. There are two junctions formed at each end of the resistor and if these junctions are at the same temperature, their thermal EMFs will cancel each other. The thermal EMF numbers are approximate and vary with resistor value. High values give higher thermal EMF.
Table 1. Resistor Thermal EMF
RESISTOR TYPE Tin Oxide Carbon Composition Metal Film Wire Wound Evenohm, Manganin THERMAL EMF/C GRADIENT >1mV/C 450V/C 20V/C 2V/C
TYPICAL APPLICATI
S
High Voltage Instrumentation Amplifier
1k V+ 1M
1M
2
- +
1/2 LTC1151 -IN 3
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of circuits as described herein will not infringe on existing patent rights.
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PACKAGE-INDUCED OFFSET VOLTAGE Package-induced thermal EMF effects are another important source of errors. They arise at the junctions formed when wire or printed circuit traces contact a package lead. Like all the previously mentioned thermal EMF effects, they are outside the LTC1151's offset nulling loop and cannot be cancelled. The input offset voltage specification of the LTC1151 is actually set by the package-induced warm-up drift rather than by the circuit itself. The thermal time constant ranges from 0.5 to 3 minutes, depending on package type. ALIASING Like all sampled data systems, the LTC1151 exhibits aliasing behavior at input frequencies near the sampling frequency. The LTC1151 includes a high frequency correction loop which minimizes this effect. As a result, aliasing is not a problem for many applications. For a complete discussion of the correction circuitry and aliasing behavior, please refer to the LTC1051/LTC1053 data sheet. LOW SUPPLY OPERATION The minimum supply for proper operation of the LTC1151 is typically 4.0V (2.0V). In single supply applications, PSRR is guaranteed down to 4.7V (2.35V) to ensure proper operation at minimum TTL supply voltage of 4.75V.
1151 F01
W
UO
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8
0.1F 1 1k 6
-
1/2 LTC1151 7 VOUT
+IN
5
+
4 V-
GAIN = 1000V/V OUTPUT OFFSET < 5mA 0.1F
1151 TA03
7
LTC1151 TYPICAL APPLICATI UO
15V -15V
S
Bridge Amplifier with Active Common-Mode Suppression
15V 350 TRIM TO SET BRIDGE OPERATING CURRENT 49.9k
0.1F
-
350 STRAIN GAUGE
1/2 LTC1151
1/2 LTC1151
+
499
VOUT AV = 100
PACKAGE DESCRIPTIO
0.300 - 0.320 (7.620 - 8.128)
0.009 - 0.015 (0.229 - 0.381)
0.065 (1.651) TYP 0.125 (3.175) MIN 0.020 (0.508) MIN
(
+0.025 0.325 -0.015 8.255 +0.635 -0.381
)
0.045 0.015 (1.143 0.381) 0.100 0.010 (2.540 0.254)
0.291 - 0.299 (7.391 - 7.595) 0.005 (0.127) RAD MIN 0.010 - 0.029 x 45 (0.254 - 0.737) 0.093 - 0.104 (2.362 - 2.642) 0.037 - 0.045 (0.940 - 1.143)
0 - 8 TYP 0.050 (1.270) TYP
0.009 - 0.013 (0.229 - 0.330)
SEE NOTE 0.016 - 0.050 (0.406 - 1.270)
NOTE: PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS.
8
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977
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-
0.1F
0.045 - 0.065 (1.143 - 1.651)
+
390 -15V
1151 TA04
Dimensions in inches (millimeters) unless otherwise noted. N8 Package, 8-Lead Plastic DIP
0.130 0.005 (3.302 0.127)
0.400 (10.160) MAX 8 7 6 5
0.250 0.010 (6.350 0.254)
1
2
3
4
0.018 0.003 (0.457 0.076)
S Package, 16-Lead SOL
16 15
0.398 - 0.413 (10.109 - 10.490) 14 13 12 11 10 9
SEE NOTE
0.394 - 0.419 (10.007 - 10.643)
0.004 - 0.012 (0.102 - 0.305)
0.014 - 0.019 (0.356 - 0.482) TYP
1
2
3
4
5
6
7
8
LT/GP 0193 10K REV 0
(c) LINEAR TECHNOLOGY CORPORATION 1993

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