View ST3M01_77536.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ST3M01
TRIPLE VOLTAGE REGULATOR
s s
s
s s s
ONLY TWO CELL NEED AS INPUT THREE REGULATED OUTPUT 1) HIGH EFFICENCY PFM DC/DC CONVERTER 3.3V AT 200mA (87% EFFICENCY) 2) VERY LOW NOISE AND VERY LOW DROP VREG (3V AT 20mA) 3) VERY LOW NOISE AAND VERY LOW DROP VREG (1.9V AT 20mA) LOGIC CONTROLLED ELECTRONIC SHUTDOWN LOW BATTERY DETECTOR VIRTUAL GND PIN TEMPERATURA RANGE: -40 TO 85C
SO-14
SCHEMATIC DIAGRAM
Vin 150 F 15 H IN_SW Lx DC/DC DC/DC OUT DC/DC Linear A OUT LA 1 F IN_Linear Linear B OUT LB 1 F Virtual GND 150 F
On-Mode Off-Mode
SHDN
+
LBO Ref Ref
-
Vref 100 nF
1 K GND_SW GND_Signal
November 2000
1/11
ST3M01
ABSOLUTE MAXIMUM RATINGS
Symbol VIN VSHDN VLX VLBO ILBO Tstg Top Shutdown Input Voltage Switch Voltage Low Battery Output Voltage Low Battery Output Maximum Current Storage Temperature Range Operating Junction Temperature Range Parameter DC Input Voltage (Both IN_Linear and IN_SW) Value -0.3 to 7 -0.3 to VIN+0.3 -0.3 to 7 -0.3 to 7 -0.3 to 7 30 30 -65 to +150 -40 to +85 Unit V V V V V mA mA C C
Vvirtual_GND Virtual GND Output Voltage Ivirtual_GND Virtual GND Output Maximum Current
THERMAL DATA
Symbol Rthj-amb Parameter Thermal Resistance Junction-ambient (*) Value 160 Unit C/W
ORDER CODES
Type ST3M01D ST3M01DTR Package SO-14 SO-14 (Tape & Reel) Comment 50 parts per tube / 20 tube per box 2500 parts per reel
2/11
ST3M01
CONNECTION DIAGRAM (top view)
PIN DESCRIPTION
Pin N 1 2 3 4 5 6 7 Symbol GND SW GND SW Virtual GND LBO VREF IN Linear OUT LB Name and Function Switching Ground. Must be low impedance; solder directly to GND plane Switching Ground. Must be low impedance; solder directly to GND plane Virtual GND. Open Drain N-Cnannel MOSFET: must be high impedance when the Low Battery condition is detected. Low Battery Output. Open Drain N-Cnannel MOSFET: sinks current when the input voltage drops below 2V typically. Reference Voltage Output. Bypass with 0.1 F to improve the linears VREF thermal noise performance. Linear Input. Must be connected togheter with IN SW to the input supply. Linear B Output port. 1.9V typically.
8
9 10 11 12 13 14
SHDN
GND Signal OUT LA OUT DC/DC IN SW LX LX
Shutdown Input. Disables the SMPS and LA output, but the LB, the referencevoltage and the low batery comparator remain active.
Signal GND. Must be connected togheter with the Switching Ground. Linear A Output port. 3V typically. DC/DC Output Port: 3.3V typically. SMPS Input. Must be connected togheter with IN_Linear to the input supply. 1.5A N-Channel Power MOSFET Drain. 1.5A N-Channel Power MOSFET Drain.
3/11
ST3M01
ELECTRICAL CHARACTERISTICS (Unless otherwise specified, please refer to the typical operating circut of the pag 1 for the external components values and connections. Unless otherwise noted VSHDN=HIGH)
Symbol VI VO(DC/DC) Parameter Operating Input Voltage DC/DC Converter Output Voltage (Test Circuit A) 2.24 VO(LA)
DC/DC Converter Efficency VIN=2.4V; IO(DC/DC)=100mA; IO(LA)=0mA; IO(LB)=0mA; TJ = 25C Linear A Output Voltage (Test Circuit A) Linear B Output Voltage (Test Circuit A) Linear A Thermal Output Noise Voltage (Note 2) Linear B Thermal Output Noise Voltage (Note 2) Quiescent Current OFF Mode DC/DC & LA OFF LB ON) (Test Circuit E) Quiescent Current OFF Mode (DC/DC & LA OFF LB ON) (Test Circuit F) DC/DC Supply Current (Test Circuit B) Linear A Quiescent Current (Test Circuit C) 2.2487 3 3.09
% V
VO(LB)
1.86
1.9
1.955
V
eN(LA)
VIN=2.4V; VO(DC/DC)=3.5V; IO(LA)=20mA; 10 < f < 80KHz; CO(LA)=1F; CREF=0.1F; TJ = 25C VIN=2.4V; VO(DC/DC)=3.5V; IO(LB)=20mA; 10 < f < 80KHz; CO(LB)=1F; CREF=0.1F; TJ = 25C VIN=3.3V; TJ = 25C VIN=1.9V; TJ = 25C VIN=2.24V; No Load; VSHDN=LOW;
60
Vrms
eN(LB)
35
Vrms
Iq(OFF)
75
A
Iq(OFF)
No Load;
VSHDN=HIGH;
50
A
IS(DC/DC) Iq(LA) Iq(LB) VBATT
No Load;
TJ = 25C
100 220 75 1.96 2 150 2.04 200
A A A V mV 0.4 V V ms
VIN=2.24V; VO(DC/DC)=3.5V; IO(LA)=10mA; TJ = 25C
Linear B Quiescent Current VIN=2.24V; VO(DC/DC)=3.5V; (Test Circuit C) IO(LB)=10mA; TJ = 25C VSHDN=HIGH with falling edge
Low Battery Detection Range VBATT(HYS) Low Battery Detection Hysteresys RON(LBO) LBO RDSON Vih Vil Ton Control Input Logic Low Control Input Logic High Timer On Response Time on DC/DC
VIN=1.9V; VIN>2.24V; VIN>2.24V;
ID=5mA;
TJ = 25C 1.5
10
-40 < TJ < 85C -40 < TJ < 85C 0.6
VIN=2.4V; CO=100F; TJ = 25C IO(DC/DC)=200mA VSHDN=from GND to VSHDN(MAX) VIN>2.24V; ID=5mA; TJ = 25C
9
RON(V_GND) Virtual GND RDSON
10
Note 1: For VIN < 1.9V the VO(LB) is out of regulation because of under dropout condition Note 2: VO(DC/DC) = 3.5V force for an external DC source to avoid switching noise
4/11
ST3M01
DC/DC CONVERTER BLOCK DIAGRAM
LINEAR VREG BLOCK DIAGRAM
5/11
ST3M01
TEST CIRCUIT A
Vin 150 F 15 H IN_SW Lx DC/DC DC/DC OUT DC/DC Linear A OUT LA V IN_Linear Linear B OUT LB V Virtual GND 1 F 1 F 150 F V
On-Mode Off-Mode
SHDN
+
LBO Ref Ref
-
Vref 0.1 F
1 K GND_SW GND_Signal
TEST CIRCUIT B
Vin (Isup)DC/DC
A
47 F 15 H IN_SW Lx DC/DC DC/DC OUT DC/DC Linear A OUT LA 1 F IN_Linear Linear B OUT LB 1 F Virtual GND 150 F
47 F
SHDN=HIGH
+
LBO Ref Ref
-
Vref 0.1 F
1 K GND_SW GND_Signal
6/11
ST3M01
TEST CIRCUIT C (Iq)Ia=(Iin)Ia-(Iout)Ia
(Vin)DC/DC Floating (Iin)la
A
47 F 15 H IN_SW Lx DC/DC DC/DC (Vin)Lin=2.24V IN_Linear Linear B 47 F OUT DC/DC
(Vout)DC/DC=3.5V
Linear A
OUT LA
(Iout)la 1 F
OUT LB 1 F Virtual GND
SHDN=HIGH
+
LBO Ref Ref
-
Vref 0.1 F
1 K GND_SW GND_Signal
TEST CIRCUIT D (Iq)Ib=(Iin)Ib-(Iout)Ib
(Vin)DC/DC Floating 47 F (Vin)Lin=3.3V (Iin)lb 150 F Lx DC/DC DC/DC OUT DC/DC Linear A OUT LA 1 F IN_Linear Linear B 47 F OUT LB (Iout)lb 1 F Virtual GND
15 H IN_SW
A
SHDN=LOW
+
LBO Ref Ref
-
Vref 0.1 F
1 K GND_SW GND_Signal
7/11
ST3M01
TEST CIRCUIT E
Vin = 3.3V
A
Iq = off 150 F 15 H IN_SW Lx DC/DC DC/DC OUT DC/DC Linear A OUT LA 1 F IN_Linear Linear B OUT LB 1 F Virtual GND 150 F
SHDN= LOW
+
LBO Ref Ref
-
Vref 0.1 F
1 K GND_SW GND_Signal
TEST CIRCUIT F
Vin = 1.9V
A
Iq = off 150 F 15 H IN_SW Lx DC/DC DC/DC OUT DC/DC Linear A OUT LA 1 F IN_Linear Linear B OUT LB 1 F Virtual GND 150 F
SHDN=HIGH
+
LBO Ref Ref
-
Vref 0.1 F
1 K GND_SW GND_Signal
8/11
ST3M01
DEMOBOARD CIRCUIT
L 22 H
D STPS320U
IN
C1 150 F 12 IN_SW ON SH OFF 13,14 LX 11 OUT_DC/DC C2 150 F
DC
SHDN 8
OUT_LA
10 C4 1 F
A
ST3M01
IN_Linear 6 Virtual_GND 3 4 LBO GND_SW 1,2 GND_Signal 9 OUT_LB 7 Vref 5 C3 100 nF
B
C5 1 F
VG LBO
R1 1KOhm
VR
PC BOARD LAYOUT
9/11
ST3M01
SO-14 MECHANICAL DATA
DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 8.55 5.8 1.27 7.62 4.0 5.3 1.27 0.68 8 (max.) 0.149 0.181 0.019 8.75 6.2 0.35 0.19 0.5 45 (typ.) 0.336 0.228 0.050 0.300 0.157 0.208 0.050 0.026 0.344 0.244 0.1 mm TYP. MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010
P013G
10/11
ST3M01
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2000 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom (c) http://www.st.com
11/11

▲Up To Search▲

Price & Availability of ST3M01

	To Download ST3M01 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .