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STM7E1A
7 E 1 CHANNELS SWITCH ARRAY
s s
s
s
MAIN SWITCHES MAX. RON LESS THAN 2 PROVIDES 7 AUXILIARY SWITCHES WITH RON < 75 6VPP AMPLITUDE OF ANALOG INPUT SIGNAL DIGITAL INPUTS ARE TTL LEVELS COMPATIBLE
DESCRIPTION The STM7E1 consists in 7 identical ISDN E1 channels, each channel corresponding to 4 main low-resistant switches (a and b) and 2 auxiliary switches (c and d). The switches positions in all the channels are identical and controlled by a unique control resource driven by the digital inputs Lm, Ls and Sc. In each channel, the TX and RX lines can be switched between a Main port or a Spare-port by the main switches: if both "a" switches are closed and both "b" switches are open, the Main port is connected to the line, while if both "a" switches are open and both "b' switches are closed, the spare port is connected to the line. The 2 auxiliary switches enable to close a local loop between the TX and RX access of a port: if "c" is closed, the Spare port RX and TX access is connected between each other to form a local loop, while if "d" is closed, the Main port RX and TX access is connected between each other to form a local loop. ORDERING CODES
Type STM7E1A STM7E1AR Temperature Range -40 to 85 C -40 to 85 C Package
TQFP64
The Spare port is only used for test purpose on the system board while the Main port is the communication channel. Consequently, a switching from the Main port to the Spare port occurs very rarely (<10 times a day). The power supplies of the chip need to be de coupled properly. This means that at least one external capacitor C1 must be connected in between GND and VPOS, one external capacitor C2 between GND and VNEG, and one external capacitor C3 between each pair of VNEG and VPOS.
Comments 160 parts per Tray 1000 parts per reel
TQFP64 (Tray) TQFP64 (Tape & Reel)
December 2002
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STM7E1A
PIN CONFIGURATION
PIN DESCRIPTION
PlN N 1, 17, 33, 47 2 3 4 5, 12, 21, 25, 29, 38, 52, 56, 60 6 7 8 9 10 11 13 14 15 16, 34, 48, 64 18 19 20 22 23 24 26 27 28 30 2/10 SYMBOL VNEG(1) Txm#2 Tx#2 Txs#2 GND Rxm#3 Rx#3 Rxs#3 Txm#3 Tx#3 Txs#3 Rxm#4 Rx#4 Rxs#4 VPOS(2) Txm#4 Tx#4 Txs#4 Rxm#5 Rx#5 Rxs#5 Txm#5 Tx#5 Txs#5 Rxm#6 TYPE P IOA IOA IOA G IOA IOA IOA IOA IOA IOA IOA IOA IOA P IOA IOA IOA IOA IOA IOA IOA IOA IOA IOA NAME AND FUNCTION Negative Power Supply Channel 2: TX main port Channel 2: TX line Channel 2: TX spare port Voltage Reference for digital inputs Channel 3: RX main port Channel 3: RX line Channel 3: RX spare port Channel 3: TX main port Channel 3: TX line Channel 3: TX spare port Channel 4: RX main port Channel 4: RX line Channel 4: RX spare port Positive Power Supply Channel 4: TX main port Channel 4: TX line Channel 4: TX spare port Channel 5: RX main port Channel 5: RX line Channel 5: RX spare port Channel 5: TX main port Channel 5: TX line Channel 5: TX spare port Channel 6: RX main port
STM7E1A
PlN N 31 32 35 36 37 39 40 41 42 43 44 45 46 49 50 51 53 54 55 57 58 59 61 62 63
SYMBOL Rx#6 Rxs#6 Sc Ls Lm Txm#6 Tx#6 Txs#6 Mode Rxm#0 Rx#0 Rxs#0 TEST/Sn Txm#0 Tx#0 Txs#0 Rxm#1 Rx#1 Rxs#1 Txm#1 Tx#1 Txs#1 Rxm#2 Rx#2 Rxs#2
TYPE IOA IOA I I I IOA IOA IOA I IOA IOA IOA I IOA IOA IOA IOA IOA IOA IOA IOA IOA IOA IOA IOA
NAME AND FUNCTION Channel 6: RX line Channel 6: RX spare port Control digital input Control digital input Control digital input Channel 6: TX main port Channel 6: TX line Channel 6: TX spare port Control Digital Input Channel 0: RX main port Channel 0: RX line Channel 0: RX spare port Channel 6: RX main port Channel 0: TX main port Channel 0: TX line Channel 0: TX spare port Channel 1: RX main port Channel 1: RX line Channel 1: RX spare port Channel 1: TX main port Channel 1: TX line Channel 1: TX spare port Channel 2: RX main port Channel 2: RX line Channel 2: RX spare port
NOTE 1: All VNEG pins to be connected together on board. NOTE 2: All VPOS pins to be connected together on board.
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STM7E1A
TYPICAL OPERATING CIRCUIT
MODE
Sc
Ls
Lm
TEST/Sn
Control Decoding Level Shifting & Buffering
a Tx#0 b c a Rx#0 b d Rxm#0 Rxs#0 Txm#1 Txs#1 Rxm#1 Rxs#1
CHANNEL 0
Txm#0 Txs#0
Tx#1
CHANNEL 1
Rx#1
Tx#6
CHANNEL 6
Rx#6
Txm#6 Txs#6 Rxm#6 Rxs#6
VNEG
GND
VPOS
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STM7E1A
DECODING OF FUNCTIONAL MODE 1 (MODE = L)
Main Switches Auxiliary Switches Sc low Sc high Lm low Lm high Ls low Ls high a closed, b open a open, b closed d open d closed c open c closed Main port is connected to the line Spare port is connected to the line Main port local loop open Main port local loop closed Spare port local loop open Spare port local loop closed
When closing the main port local loop (Lm high), it is external system responsibility to ensure that the main port has previously been disconnected from the line (Sc has to be high). There is no internal mechanism to ensure this. When closing the spare port local loop (Ls high), it is external system responsibility to ensure that the spare port has previously been disconnected from the line (Sc has to be high). There is no internal mechanism to ensure this. DECODING OF FUNCTIONAL MODE 2 (MODE = H)
INPUT TEST/Sn L H
C = Closed O = Open
OUTPUTS A_TX O C B_TX C O
INPUTS Sc L L L L H
C = Closed O = Open
OUTPUTS Ls L H L H L A_RX C C O C O B_RX C O C O C c O C O O O d O O C O O
Lm L L H H L
TEST MODE DESCRIPTION (MODE = 0, TEST = 1) In order to test the main switches (4-point measurement), test modes are foreseen where the main switches can be controlled independently from each other. One can enter in test mode by controlling the Sc, Lm and Ls pins according to the following table. The digital part and auxiliary switches can be tested in functional mode.
Signification A_TX closed A_RX closed B_TX closed B_RX closed B_TX & c closed A_RX & d closed All main switches open Sc H L H L H L H L Lm H H L L L L H H Ls L L H H L L H H
Note 1: Although there is an internal pull down in the TEST pin, an external hardware connection from TEST to GND is required on the board to work in functional, mode.
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STM7E1A
ABSOLUTE MAXIMUM RATINGS
Symbol VPOS GND VIN Reference Ground Input Voltage for Digital Inputs and Analog Input/Output Pins Description Positive Power Supply Voltage Min VNEG - 0.3 VNEG - 0.3 VNEG - 0.3 Max VNEG + 7 VNEG + 7 VNEG + 7 Unit V V V
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol VPOS VNEG Tamb TJ Ipeak,
switch
Parameter Positive Power Supply Voltage Negative Power Supply Voltage Ambient Temperature Junction Temperature Admissible peak Current in 1 Switch Load Capacitance on ASIC output
Min 3.3 - 5% -3.3 - 5% -25 -25
TYP
Max 3.3 + 5% -3.3 + 5% 85 120 300 70
Unit V V C C mA pF
CIa
DIGITAL PART SPECIFICATIONS
Value Symbol VIL VIH VIT Ileak Low Input Level High Input Level Low-High Switching Threshold Voltage Input Leakage Current -3 Parameter Min. 0 2 1.6 3 Typ. Max. 0.8 VPOS V V V Unit
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STM7E1A
ANALOG PART SPECIFICATIONS
Value Symbol RON(main)(1) Parameter Test Condition Min. On-resistance of the main switches (1) On-resistance of the RON(aux) auxiliary switches (1) Difference of R ON between VIN = 2V, TA = 25C RON(main) devices RON(main)(1) Difference of RON between VIN = 2V, TA = 25C switches of the same device (1,2) Off-resistance of the main Roff and auxiliary switches Capacitance at any switch Cpin(3) pin, switch ON (1) Peak amplitude of the signal Apeak,signal at switch pins (1,4) Frequency of the signal at fsignal switch pins (3dB bandwidth) Cross-talk(1,5) Cross-talk between lines t Switch time of the main switches (a and b) NOTE 1: all the parameters are valid only with a 75 (5%) load to GND. Typ. 1.6 50 0.5 0.8 100 50 -3 50 4 0.15 120 3 12000 8 1 Max. 2 75 k pF Vp KHz mVrms s Unit
NOTE 2: measured with a 5V DC voltage applied to a closed switch. NOTE 3: not tested in production. NOTE 4: measured with a 2Vpp signal. NOTE 5: measured with the line connected to GND at one side with a 75 resistor and all the other lines driven by a 1MHz, 2Vpp sine wave signal. NOTE 6: during the switching between the main and spare ports, the behaviour of the component is not guaranteed: both main switches can be open (break before make). NOTE 7: measured with the line switching from a 2.5V DC level (main or spare port) to a -2.5V DC level (spare or main port).
CURRENT CONSUMPTION SPECIFICATIONS
Value Symbol Pmain(1) Paux(1) ISTDBY(VNEG)(1,3) ISTDBY(VPOS)(1,3) ESWITCH(VNEG)(1) ESWITCH(VPOS)(1) Parameter Min. Maximal average power dissipation in the main switches Maximal average power dissipation in the auxiliar switches Standby (no switching) current of VNEG Standby (no switching) current of VPOS Energy to be delivered to by VPOS when switching Energy to be delivered to by VPOS when switching Typ. Max. 40 150 -500 -500 -100 -100 500 500 100 100 mW mW A A nJ nJ Unit
NOTE 1: these parameters are not tested in production. NOTE 2: this power is not delivered by VPOS and VNEG supplies but by the signal sources. NOTE 3: only valid with digital inputs to GND or VPOS levels.
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STM7E1A
TQFP64 MECHANICAL DATA
mm. DIM. MIN. A A1 A2 B C D D1 D3 E E1 E3 e L L1 K 0 0.45 11.80 9.80 0.05 1.35 0.17 0.09 11.80 9.80 12.00 10.00 7.50 12.00 10.00 7.50 0.50 0.60 1.00 3.5 7 0 0.75 0.018 12.20 10.20 0.465 0.386 1.40 0.22 TYP MAX. 1.6 0.15 1.45 0.27 0.20 12.20 10.20 0.002 0.053 0.007 0.004 0.465 0.386 0.472 0.394 0.295 0.472 0.394 0.295 0.020 0.024 0.039 3.5 7 0.030 0.480 0.402 0.055 0.009 MIN. TYP. MAX. 0.063 0.006 0.057 0.011 0.008 0.480 0.402 inch
A
D D1 D3
48 33
A2 A1
0.10mm
49
32
.004 Seating Plane
E3
E1
17
L
64
L1
E
K
1
e
16
B
C
0051434/E
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STM7E1A
Tape & Reel TQFP64 MECHANICAL DATA
mm. DIM. MIN. A C D N T Ao Bo Ko Po P 12.25 12.25 2.1 3.9 15.9 12.8 20.2 60 30.4 12.45 12.45 2.3 4.1 16.1 0482 0482 0.083 0.153 0.626 TYP MAX. 330 13.2 0.504 0.795 2.362 1.196 0.490 0.490 0.091 0.161 0.639 MIN. TYP. MAX. 12.992 0.519 inch
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STM7E1A
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. (c) http://www.st.com
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