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 SK15XX Family
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS PRELIMINARY
SK15XX .amily .unctional Block Diagram
OUT0 OUT0*
IN IN*
DQ D* Q*
0 1
OUT1 OUT1*
CLK CLK* SEL* SEL
OUT2 OUT2*
OUT3 OUT3*
OUT4 OUT4*
Revision 1/ January 23, 2001
1
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SK15XX Family
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS SK15XX .amily Product Selection Guide
1:5 Signal Distribution 3 GHz Logic .amily
Power Supply Open Emitter l l l l l Output Configuration 50 Double Termination Internal Current Sink (Double Termination) ECL / PECL Double Swing / TTL ECL / PECL ECL / PECL ECL / PECL Now Now Now Now Now Output Availability
PRELIMINARY
Synch / Asynch Operation
Product
3.3V
5.2V
50 Source Termination
SK1500 SK1501 SK1502 SK1503 SK1504
l
l l
l l l
l l l
Logic / Translation .amily
Translation
Product SK1525 SK1526 SK1527 SK1528 SK1529 SK1530 Anything to PECL Anything to ECL Anything to PECL Anything to ECL Anything to PECL Anything to ECL Open Emitter l l l l l l
Output Configuration
50 Double Termination 50 Source Termination
Availability
Now Now Now Now Now Now
Open Collector Logic .amily
Output Configuration
Product SK1599 Open Collector l 12 mA Q2 2001
Output Current
Availability
Revision 1/ January 4, 2001
2
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SK15XX Family
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS SK15XX .amily Package Information 5mm x 5mm TQ.P
3
PRELIMINARY
D, E
D1, E1
2
4
See Figure 3.
b
8
Top View
e A A2
SEATING PLANE
A1 10
b
Side View
Revision 1/ January 4, 2001
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SK15XX Family
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS SK15XX .amily Package Information (continued) 5mm x 5mm TQ.P
9
02
PRELIMINARY
7
b
WITH PLATING
2 R1
9
9
e/2
01
R2 S GAGE PLANE
03
11 L
00
(L1)
25
c
c1
9
b1
b
Figure 1.
Figure 2.
Figure 3.
JEDEC Variation All Dimensions in Millimeters
All dimensions and tolerancing conforms to ANSI Y14.5M-1982. 2. The top package body size may be smaller than the bottom package body size by as much as 0.15 mm. 3. To be determined at seating plane. 4. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. D1 and E1 are maximum plastic body size dimensions including mold mismatch. 5. Details of Pin 1 identifier optional, but must be located within the zone indicated. 6. All dimensions are in millimeters. 7. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall not cause the lead width to exceed the maximum b dimension by more than 0.08 mm. Dambar cannot be located on the lower radius or the foot. Minimum space between protrusion and an adjacent lead is 0.07 mm for 0.4 mm and 0.5 mm pitch packages. 8. Exact shape of each corner is optional. 9. These dimensions apply to the flat section of the lead between 0.10 mm and 0.25 mm from the lead tip. 10. A1 is defined as the distance from the seating plane to the lowest point of the package body.
Revision 1/ January 23, 2001 4
1.
Symbol A A1 A2 D D1 E E1 N e b b1 R1 R2 00 01 02 03 S c c1 L L1 aaa bbb ccc ddd
MIN 1.00 0.05 0.95
NOM 1.10 0.10 1.00 7.00 BSC 5.00 BSC 7.00 BSC 5.00 BSC 32 0.50 BSC
MAX 1.20 0.15 1.05
Note
Comments Package Stand Off Height Air Gap Package Body Thickness
3 4, 2 3 4, 2 Package Body Width Lead Count Lead Pitch 0.27 0.23 0.20 7 Lead Thickness Package Body Length
0.17 0.17 0.08 0.08 0
o o o o
0.22 0.20 3.5 12 12 0.60 1.00 RE. 0.20 0.20 0.08 0.08
o o o
7
o
0
13 13 0.20 0.16 0.75
o o
11
11
0.20 0.09 0.09 0.45
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SK15XX Family
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS Absolute Maximum Ratings*
Symbol VEE VCC VI VI IOUT TA Tstg Tsol Parameter Power Supply (VCC = 0V) Power Supply (VEE = 0V) Input Voltage (VCC = 0V, VI not more negative than VEE) Input Voltage (VE = 0V, VI not more positive than VCC) Output Current Continuous Surge Operating Temperature Range Storage Temperature Solder Temperature (<2 to 3 seconds: 245oC desired) Value -6.0 to 0 6.0 to 0 -6.0 to 0 6.0 to 0 50 100 0 to +70 -65 to +150 265
PRELIMINARY
Unit V V V V mA mA
oC oC oC
* Maximum Ratings are those values beyond which damage to the device may occur.
Revision 1/ January 23, 2001
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SK1500
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS HIGH-PER.ORMANCE PRODUCTS Description
The SK1500 is an extremely fast, stable, and accurate low skew 1:5 clock / signal distributor featuring a synchronous enable, which allows the outputs to be turned off and on without the risk of an unpredictable output pulse. The D - flip-flop is triggered on the falling edge of the clock. The SK1500 uses standard open emitter ECL outputs optimized for: * General purpose ECL compatible applications * Multiple destination applications (daisy chain).
PRELIMINARY PRELIMINARY .eatures
* * * 1:5 Clock/Data Driver 3 GHz Fmax 3.3V / 5.2V Compatible
Output Options
Open Emitter
VCC
OUT OUT*
.unctional Block Diagram
Output Swing
1.3V VCC
OUT0 OUT0*
700 mV 3.3V or 5.2V
IN IN*
DQ D* Q*
0 1
OUT1 OUT1*
CLK CLK* SEL* SEL
OUT2 OUT2*
VEE
OUT3 OUT3*
Pin Description
OUT4 OUT4*
Package Information
32 pin, 5 mm x 5 mm TQFP Package
VEE SEL SEL* CLK CLK* IN IN* VCC
VCC OUT0 OUT0* N/C N/C OUT1 OUT1* VEE
VCC N/C N/C OUT2 OUT2* N/C N/C VEE
VEE OUT4* OUT4 N/C N/C OUT3* OUT3 VCC
Revision 1/ January 23, 2001
5 6
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SK1500
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS DC Characteristics
Parameter Inputs Input High Input Low (IN - IN*, CLK - CLK*, SEL - SEL*) Differential Input Voltage (Note 1) Timing Inputs (CLK / CLK*) Input High Current Input Low Current .unctional Inputs (IN / IN*, SEL / SEL*) Input Current Outputs Digital Output Voltage Output Common Mode Range Power Supply Power Supply Current Power Supply Voltage IEE VCC - VEE 3.0 95 120 5.5 mA V | OUT - OUT* | (OUT + OUT*) / 2 600 VCC - 1.5 700 VCC - 1.3 VCC - 1.1 mV V VIH VIL | Input - Input* | IIH IIL IIH, IIL VEE + 2.0 VEE .2 +1 -1 -420 VCC VCC - .2 4.3 +25 +1 +250 V V V A A A Symbol Min Typ
PRELIMINARY
Max
Units
Test Conditions: Outputs terminated with 50 to VCC - 2V. Note 1: Production tested to a maximum Vdiff = 2.0V.
AC Characteristics
Parameter High Performance Option Propagation Delay CLK to OUT (SEL = 0) CLK to OUT (SEL = 1) SEL to OUT Channel to Channel Skew Maximum Operating .requency (Note 1) Minimum Pulse Width (Note 1) IN to CLK (Note 1) Set Up Time Hold Time Output Rise and .all Times (20% / 80%) Temperature Coefficient .max PW min Tsu Th Tr / Tf Tpd /T 3.0 160 100 100 125 <1 150 Tpd Tpd Tpd 490 340 330 590 440 430 690 540 530 <20 ps ps ps ps GHz ps ps ps ps ps / oC Symbol Min Typ Max Units
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
7
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SK1501
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS Description
The SK1501 is an extremely fast, stable, and accurate low skew 1:5 clock / signal distributor featuring a synchronous enable, which allows the outputs to be turned off and on without the risk of an unpredictable output pulse. The D - flip-flop is triggered on the falling edge of the clock. The SK1501 uses open emitter outputs with a double amplitude swing suitable for the following applications: * TTL compatible destinations * Double termination situations that require a full swing at the destination * Long cables
PRELIMINARY .eatures
* * * 1:5 Clock/Data Driver 2 GHz Fmax 4.5V / 5.2V Compatible
Output Options
Open Emitter
VCC
OUT OUT*
.unctional Block Diagram
Output Swing
VCC
OUT0 OUT0*
1.4V
1.9V 4.5V or 5.2V
IN IN*
DQ D* Q*
0 1
OUT1 OUT1*
CLK CLK* SEL* SEL
OUT2 OUT2*
VEE
OUT3 OUT3*
Pin Description
OUT4 OUT4*
Package Information
32 pin, 5 mm x 5 mm TQFP Package
VEE SEL SEL* CLK CLK* IN IN* VCC
VCC OUT0 OUT0* N/C N/C OUT1 OUT1* VEE
VCC N/C N/C OUT2 OUT2* N/C N/C VEE
VEE OUT4* OUT4 N/C N/C OUT3* OUT3 VCC
Revision 1/ January 23, 2001
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SK1501
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS DC Characteristics PRELIMINARY
Parameter Inputs Input High Input Low (IN - IN*, CLK - CLK*, SEL -SEL*) Differential Input Voltage Timing Inputs (CLK / CLK*) Input High Current Input Low Current .unctional Inputs (IN / IN*, SEL / SEL*) Input Current Outputs Digital Output Voltage Output Common Mode Range Power Supply Power Supply Current Power Supply Voltage
Symbol
Min
Typ
Max
Units
VIH VIL | Input -Input* | IIH IIL IIH, IIL
VEE + 2.0 VEE .2 +1 -1 -420
VCC VCC -.2 4.3 +25 +1 +250
V V V A A A
| OUT -OUT* | (OUT + OUT*) / 2
1.2 VCC -2.1
1.4 VCC - 1.9
VCC - 1.7
V V
IEE VCC -VEE
4.2
95
120 5.5
mA V
Test Conditions: Outputs terminated with 50 to VCC - 3V.
AC Characteristics
Parameter High Performance Option Propagation Delay CLK to OUT (SEL = 0) CLK to OUT (SEL = 1) SEL to OUT Channel to Channel Skew Maximum Operating .requency (Note 1) Minimum Pulse Width (Note 1) IN to CLK (Note 1) Set Up Time Hold Time Output Rise and .all Times (20% / 80%) Temperature Coefficient .max PW min Tsu Th Tr / Tf Tpd /T 2.0 250 100 100 200 <1 250 Tpd Tpd Tpd 490 340 330 590 440 430 690 540 530 <20 ps ps ps ps GHz ps ps ps ps ps / oC Symbol Min Typ Max Units
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
9
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SK1502
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS Description
The SK1502 is an extremely fast, stable, and accurate low skew 1:5 clock / signal distributor featuring a synchronous enable, which allows the outputs to be turned off and on without the risk of an unpredictable output pulse. The D - flip-flop is triggered on the falling edge of the clock. The SK1502 uses 50 outputs with source /sink capability, and is optimized for applications that require: * Point to point, double terminated, timing critical lines
PRELIMINARY .eatures
* * * 1:5 Clock/Data Driver 3 GHz Fmax 3.3V / 5.2V Compatible
Output Options
50 Source / Sink
VCC
50 50 4 mA VEE VEE 4 mA OUT OUT *
.unctional Block Diagram
Output Swing
1.3V
OUT0 OUT0*
VCC
350 mV 3.3V or 5.2V
IN IN*
DQ D* Q*
0 1
OUT1 OUT1*
At destination (double termination)
CLK CLK* SEL* SEL
OUT2 OUT2*
VEE
OUT3 OUT3*
OUT4 OUT4*
Pin Description
Package Information
32 pin, 5 mm x 5 mm TQFP Package
VEE SEL SEL* CLK CLK* IN IN* VCC
VCC OUT0 OUT0* N/C N/C OUT1 OUT1* VEE
VCC N/C N/C OUT2 OUT2* N/C N/C VEE
VEE OUT4* OUT4 N/C N/C OUT3* OUT3 VCC
Revision 1/ January 23, 2001
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SK1502
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS DC Characteristics
Parameter Inputs Input High Input Low (IN - IN*, CLK - CLK*, SEL - SEL*) Differential Input Voltage Timing Inputs (CLK / CLK*) Input High Current Input Low Current .unctional Inputs (IN / IN*, SEL / SEL*) Input Current Outputs Digital Output Voltage Output Common Mode Range Internal Current Source Output Impedance Power Supply Power Supply Current Power Supply Voltage IEE VCC - VEE 3.0 135 170 5.5 mA V | OUT - OUT* | (OUT + OUT*) / 2 ISINK ROUT 600 VCC - 1.5 4 40 700 VCC -1.3 5 45 VCC - 1.1 6 50 mV V mA VIH VIL | Input - Input* | IIH IIL IIH, IIL VEE + 2.0 VEE .2 +1 -1 -420 VCC VCC - .2 4.3 +25 +1 +250 V V V A A A Symbol Min Typ
PRELIMINARY
Max
Units
Test Conditions: Outputs terminated with 50 to VCC - 2V.
AC Characteristics
Parameter High Performance Option Propagation Delay CLK to OUT (SEL = 0) CLK to OUT (SEL = 1) SEL to OUT Channel to Channel Skew Maximum Operating .requency (Note 1) Minimum Pulse Width (Note 1) IN to CLK (Note 1) Set Up Time Hold Time Output Rise and .all Times (20% / 80%) Temperature Coefficient .max PW min Tsu Th Tr / Tf DTpd /DT 3.0 160 100 100 125 <1 150 Tpd Tpd Tpd 490 340 330 590 440 430 690 540 530 <20 ps ps ps ps GHz ps ps ps ps o ps / C Symbol Min Typ Max Units
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001 11 www.semtech.com
SK1503
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS Description
The SK1503 is an extremely fast, stable, and accurate low skew 1:5 clock / signal distributor featuring a synchronous enable, which allows the outputs to be turned off and on without the risk of an unpredictable output pulse. The D - flip-flop is triggered on the falling edge of the clock. The SK1503 outputs are open emitter with an internal current source, optimized for applications that are: * Point to point, double terminated, timing critical lines * Non-50 transmission lines
PRELIMINARY .eatures
* * * 1:5 Clock/Data Driver 3 GHz Fmax 3.3V / 5.2V Compatible
Output Options
Internal Current Sink
VCC
OUT OUT * 4 mA 4 mA VEE
.unctional Block Diagram
VEE
Output Swing
OUT0 OUT0*
1.3V 350 mV
VCC
IN IN*
DQ D* Q*
0 1
OUT1 OUT1*
At destination (double termination)
OUT2 OUT2*
3.3V or 5.2V
CLK CLK* SEL* SEL
VEE
OUT3 OUT3*
OUT4 OUT4*
Pin Description
VCC OUT0 OUT0* N/C N/C OUT1 OUT1* VEE
Package Information
32 pin, 5 mm x 5 mm TQFP Package
VEE SEL SEL* CLK CLK* IN IN* VCC
VCC N/C N/C OUT2 OUT2* N/C N/C VEE
VEE OUT4* OUT4 N/C N/C OUT3* OUT3 VCC
Revision 1/ January 23, 2001
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SK1503
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS DC Characteristics
Parameter Inputs Input High Input Low (IN - IN*, CLK - CLK*, SEL - SEL*) Differential Input Voltage Timing Inputs (CLK / CLK*) Input High Current Input Low Current .unctional Inputs (IN / IN*, SEL / SEL*) Input Current Outputs Digital Output Voltage Output Common Mode Range Internal Current Source Power Supply Power Supply Current Power Supply Voltage IEE VCC - VEE 3.0 135 170 5.5 mA V | OUT - OUT* | (OUT + OUT*) / 2 ISINK 600 VCC - 1.5 4 700 VCC -1.3 5 VCC - 1.1 6 mV V mA VIH VIL | Input - Input* | IIH IIL IIH, IIL VEE + 2.0 VEE .2 +1 -1 -420 VCC VCC - .2 4.3 +25 +1 +250 V V V A A A Symbol Min Typ
PRELIMINARY
Max
Units
Test Conditions:
AC Characteristics
Parameter High Performance Option Propagation Delay CLK to OUT (SEL = 0) CLK to OUT (SEL = 1) SEL to OUT Channel to Channel Skew Maximum Operating .requency (Note 1) Minimum Pulse Width (Note 1) IN to CLK (Note 1) Set Up Time Hold Time Output Rise and .all Times (20% / 80%) Temperature Coefficient .max PW min Tsu Th Tr / Tf Tpd /T 3.0 160 100 100 125 <1 150 Tpd Tpd Tpd 490 340 330 590 440 430 690 540 530 <20 ps ps ps ps GHz ps ps ps ps ps / oC Symbol Min Typ Max Units
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001 13 www.semtech.com
SK1504
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS Description
The SK1504 is an extremely fast, stable, and accurate low skew 1:5 clock / signal distributor featuring a synchronous enable, which allows the outputs to be turned off and on without the risk of an unpredictable output pulse. The D - flip-flop is triggered on the falling edge of the clock. The SK1504 outputs are 50 with source and sink capability, optimized for: * Point to point, series terminated, timing critical lines
PRELIMINARY .eatures
* * * 1:5 Clock/Data Driver 3 GHz Fmax 3.3V / 5.2V Compatible
Output Options
50 Source / Sink
VCC
50 50 8 mA 8 mA VEE OUT OUT *
.unctional Block Diagram
VEE
Output Swing
OUT0 OUT0*
1.3V 700 mV
VCC
IN IN*
DQ D* Q*
0 1
OUT1 OUT1*
3.3V or 5.2V
CLK CLK* SEL* SEL
OUT2 OUT2*
VEE
OUT3 OUT3*
Pin Description
OUT4 OUT4*
VCC OUT0 OUT0* N/C N/C OUT1 OUT1* VEE
Package Information
32 pin, 5 mm x 5 mm TQFP Package
VEE SEL SEL* CLK CLK* IN IN* VCC
VCC N/C N/C OUT2 OUT2* N/C N/C VEE
VEE OUT4* OUT4 N/C N/C OUT3* OUT3 VCC
Revision 1/ January 23, 2001
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SK1504
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS DC Characteristics
Parameter Inputs Input High Input Low (IN - IN*, CLK - CLK*, SEL - SEL*) Differential Input Voltage Timing Inputs (CLK / CLK*) Input High Current Input Low Current .unctional Inputs (IN / IN*, SEL / SEL*) Input Current Outputs Digital Output Voltage Output Common Mode Range Internal Current Source Output Impedance Power Supply Power Supply Current Power Supply Voltage IEE VCC - VEE 3.0 175 221 5.5 mA V | OUT - OUT* | (OUT + OUT*) / 2 ISINK ROUT 600 VCC - 1.5 6.5 40 700 VCC -1.3 8 45 mV V mA VIH VIL | Input - Input* | IIH IIL IIH, IIL VEE + 2.0 VEE .2 +1 -1 -420 VCC VCC - .2 4.3 +25 +1 +250 V V V A A A Symbol Min Typ Max
PRELIMINARY
Units
VCC - 1.1 10 50
Test Conditions:
AC Characteristics
Parameter High Performance Option Propagation Delay CLK to OUT (SEL = 0) CLK to OUT (SEL = 1) SEL to OUT Channel to Channel Skew Maximum Operating .requency (Note 1) Minimum Pulse Width (Note 1) IN to CLK (Note 1) Set Up Time Hold Time Output Rise and .all Times (20% / 80%) Temperature Coefficient .max PW min Tsu Th Tr / Tf Tpd /T 3.0 160 100 100 125 <1 150 Tpd Tpd Tpd 490 340 330 590 440 430 690 540 530 <20 ps ps ps ps GHz ps ps ps ps ps / oC Symbol Min Typ Max Units
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
15
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SK1525
Anything to PECL Translator
HIGH-PER.ORMANCE PRODUCTS Description
The SK1525 is an extremely fast, stable, and accurate low skew 1:5 clock / signal distributor featuring a synchronous enable, which allows the outputs to be turned off and on without the risk of an upredictable output pulse. It is also capable of receiving inputs of any technology or voltage level. The D - flip-flop is triggered on the falling edge of the clock. The SK1525 has open emitter PECL outputs.
VCC
PRELIMINARY .eatures
* * * 1:5 Clock/Data Driver 3 GHz Fmax Anything to PECL Translation
Output Options
Open Emitter
Target applications: * High speed clock / data lines that require translation * Multiple destination (daisy chain) applications
OUT OUT*
.unctional Block Diagram
VIH
OUT0 OUT0*
Input Swing
VCC
Output Swing
VIL
1.3V
VCC
IN IN*
DQ D* Q*
0 1
OUT1 OUT1*
VIH
OUT2 OUT2*
. . . .
VEE
700 mV
VIL
VEE
CLK CLK* SEL* SEL
OUT3 OUT3*
Pin Description
VCC OUT0 OUT0* N/C N/C OUT1 OUT1* VEE
OUT4 OUT4*
Package Information
32 pin, 5 mm x 5 mm TQFP Package
VEE SEL SEL* CLK CLK* IN IN* VCC
VCC N/C N/C OUT2 OUT2* N/C N/C VEE
VEE OUT4* OUT4 N/C N/C OUT3* OUT3 VCC
Revision 1/ January 23, 2001
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SK1525
Anything to PECL Translator
HIGH-PER.ORMANCE PRODUCTS DC Characteristics
Parameter
PRELIMINARY
Symbol
Min
Typ
Max
Units
Inputs Input High Input Low (IN - IN*, CLK - CLK*, SEL -SEL*) Differential Input Voltage Timing Inputs (CLK / CLK*) Input High Current Input Low Current .unctional Inputs (IN / IN*, SEL / SEL*) Input Current Outputs Digital Output Voltage Output Common Mode Range Power Supply Power Supply Current Positive Supply Voltage Negative Supply Voltage IEE VCC VEE 3.0 -3.6 95 3.3 -3.3 120 3.6 -3.0 mA V V | OUT -OUT* | (OUT + OUT*) / 2 600 VCC -1.5 700 VCC -1.3 VCC -1.1 mV V VIH VIL | Input - Input* | IIH IIL IIH, IIL VEE + 2.0 VEE .2 +1 -1 -420 VCC VCC -.2 4.3 +25 +1 +250 V V V A A A
Test Conditions: Outputs terminated with 50 to VCC - 2V.
AC Characteristics
Parameter High Performance Option Propagation Delay CLK to OUT (SEL = 0) CLK to OUT (SEL = 1) SEL to OUT Channel to Channel Skew Maximum Operating .requency (Note 1) Minimum Pulse Width (Note 1) IN to CLK (Note 1) Set Up Time Hold Time Output Rise and .all Times (20% / 80%) Temperature Coefficient .max PW min Tsu Th Tr / Tf Tpd /T 3.0 160 100 100 125 <1 150 Tpd Tpd Tpd 490 340 330 590 440 430 690 540 530 <20 ps ps ps ps GHz ps ps ps ps o ps / C Symbol Min Typ Max Units
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
17
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SK1526
Anything to ECL Translator
HIGH-PER.ORMANCE PRODUCTS Description
The SK1526 is an extremely fast, stable and accurate low skew 1:5 clock / signal distributor featuring a synchronous enable, which allows the outputs to be turned off and on without the risk of an upredictable output pulse. It is also capable of receiving inputs of any technology or voltage level. The D - flip-flop is triggered on the falling edge of the clock. The SK1526 has standard open emitter ECL outputs.
VGG
PRELIMINARY .eatures
* * * 1:5 Clock/Data Driver 3 GHz Fmax Anything to ECL Translation
Output Options
Open Emitter
Target applications: * High speed clock / data lines that require translation * Multiple destination (daisy chain) applications
OUT OUT*
.unctional Block Diagram
VIH
OUT0 OUT0*
Input Swing
VCC
Output Swing
VIL
IN IN*
DQ D* Q*
0 1
OUT1 OUT1*
VIH
OUT2 OUT2*
. . . .
VEE
VGG 1.3V 700 mV VEE
VIL
CLK CLK* SEL* SEL
OUT3 OUT3*
Pin Description
VGG OUT0 OUT0* N/C N/C OUT1 OUT1* VEE
OUT4 OUT4*
Package Information
32 pin, 5 mm x 5 mm TQFP Package
VEE SEL SEL* CLK CLK* IN IN* VCC
VGG N/C N/C OUT2 OUT2* N/C N/C VEE
N/C N/C OUT3* OUT3 VGG
VEE OUT4* OUT4
Revision 1/ January 23, 2001
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SK1526
Anything to ECL Translator
HIGH-PER.ORMANCE PRODUCTS DC Characteristics
Parameter Inputs Input High Input Low (IN - IN*, CLK - CLK*, SEL - SEL*) Differential Input Voltage Timing Inputs (CLK / CLK*) Input High Current Input Low Current .unctional Inputs (IN / IN*, SEL / SEL*) Input Current Outputs Digital Output Voltage Output Common Mode Range Power Supply Power Supply Current Positive Supply Voltage Negative Supply Voltage IEE ICC VCC VGG VEE VCC - VGG 95 45 3.3 0 -3.3 120 52 3.6 2.0 -3.0 3.6 mA mA V V V V | OUT - OUT* | (OUT + OUT*) / 2 600 VGG -1.5 700 VGG - 1.3 VGG -1.1 mV V VIH VIL | Input - Input* | IIH IIL IIH, IIL VEE + 2.0 VEE .2 +1 -1 -420 VCC VCC -.2 4.3 +25 +1 +250 V V V A A A Symbol Min Typ Max
PRELIMINARY
Units
2.0 -.1 -3.6 0
Test Conditions: Outputs terminated with 50 to VGG - 2V.
AC Characteristics
Parameter High Performance Option Propagation Delay CLK to OUT (SEL = 0) CLK to OUT (SEL = 1) SEL to OUT Channel to Channel Skew Maximum Operating .requency (Note 1) Minimum Pulse Width (Note 1) IN to CLK (Note 1) Set Up Time Hold Time Output Rise and .all Times (20% / 80%) Temperature Coefficient .max PW min Tsu Th Tr / Tf Tpd /T 3.0 160 100 100 125 <1 150 Tpd Tpd Tpd 490 340 330 590 440 430 690 540 530 <20 ps ps ps ps GHz ps ps ps ps ps / oC Symbol Min Typ Max Units
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
19
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SK1527
Anything to PECL Translator
HIGH-PER.ORMANCE PRODUCTS Description
The SK1527 is an extremely fast, stable, and accurate low skew 1:5 clock / signal distributor featuring a synchronous enable, which allows the outputs to be turned off and on without the risk of an upredictable output pulse. It is also capable of receiving inputs of any technology or voltage level. The D - flip-flop is triggered on the falling edge of the clock. The SK1527 uses 50 outputs with source /sink capability, and is optimized for: * High speed clock / data lines that require translation * Point to point, double termination applications
PRELIMINARY .eatures
* * * 1:5 Clock/Data Driver 3 GHz Fmax Anything to PECL Translation
Output Options
50 Source / Sink
VCC
50 50 4 mA VEE VEE 4 mA OUT OUT *
.unctional Block Diagram
VIH
OUT0 OUT0*
Input Swing
VCC
Output Swing
VCC 1.3V
VIL
IN IN*
DQ D* Q*
0 1
OUT1 OUT1*
VIH
OUT2 OUT2*
. . . .
VEE
350 mV
At destination (double termination)
VIL
VEE
CLK CLK* SEL* SEL
OUT3 OUT3*
Pin Description
VCC OUT0 OUT0* N/C N/C OUT1 OUT1* VEE
OUT4 OUT4*
Package Information
32 pin, 5 mm x 5 mm TQFP Package
VEE SEL SEL* CLK CLK* IN IN* VCC
VCC N/C N/C OUT2 OUT2* N/C N/C VEE
VEE OUT4* OUT4 N/C N/C OUT3* OUT3 VCC
Revision 1/ January 23, 2001
20
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SK1527
Anything to PECL Translator
HIGH-PER.ORMANCE PRODUCTS DC Characteristics
Parameter Inputs Input High Input Low (IN - IN*, CLK - CLK*, SEL - SEL*) Differential Input Voltage Timing Inputs (CLK / CLK*) Input High Current Input Low Current .unctional Inputs (IN / IN*, SEL / SEL*) Input Current Outputs Digital Output Voltage Output Common Mode Range Internal Current Source Output Impedance Power Supply Power Supply Current Positive Supply Voltage Negative Supply Voltage IEE VCC VEE 3.0 -3.6 135 3.3 -3.3 170 3.6 -3.0 mA V V | OUT - OUT* | (OUT + OUT*) / 2 ISINK ROUT 600 VCC - 1.5 4 40 700 VCC -1.3 5 45 VCC - 1.1 6 50 mV V mA VIH VIL | Input - Input* | IIH IIL IIH, IIL VEE + 2.0 VEE .2 +1 -1 -420 VCC VCC - .2 4.3 +25 +1 +250 V V V A A A Symbol Min Typ Max
PRELIMINARY
Units
Test Conditions: Outputs unterminated.
AC Characteristics
Parameter High Performance Option Propagation Delay CLK to OUT (SEL = 0) CLK to OUT (SEL = 1) SEL to OUT Channel to Channel Skew Maximum Operating .requency (Note 1) Minimum Pulse Width (Note 1) IN to CLK (Note 1) Set Up Time Hold Time Output Rise and .all Times (20% / 80%) Temperature Coefficient .max PW min Tsu Th Tr / Tf Tpd /T 3.0 160 100 100 125 <1 150 Tpd Tpd Tpd 490 340 330 590 440 430 690 540 530 <20 ps ps ps ps GHz ps ps ps ps ps / oC Symbol Min Typ Max Units
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001 21 www.semtech.com
SK1528
Anything to ECL Translator
HIGH-PER.ORMANCE PRODUCTS Description
The SK1528 is an extremely fast, stable, and accurate low skew 1:5 clock / signal distributor featuring a synchronous enable, which allows the outputs to be turned off and on without the risk of an upredictable output pulse. It is also capable of receiving inputs of any technology and voltage level. The D - flip-flop is triggered on the falling edge of the clock. The SK1528 has 50 outputs with source /sink capability, and is optimized for: * High speed clock / data lines that require translation * Point to point, double termination applications
PRELIMINARY .eatures
* * * 1:5 Clock/Data Driver 3 GHz Fmax Anything to ECL Translation
Output Options
50 Source / Sink
VGG
50 50 4 mA VEE VEE 4 mA OUT OUT *
.unctional Block Diagram
VIH
OUT0 OUT0*
Input Swing
VCC
Output Swing
VIL
IN IN*
DQ D* Q*
0 1
OUT1 OUT1*
VIH
OUT2 OUT2*
. . . .
VEE
At destination (double termination)
VGG 1.3V 350 mV VEE
VIL
CLK CLK* SEL* SEL
OUT3 OUT3*
Pin Description
VGG OUT0 OUT0* N/C N/C OUT1 OUT1* VEE
OUT4 OUT4*
Package Information
32 pin, 5 mm x 5 mm TQFP Package
VEE SEL SEL* CLK CLK* IN IN* VCC
VGG N/C N/C OUT2 OUT2* N/C N/C VEE
N/C N/C OUT3* OUT3 VGG
VEE OUT4* OUT4
Revision 1/ January 23, 2001
22
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SK1528
Anything to ECL Translator
HIGH-PER.ORMANCE PRODUCTS DC Characteristics
Parameter Inputs Input High Input Low (IN - IN*, CLK - CLK*, SEL - SEL*) Differential Input Voltage Timing Inputs (CLK / CLK*) Input High Current Input Low Current .unctional Inputs (IN / IN*, SEL / SEL*) Input Current Outputs Digital Output Voltage Output Common Mode Range Internal Current Source Output Impedance Power Supply Power Supply Current Positive Supply Voltage Negative Supply Voltage IEE ICC VCC VGG VEE VCC - VGG 135 45 3.3 0 -3.3 170 52 3.6 2.0 -3.0 3.6 mA mA V V V V | OUT - OUT* | (OUT + OUT*) / 2 ISINK ROUT 600 VGG - 1.5 4 40 700 VGG -1.3 5 45 VGG - 1.1 6 50 mV V mA VIH VIL | Input - Input* | IIH IIL IIH, IIL VEE + 2.0 VEE .2 +1 -1 -420 VCC VCC - .2 4.3 +25 +1 +250 V V V A A A Symbol Min Typ Max
PRELIMINARY
Units
2.0 -.1 -3.6 0
Test Conditions: Outputs unterminated.
AC Characteristics
Parameter High Performance Option Propagation Delay CLK to OUT (SEL = 0) CLK to OUT (SEL = 1) SEL to OUT Channel to Channel Skew Maximum Operating .requency (Note 1) Minimum Pulse Width (Note 1) IN to CLK (Note 1) Set Up Time Hold Time Output Rise and .all Times (20% / 80%) Temperature Coefficient .max PW min Tsu Th Tr / Tf Tpd /T 3.0 160 100 100 125 <1 150 Tpd Tpd Tpd 490 340 330 590 440 430 690 540 530 <20 ps ps ps ps GHz ps ps ps ps ps / oC Symbol Min Typ Max Units
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
23
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SK1529
Anything to PECL Translator
HIGH-PER.ORMANCE PRODUCTS Description
The SK1529 is an extremely fast, stable, and accurate low skew 1:5 clock / signal distributor featuring a synchronous enable, which allows the outputs to be turned off and on without the risk of an upredictable output pulse. It is also capable of receiving inputs of any technology and voltage level. The D - flip-flop is triggered on the falling edge of the clock. The SK1529 uses 50 outputs with source /sink capability, and is optimized for: * High speed clock / data lines that require translation * Point to point, series termination applications
PRELIMINARY .eatures
* * * 1:5 Clock/Data Driver 3 GHz Fmax Anything to PECL Translation
Output Options
50 Source / Sink
VCC
50 50 8 mA VEE VEE 8 mA OUT OUT *
.unctional Block Diagram
VIH
OUT0 OUT0*
Input Swing
VCC
Output Swing
1.3V
VCC
VIL
IN IN*
DQ D* Q*
0 1
OUT1 OUT1*
VIH
OUT2 OUT2*
. . . .
VEE
700 mV 3.3V or 5.2V
VIL
VEE
CLK CLK* SEL* SEL
OUT3 OUT3*
Pin Description
VCC OUT0 OUT0* N/C N/C OUT1 OUT1* VEE
OUT4 OUT4*
Package Information
32 pin, 5 mm x 5 mm TQFP Package
VEE SEL SEL* CLK CLK* IN IN* VCC
VCC N/C N/C OUT2 OUT2* N/C N/C VEE
VEE OUT4* OUT4 N/C N/C OUT3* OUT3 VCC
Revision 1/ January 23, 2001
24
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SK1529
Anything to PECL Translator
HIGH-PER.ORMANCE PRODUCTS DC Characteristics
Parameter Inputs Input High Input Low (IN - IN*, CLK - CLK*, SEL - SEL*) Differential Input Voltage Timing Inputs (CLK / CLK*) Input High Current Input Low Current .unctional Inputs (IN / IN*, SEL / SEL*) Input Current Outputs Digital Output Voltage Output Common Mode Range Internal Current Source Output Impedance Power Supply Power Supply Current Positive Supply Voltage Negative Supply Voltage IEE VCC VEE 3.0 -3.6 175 3.3 -3.3 221 3.6 -3.0 mA V V | OUT - OUT* | (OUT + OUT*) / 2 ISINK ROUT 600 VCC - 1.5 6.5 40 700 VCC -1.3 8 45 VCC - 1.1 10 50 mV V mA VIH VIL | Input - Input* | IIH IIL IIH, IIL VEE + 2.0 VEE .2 +1 -1 -420 VCC VCC - .2 4.3 +25 +1 +250 V V V A A A Symbol Min Typ Max
PRELIMINARY
Units
Test Conditions: Outputs unterminated.
AC Characteristics
Parameter High Performance Option Propagation Delay CLK to OUT (SEL = 0) CLK to OUT (SEL = 1) SEL to OUT Channel to Channel Skew Maximum Operating .requency (Note 1) Minimum Pulse Width (Note 1) IN to CLK (Note 1) Set Up Time Hold Time Output Rise and .all Times (20% / 80%) Temperature Coefficient .max PW min Tsu Th Tr / Tf Tpd /T 3.0 160 100 100 125 <1 150 Tpd Tpd Tpd 490 340 330 590 440 430 690 540 530 <20 ps ps ps ps GHz ps ps ps ps ps / oC Symbol Min Typ Max Units
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001 25 www.semtech.com
SK1530
Anything to ECL Translator
HIGH-PER.ORMANCE PRODUCTS Description
The SK1530 is an extremely fast, stable and accurate low skew 1:5 clock / signal distributor featuring a synchronous enable, which allows the outputs to be turned off and on without the risk of an upredictable output pulse. It is also capable of receiving inputs of any technology or voltage level. The D - flip-flop is triggered on the falling edge of the clock. The SK1530 uses 50 outputs with source /sink capability, and is optimized for: * High speed clock / data lines that require translation * Point to point, series termination applications
PRELIMINARY .eatures
* * * 1:5 Clock/Data Driver 3 GHz Fmax Anything to ECL Translation
Output Options
50 Source / Sink
VGG
50 50 8 mA VEE VEE 8 mA OUT OUT *
.unctional Block Diagram
VIH
OUT0 OUT0*
Input Swing
VCC
Output Swing
VIL
IN IN*
DQ D* Q*
0 1
OUT1 OUT1*
VIH
OUT2 OUT2*
. . . .
VEE
VGG 1.3V 700 mV VEE
VIL
CLK CLK* SEL* SEL
OUT3 OUT3*
Pin Description
VGG OUT0 OUT0* N/C N/C OUT1 OUT1* VEE
OUT4 OUT4*
Package Information
32 pin, 5 mm x 5 mm TQFP Package
VEE SEL SEL* CLK CLK* IN IN* VCC
VGG N/C N/C OUT2 OUT2* N/C N/C VEE
N/C N/C OUT3* OUT3 VGG
VEE OUT4* OUT4
Revision 1/ January 23, 2001
26
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SK1530
Anything to ECL Translator
HIGH-PER.ORMANCE PRODUCTS DC Characteristics
Parameter Inputs Input High Input Low (IN - IN*, CLK - CLK*, SEL - SEL*) Differential Input Voltage Timing Inputs (CLK / CLK*) Input High Current Input Low Current .unctional Inputs (IN / IN*, SEL / SEL*) Input Current Outputs Digital Output Voltage Output Common Mode Range Internal Current Source Output Impedance Power Supply Power Supply Current Positive Supply Voltage Negative Supply Voltage IEE ICC VCC VGG VEE VCC - VGG 175 45 3.3 0 -3.3 221 52 3.6 2.0 -3.0 3.6 mA mA V V V V | OUT - OUT* | (OUT + OUT*) / 2 ISINK ROUT 600 VGG - 1.5 6.5 40 700 VGG -1.3 8 45 VGG - 1.1 10 50 mV V mA VIH VIL | Input - Input* | IIH IIL IIH, IIL VEE + 2.0 VEE .2 +1 -1 -420 VCC VCC - .2 4.3 +25 +1 +250 V V V A A A Symbol Min Typ
PRELIMINARY
Max
Units
2.0 -.1 -3.6 0
Test Conditions: Outputs unterminated.
AC Characteristics
Parameter High Performance Option Propagation Delay CLK to OUT (SEL = 0) CLK to OUT (SEL = 1) SEL to OUT Channel to Channel Skew Maximum Operating .requency (Note 1) Minimum Pulse Width (Note 1) IN to CLK (Note 1) Set Up Time Hold Time Output Rise and .all Times (20% / 80%) Temperature Coefficient .max PW min Tsu Th Tr / Tf Tpd /T 3.0 160 100 100 125 <1 150 Tpd Tpd Tpd 490 340 330 590 440 430 690 540 530 <20 ps ps ps ps GHz ps ps ps ps o ps / C Symbol Min Typ Max Units
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001 27 www.semtech.com
SK1599
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS Description
The SK1599 is an extremely fast, stable, and accurate low skew 1:5 clock / signal distributor featuring a synchronous enable, which allows the outputs to be turned off and on without the risk of an unpredictable output pulse. The D - flip-flop is triggered on the falling edge of the clock. The SK1599 has open collector (CML) outputs, targeted for: * Ultra high speed applications * Adjustable common mode levels at the destination.
PRELIMINARY .eatures
* * * 1:5 Clock/Data Driver 3 GHz Fmax 3.3V / 5.2V Compatible
Output Options
Open Collector
OUT OUT*
.unctional Block Diagram
12 mA
OUT0 OUT0*
VEE
IN IN*
DQ D* Q*
0 1
OUT1 OUT1*
CLK CLK* SEL* SEL
OUT2 OUT2*
OUT3 OUT3*
OUT4 OUT4*
Pin Description
VCC OUT0 OUT0* N/C N/C OUT1 OUT1* VEE
Package Information
32 pin, 5 mm x 5 mm TQ.P Package
VEE SEL SEL* CLK CLK* IN IN* VCC
VCC N/C N/C OUT2 OUT2* N/C N/C VEE
VEE OUT4* OUT4 N/C N/C OUT3* OUT3 VCC
Revision 1/ January 23, 2001
28
www.semtech.com
SK1599
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS DC Characteristics PRELIMINARY
Parameter Inputs Input High Input Low (IN - IN*, CLK - CLK*, SEL - SEL*) Differential Input Voltage Timing Inputs (CLK / CLK*) Input High Current Input Low Current .unctional Inputs (IN / IN*, SEL / SEL*) Input Current Outputs Output Current High Output Current Low Power Supply Power Supply Current Power Supply Voltage
Symbol
Min
Typ
Max
Units
VIH VIL | Input - Input* | IIH IIL IIH, IIL
VEE + 2.0 VEE .2 +1 -1 -420
VCC VCC -.2 4.3 +25 +1 +250
V V V A A A
IOH IOL
0 12
mA mA
IEE VCC - VEE
3.0
145
183 5.5
mA V
Test Conditions: Outputs terminated with 50 to VCC.
AC Characteristics
Parameter High Performance Option Propagation Delay CLK to OUT (SEL = 0) CLK to OUT (SEL = 1) SEL to OUT Channel to Channel Skew Maximum Operating .requency (Note 1) Minimum Pulse Width (Note 1) IN to CLK (Note 1) Set Up Time Hold Time Output Rise and .all Times (20% / 80%) Temperature Coefficient .max PW min Tsu Th Tr / Tf Tpd /T 3.0 160 100 100 125 <1 150 Tpd Tpd Tpd 490 340 330 590 440 430 690 540 530 <20 ps ps ps ps GHz ps ps ps ps ps / oC Symbol Min Typ Max Units
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001 29 www.semtech.com
SK15XX Family
1:5 Signal Distribution
HIGH-PER.ORMANCE PRODUCTS Ordering Information
Or d e r i n g Co d e SK1500 SK1501 SK1502 SK1503 SK1504 SK1525 SK1526 SK1527 SK1528 SK1529 SK1530 SK1599 Package ID 32 - T Q. P 5 X 5 mm 32 - T Q. P 5 X 5 mm 32 - T Q. P 5 X 5 mm 32 - T Q. P 5 X 5 mm 32 - T Q. P 5 X 5 mm 32 - T Q. P 5 X 5 mm 32 - T Q. P 5 X 5 mm 32 - T Q. P 5 X 5 mm 32 - T Q. P 5 X 5 mm 32 - T Q. P 5 X 5 mm 32 - T Q. P 5 X 5 mm 32 - T Q. P 5 X 5 mm Temperature Ra n g e C o mme r c i a l C o mme r c i a l C o mme r c i a l C o mme r c i a l C o mme r c i a l C o mme r c i a l
+ + + PLCC Devices
PRELIMINARY
Tape and Reel
Semtech's tape and reel packaging fully conforms to the latest EIA-481-1A and EIA-481-2A specifications. The antistatic embossed tape provides a secure cavity sealed with a peel-back cover tape.
Typical + +++ + + + + + + + + +
+++
+++ PIN 1
+ + +View from Tape Side
Linear Direction of Travel Typical
+
+
+
+
+ View from Tape Side
C o mme r c i a l C o mme r c i a l C o mme r c i a l
Linear Direction of Travel SOIC & MSOP Devices
C o mme r c i a l
Typical
C o mme r c i a l C o mme r c i a l
LQFP & TQFP Devices ++
+ +
+
+ +
+ +
+
+ +
+ +
+
+ +
+ + View from Tape Side
PIN 1
Note: For tape and reel, add the letter "T" at the end of Ordering Code.
Device Type PLCC-28 SOIC-8 SOIC-16 SOIC-20 MSOP-8 MSOP-10 LQ.P-32 (7 x 7 mm) TQ.P-32 (7 x 7 mm) TQ.P-32 (5 x 5 mm) Tape Width (mm) 24 12 16 24 12 12 16 16 16 Max Device/Reel 750 2,500 2,500 1,000 2,500 2,500 1,000 1,000 1,000 Reel Size (inch) 13 13 13 13 13 13 13 13 13 Max Device/Tube 37 98 49 38 50 50 250 (tray) 250 (tray) 360 (tray)
Linear Direction of Travel
Ordering Information To order devices which are to be delivered in Tape and Reel, add the suffix T to the device number being ordered.
Contact Information
Division Headquarters 10021 Willow Creek Road San Diego, CA 92131 Phone (858) 695-1808 FAX (858)695-2633
Semtech Corporation High-Performance Products Division
Marketing Group 1111 Comstock Street Santa Clara, CA 95054 Phone: (408) 566-8776 FAX: (408) 727-8994 www.semtech.com
Revision 1/ January 23, 2001
30


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