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Features
* On-chip Control Functions are Available for System Gain Adjust
(dB Linear versus DC Current)
* Low Noise LO Design * ESD Protected
Benefits
* All Front-end Functions of a High-performance FM Receiver Except the RF
Preamplifier are Integrated
FM Receiver IC U4065B
* Improved Dynamic Range by High Current Double-balanced Mixer Design and a New
AGC Conception with 3 Loops On-chip
* Improved Blocking and Intermod Behavior Due to a Unique "Interference" Sensor
Controlling the AGC
* Easy Cascading of 3 IF Filters (Ceramic) Enabled by Two On-chip IF Preamplifiers
Description
The IC U4065B is a bipolar integrated FM front-end circuit. It contains a mixer, an oscillator, two IF preamplifiers and an unique interference sensor. The device is designed for high-performance car radio and home receiver applications.
Rev. 4807A-AUDR-05/04
Figure 1. Block Diagram
ANT VS IF tank IF BPF IF gain adjust IF BPF IF output IF BPF RF tank 16 14 PIN ATT Mixer IF 1 IF 2 2 19 18 20 21 4 7 5 3 VS
RF RF tank NC 12
Interference mixer
AGC wide band and IF
13 AGC adjust (wide band)
LO tank
23 24 Local oscillator
IF and detector
VREF = 4 V Voltage regulator 17
22
1
11 Interference IF BPF
9
8
10
6 + VS
LO output VTUNE
VS AGC level
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Pin Configuration
Figure 2. Pinning SO24
1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 LOB LOE GND5 IF1IN GND4 MIXOUT2 MIXOUT1 VREF MIXIN2 MIXIN1
LOBUFF GND1 IF2OUT GAINIF1 IF2IN VS IF1OUT GND2 IMIFIN AGCOUT IMMIXOUT NC
14 GND3 13 AGCWB
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Pin Description
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Symbol LOBUFF GND1 IF2OUT GAINIF1 IF2IN VS IF1OUT GND2 IMIFIN AGCOUT IMMIXOUT NC AGCWB GND3 MIXIN1 MIXIN2 VREF MIXOUT1 MIXOUT2 GND4 IF1IN GND5 LOE LOB Function Buffered local oscillator output Ground of the second IF amplifier Output of the second IF amplifier Gain control of the first IF amplifier Input of the second IF amplifier Supply voltage Output of the first IF amplifier Ground Input of the amplifier for the IM sensor Output of the automatic gain control Output of the intermodulation mixer Not connected Threshold adjustment of the wideband AGC Mixer ground Input 1 of the double-balanced mixer Input 2 of the double-balanced mixer Reference voltage output Mixer output 1 Mixer output 2 Ground of the first IF amplifier Input of the first IF amplifier Oscillator ground Local oscillator (emitter) Local oscillator (base)
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LOBUFF
Figure 3. Buffered Local Oscillator Output
+ 23
50 1 ESD
1V
The buffered local oscillator used for output, drives the FM input of the PLL circuit (for example, U428xBM family). The typical parallel output resistance at 100 MHz is 70 , the parallel output capacitance is about 10 pF. When using an external load of 500 /10 pF, the oscillator swing is about 100 mV. The second harmonic of the oscillator frequency is less than -15 dBc.
GND1
Figure 4. Ground of the Second IF Amplifier
8 2 ESD
There is no internal connection to the other ground pins.
IF2OUT
Figure 5. Output of the Second IF Amplifier
3 ESD VS
VREF
The parallel output capacitance to ground is about 7 pF. The external load resistance must be connected to VS. The DC current into the pin is typically 3 mA.
Note: The supply voltage VS has to be protected against IF distortion.
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GAINIF1
Figure 6. Gain Control of the First IF Amplifier
17 VREF
2 k
4
ESD
The gain of the first IF amplifier can be adjusted by a resistor to ground. This is useful, for example, to compensate for the insertion loss tolerances of the ceramic BPFs. It must be ensured that the output current of the pin does not exceed 150 A in any case. Linear increasing in the current out of GAINIF1 results in a linear dB increase of the gain (0.15 dB/A). I4 = 0, thus, G = Gmin = 2 dB I4 = 140 A, thus, G = Gmax = 22 dB
IF2IN
Figure 7. Input of the Second IF Amplifier
VREF
5
ESD
The parallel input resistance is 330 . The parallel input capacitance is about 12 pF. No DC current is allowed. To avoid overload of this stage, an internal detector watches the input level and causes current at the AGCOUT pin.
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IF1OUT
Figure 8. Output of the First IF Amplifier
VS ESD 330 7
The parallel output resistance is 330 which allows the use of standard ceramic BPF. The parallel output capacitance is about 7 pF. The DC voltage at the pin is 0.5 V less than VS.
IMIFIN
Figure 9. Input of the IF Amplifier for the IM Sensor
9
ESD
The parallel input resistance is 330 . The amplifier is extremely sensitive to AC signals. An IF signal with a few hundred V at this pin will cause current at the AGC output. Therefore, attention needs to be paid when connecting the standard ceramic filter between IMOUT and this pin. The reference point of the filter has to be free of any AC signal, no DC current shall appear at this pin.
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AGCOUT
Figure 10. Output of the Automatic Gain Control
10
1k ESD 1V
The AGC output is an open collector output. The current of the pin diode is this current multiplied by the current gain of the external PNP transistor. The DC voltage at the pin may vary from 2 V to VS, therefore, this pin can easily be used as an indicator of the AGC regulation state.
IMMIXOUT
Figure 11. Output of the Intermodulation Mixer
VS
ESD 300 11 1V
The parallel output resistance is 330 which allows the use of standard ceramic BPF without any further matching network. It must be ensured that the ground pin of the filter is free of AC signals.
AGCWB
Figure 12. Threshold Adjustment of the Wideband AGC
VREF 35k
32k
ESD 13
The threshold of the wideband AGC can be adjusted by an external resistor to ground. The setting range is 10 dB. For minimum blocking, this pin is connected to ground. To set the threshold to lower levels, the resistance should have a value of up to a few hundred k.
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MIXIN1
Figure 13. Input 1 of the Double-balanced Mixer
VREF 2.5k 15 ESD
The parallel input resistance is 1.2 k. The parallel input capacitance is about 9 pF. When using the mixer in an unbalanced way, this pin needs to be grounded for RF signals by an external capacitance of a few nF. DC current is not allowed.
MIXIN2
Figure 14. Input 2 of the Double-balanced Mixer
VREF 2.5k 16 ESD
The parallel input resistance is 1.6 k. The parallel input capacitance is about 7 pF. The double sideband noise figure of the unbalanced mixer is about 7 dB. If using the mixer in balanced mode, the noise figure will be reduced by about 0.8 dB.
VREF
Figure 15. Reference Voltage Output
VS 200
4.6 V 17 ESD
The internal temperature-compensated reference voltage is 3.9 V and it is used as bias voltage for most blocks. Therefore, the electrical characteristics of the U4065B are mainly independent of the supply voltage. The internal output resistance of the reference voltage is less than 10 . To avoid internal coupling across this pin, external capacitors are required. The maximum output current is IREF = 5 mA.
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MIXOUT1, MIXOUT2
Figure 16. Mixer Output 1, 2
18 ESD 19
The mixer output is an open collector of a bipolar transistor. The minimum voltage at these pins is 5 V (VS - voltage swing). The DC current into these pins is typically 9 mA. Good LO and RF suppression at the mixer output can be achieved by symmetrical load conditions at the pins MIXOUT1 and MIXOUT2.
IF1IN
Figure 17. Input of the First IF Amplifier
21 330
VREF
ESD
The typical input resistance is 330 . The DC voltage is almost identical to the reference voltage. DC current must be avoided at this pin.
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LOE
Figure 18. Emitter of the Local Oscillator
23
ESD
An external capacitor is connected between LOE and ground. The ground pin of this capacitor must be connected to pin GND5, the chip-internal ground of the local oscillator.
LOB
Figure 19. Base of the Local Oscillator
24
ESD
The tank of the local oscillator is connected at pin LOB. The ground pin of this tank needs to be connected to pin GND5, the chip-internal ground of the local oscillator's pin 24. The resonant resistance of the tank should be about 250 . Minimum Q of the unloaded tank is 50.
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Functional Description
The U4065B FM-frontend IC is the dedicated solution for high-end car radios. A new design philosophy enables to build up tuners with superior behavior. This philosophy is based on the fact that the sensitivity of state of the art designs is at the physical border and cannot be enhanced any more. On the other hand, the spectral power density in the FM-band increases. An improvement of reception can only be achieved by increasing the dynamic range of the receiver. This description is to give the designer an introduction to get familiar with this new product and its philosophy.
The Signal Path
The U4065B offers the complete signal path of an FM-frontend IC including a highly linear mixer and two IF preamplifiers. The mixer is a double-balanced, high-current Gilbert Cell. A high transit frequency of the internal transistors enables the use of the emitter grounded circuit with its favorable noise behavior. The full balanced output offers LO carrier reduction. The first IF preamplifier has a dB-linear gain adjustment by DC means. Thus, different ceramic filter losses can be compensated and the overall tuner gain can be adapted to the individual requirements. The low noise design suppresses post stage noise in the signal path. Input and output resistance is 330 to support standard ceramic filters. This is achieved without feedback, which would cause different input impedances when varying the output impedance. The second IF preamplifier enables the use of three ceramic filters with real 330 inputand output termination. Feedthrough of signals is kept low. The high level of output compression is necessary to keep up a high dynamic range. Beneath the signal path the local oscillator part and the AGC signal generation can be found on chip. The local oscillator uses the collector grounded colpitts type. A low phase noise is achieved with this access. A mutual coupling in the oscillator coil is not necessary.
The AGC Concept
Special care was taken to design a unique AGC concept. It offers 3 AGC loops for different kinds of reception conditions. The most important loop is the interference sensor part. In today's high-end car radios, the FM AGC is state of the art. It is necessary to reduce the influence of 3rd and higher order intermodulation to sustain reception in the presence of strong signals in the band. On one hand, it makes sense to reduce the desired signal level by AGC as few as possible to keep up stereo reception, on the other hand two or more strong out-of-channel signals may interfere and generate an intermodulation signal on the desired frequency. By introducing input attenuation, the level of the intermod signal decreases by a higher order, whereas the level of the desired signal shows only a linear dependency on the input attenuation. Therefore, input attenuation by pin diodes may keep up reception in the presence of strong signals. The standard solution to generate the pin diode current is to pick up the RF-signal in front of the mixer. Because the bandwidth at that point is about 1.5 MHz, this is called wideband AGC. The threshold of AGC start is a critical parameter. A low threshold does not allow any intermodulation but has the disadvantage of blocking if there is only one strong station on the band or if the intermod signals do not cover the desired channel. A higher AGC threshold may tolerate a certain ground floor of intermodulation. This avoids blocking, but it has the disadvantage, that no reception is possible, if the interfering signals generate an intermod signal inside the desired channel. This contradiction could not be overcome in the past.
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With the new U4065B IC, there is a unique access to this problem. This product has an interference sensor on chip. Thus, an input signal attenuation is only performed if the interfering signals do generate an intermod signal inside the desired channel. If they do not, the existing wideband AGC is active but up to 20 dB higher levels. The optimum AGC state is always generated. The Figure 20 to Figure 23 on page 14 illustrate the situation. In Figure 20 the AGC threshold of a standard tuner is high to avoid blocking. But then the intermod signal suppresses the desired signal. The interference sensor of the U4065B ensures that the AGC threshold is kept low as illustrated in Figure 21 on page 14. In Figure 22 on page 14 the situation is reversed. The AGC threshold of a standard tuner is kept low to avoid intermod problems. But then blocking makes the desired signal level drop below the necessary stereo level. In this case, the higher wideband AGC level of the U4065B enables perfect stereo reception. By principle, this interference sensor is an element with a third order characteristic. For input levels of zero, the output level is zero, too. With increasing input level, the output level is increased with the power of three, thus preferring intermod signals compared to linear signals. At the same time, a down conversion to the IF level of 10.7 MHz is performed. If a corresponding 10.7 MHz IF filter selects the intermod signals, only an output is generated, if an intermod signal inside the 10.7 MHz channel is present. The circuit blocks interference sensor and IF, and detector build up a second IF chain. In an FM system, the maximum deviation of a 3rd order intermod signal is the triple max deviation of the desired signal. Therefore, the ceramic IF BPF between pin 11 and pin 9 may be a large bandwidth type. This is all that is needed for this unique feature. A further narrow band AGC avoids overriding the second IF amplifier. The amplitude information of the channel is not compressed in order to maintain multipath detection in the IF part of the receiver. Figure 20. A High AGC Threshold Causes the Intermod Signal to Suppress the Desired Signal
Level
Interfering signals
Intermod signal
Intermod signal
Desired signal Stereo-level
Noise floor
Desired frequency
Frequency
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Figure 21. AGC Threshold Settings
Level
Interfering signals
Desired signal Intermod signal
Stereo-level Intermod signal
Noise floor
Desired frequency
Frequency
Figure 22. A Low AGC Threshold Causes the Blocking Signal to Suppress the Desired Signal
Level
Strong signal
Stereo-level Desired signal
Noise floor
Desired frequency
Frequency
Figure 23. The Correct AGC Threshold Enables Optimum Reception
Level
Strong signal
Desired signal Stereo-level
Noise floor
Desired frequency
Frequency
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Absolute Maximum Ratings
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Reference point is ground (pins 2, 8, 14, 20 and 22) Parameters Supply voltage Power dissipation at Tamb = 85C Junction temperature Ambient temperature range Storage temperature range Electrostatic handling: Human body model (HBM), all I/O pins tested against the supply pins Symbol VS Ptot Tj Tamb Tstg VESD Value 10 470 125 -30 to +85 -50 to +125 2000 Unit V mW C C C V
Thermal Resistance
Parameters Thermal resistance Symbol RthJA Value 90 Unit K/W
Electrical Characteristics
VS = 8.0 V, fRF = 98 MHz, fOSC 108.7 MHz, fIF = fOSC - fRF = 10.7 MHz Reference point is ground (pins 2, 8, 14, 20, and 22),Tamb = 25C, unless otherwise specified.
Parameters Supply voltage Supply current Test Conditions Pin 3, 6, 10, 18, 19 3, 6, 10, 18, 19 24 23 1 1 1 Between 1 and 23 GC IP3 gC NFDSB 15 15 16 16 Between 15 and 16 Between 15 and 16 18 and 19 Rignd15 Cignd15 Rignd16 Cignd16 Rii15,16 Cii15,16 Cignd18,19 5 4 RLO 70 0.9 7 6 8 7 1.2 9 1.6 7 1.6 5 9 10 14 dB dBm mA/V dB k pF k pF k pF pF Symbol VS Itot VLOB VLOE VLOBUFF 70 Min. 7 Typ. 8 37 160 100 90 Max. 10 47 Unit V mA
Oscillator (GND5 Has to be Connected to External Oscillator Components) Oscillator voltage Harmonics Output resistance Voltage gain Conversion power gain 3rd-order input intercept Conversion transconductance Noise figure Input resistance to ground Input capacitance to ground Input resistance to ground Input capacitance to ground Input-input resistance Input-input capacitance Output capacitance to GND Mixer (GND3 Has to be Separated from GND1, GND2 and GND4) Source impedance: RG15,16 = 200 Load impedance: RL18,19 = 200 f = 100 MHz f = 100 MHz f = 100 MHz f = 100 MHz RG24 = 220 , unloaded Q of LOSC = 70, RL1 = 520 mV 220 -15 dBc
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Electrical Characteristics (Continued)
VS = 8.0 V, fRF = 98 MHz, fOSC 108.7 MHz, fIF = fOSC - fRF = 10.7 MHz Reference point is ground (pins 2, 8, 14, 20, and 22),Tamb = 25C, unless otherwise specified.
Parameters First IF Preamplifier (IF 1) Gain control deviation by I4 Gain control slope External control current to ground At Gmin At Gnom At Gmax Power gain At I4min At I4nom At I4max Noise figure At Gmax At Gnom At Gmin Temperature coefficient of the gain at Gnom 1 dB compression at Gnom -3 dB cut-off frequency at Gnom Input resistance Input capacitance Output resistance Output capacitance Second IF Preamplifier (IF 2) Source impedance: RG5 = 200 Load impedance: RL3 = 200 f = 10 MHz f = 10 MHz f = 10 MHz f = 10 MHz 7 7 21 21 7 7 Between 21 and 7 4 4 dGIF1/dI4 I4min I4nom I4max Gmin Gnom Gmax NFmin NFnom NFmax TKnom Vcnom fcnom RiIF1 CiIF1 RoIF1 CoIF1 270 270 -2.5 11 19 17 20 0.15 0 70 140 2 12 22 7 9 15 +0.045 70 50 330 5 330 7 400 400 2.5 16 28 24 dB dB/A Test Conditions Pin Symbol Min. Typ. Max. Unit
A
Source impedance: RG21 = 200 , Load impedance: RL7 = 200
dB
Between 21 and 7
dB
dB/K mV MHz pF pF
Power gain
Between 5 and 3
GIF2 NFIF2
15
18
19
dB
Noise figure 1 dB compression -3 dB cutoff frequency Parallel input resistance Parallel input capacitance Parallel output resistance Parallel output capacitance Voltage Regulator Regulated voltage Maximum output current Internal differential resistance, dc17/di17 when I17 = 0 Power supply suppression f = 50 Hz 17 17 17 17 f = 10 MHz f = 10 MHz f = 10 MHz f = 10 MHz 3 3 5 5 3 3
7 500 50 270 330 12 50 7 3.7 5 7 36 50 50 3.9 4.9 400
dB mV MHz pF k pF V mA dB
Vcomp fc RiIF2 CiIF2 RoIF2 CoIF2 Vref Iref rd17 psrr
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Electrical Characteristics (Continued)
VS = 8.0 V, fRF = 98 MHz, fOSC 108.7 MHz, fIF = fOSC - fRF = 10.7 MHz Reference point is ground (pins 2, 8, 14, 20, and 22),Tamb = 25C, unless otherwise specified.
Parameters IF2 input IF and detector Mixer input level of wideband sensor fiRF = 100 MHz V at pin 13 = 0 V I through pin 13 = 0 A Test Conditions Pin 5 9 Between 15 and 16 Symbol VthIF2 VthIFD VthWB1 VthWB2 Min. 85 42 95 85 Typ. 86 43 98 87 Max. 92 48 100 90 Unit dBV dBV dBV dBV AGC Input Voltage Thresholds (AGC Threshold Current is 10 A at Pin 10)
Figure 24. Test Circuit
VO IF
4.7n 4.7n 1 6 2 RL7 RG5 5 2 5 50 VO IF I3 RL3 10 2 6 VS I10 VS 6 2 5 50 1 VI IF
Gain IF 1 0 to 140 A I4 VI IF 4 50 1 5 21 6 4.7n VS 2 I18,19 RG21
50
5
20
7
1
3 IF 1 IF 2
VO IF
50
5
2 RL18,19
18 19 14 4.7n RG15,16 15 16 Mixer
AGC block 13 I13 R13 AGC adjust (wide band) Voltage regulator 6 VS I6 1 VREF = 4 V RG9 2 6
1
6
5 50
2
1
6 4.7n Interference mixer 8p RG24 24 Local Interference amplifier 5 33p 22
RLOBUFF
VI RF
17
9
4.7n
fOSC COSC
47p LOSC
23
oscillator
1 50 VI IF
1
11 RG11
12
8
470p
2
1 50
VO IF 1 RF Transformers MCL Type TMO 4 - 1 IL = 0.7 dB 5
Z/ 50 200
2 4
VLOBUFF fLOBUFF
RL1
6 4.7n
5
0
0
6
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Local Oscillator
Figure 25. LO Principle Application
RG24 VOSC24 47p 24 23 Local oscillator
fOSC
33p Oscillator output buffer 1 VOSC1, fOSC
520 Tamb
Free running oscillator frequency fOSC 110 MHz, VOSC24 = 160 mV, RG24 = 220 , QL = 70
Figure 26. Oscillator Swing versus Temperature
180 160 140
VOSC1 (mV)
120 100 80 60 40 20 0 -30 -10 10 30 50 70 90
Tamb (C)
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Mixer
fOSC = 110.7 MHz, VOSC24 160 mV, fIF = 10.7 MHz
Figure 27. Mixer Principle Application
50 2 VIRF1 fRF1 2 VIRF2 fRF2 1 5
IL1 2 6
14
Mixer
18 2 19 6
IL2 1 5 50
VOIF
15
RG24
24 23
Local oscillator
VS
47p
22p fOSC Tamb
Conversion power gain GC = 20 log (VOIF/VIRF) + IL1 (dB) + IL2 (dB) IL1, IL2 insertion loss of the RF transformers
Figure 28. Mixer Characteristic
120
100
Conversion characteristic
VOIF (dBV)
80
60
40
3rd order IM-characteristic
20
0 0 20 40 60 80 100 120
VIRF1, VIRF2 (dBV)
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Figure 29. Conversion Power Gain of the Mixer Stage versus Temperature
8 7 6 5 4 3 2 1 0 -30 -10 10 30 50 70 90
GC (dB)
Tamb (C)
Figure 30. Current of the Mixer Stage versus Temperature
11.0 10.7 10.4
I18, I19 (mA)
10.1 9.8 9.5 9.2 8.9 8.6 8.3 8.0 -30 -10 10 30 50 70 90
Tamb (C)
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First IF Preamplifier
Figure 31. First IF Preamplifier Principle Application
1:2 IL1 50 fIF 2VIIF 1 5
VIIF21 RG21 = 200 2 6
21
IF
7
VOIF7 RL7 = 200 2
2:1 IL2 1 5
VOIF
4
Tamb V (pin 4) I4
50
6
Power gain GIF = 20 log (VOIF/VIIF) + IL1 (dB) + IL2 (dB) IL1, IL2 = insertion loss of the RF transformers
Figure 32. Power Gain of the First IF Amplifier versus I4
25
20
T = 90C
15
GIF (dB)
T = -30C
10
5
0
T = 30 C
-5 0 20 40 60 80 100 120 140
I4 (A)
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Figure 33. Power Gain of the First IF Amplifier versus Frequency
25 20 15
Gmax
GIF1 (dB)
10 5 0 -5 -10 10 20 30 40 50 60
Gnom
Gmin
70
80
90
100
f (MHz)
Figure 34. V (Pin 4) versus I4
3.8 3.6 3.4 3.2
T = 90C
V4 (V)
3.0 2.8 2.6 2.4 2.2 2.0 0 20 40 60 80 100 120 140
T = 30C
T = -30C
I4 (A)
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Second IF Preamplifier
Figure 35. Second IF Preamplifier Principle Application
VS 330 VIIF5 RG5 = 200 2 6 Tamb 3 VOIF3 RL3 = 200 2 6 VOIF
1:2 IL1 50 fIF 2 VIIF 1 5
5
IF
2:1 IL2 1 5 50
Power gain GIF = 20 log (VOIF/VIIF) + IL1 (dB) + IL2 (dB) IL1; IL2 = insertion loss of the RF transformers
Figure 36. Power Gain of the Second IF Amplifier versus Temperature
18.5 18.0 17.5
GIF2 (dB)
17.0 16.5 16.0 15.5 15.0 -30
-20
-10
0
10
20
30
40
50
60
70
80
90
Tamb (C)
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Figure 37. Power Gain of the Second IF Amplifier versus Frequency
20 18 16 14
GIF2 (dB)
12 10 8 6 4 2 0 10 20 30 40 50 60 70 80 90 100
f (MHz)
Figure 38. AGC Threshold (110 = 1 A) of the Second IF Amplifier versus Temperature
87.0
Threshold (dBV)
86.8
86.6
86.4
86.2
86.0 -30 -10 10 30 50 70 90
Tamb (C)
Figure 39. AGC Characteristic of the Second IF Amplifier Input
10000.00
1000.00
100.00
110 (90C)/A
I10 (A)
110 (-30C)/A
10.00
1.00
0.10
110 (30C)/A
0.01 80 85 90 95 100 105
VIIF (dBA)
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Interference Sensor (Mixer)
Figure 40. Interference Sensor Principle Application
50 2 VIRF1 fIRF1 2 VIRF2 fIRF2 IL1 1 5 2 6 RG15/16 = 200
15
Interference mixer
RL11 = 200 11 2 6 IL2 1 5 50 VOIF fIF
16
fLO
Local oscillator
VS IL1 = IL2 = 0.7 dB
Test conditions for characteristic VOIF versus VIRF1: fLO = 100 MHz, fRF1 = 89.3 MHz, VIRF2 = 0, fIF = fLO - fRF1 = 10.7 MHz Test conditions for 3rd order IM-characteristic VOIF versus VIRF1, VIRF2: fLO = 100 MHz, fRF1 = 89.4 MHz, fRF2 = 89.5 MHz, fIF = fLO - (2 fRF1 - 1 fRF2) = 10.7 MHz IL1, IL2 = insertion loss of the RF transformer Figure 41. Characteristics of the Interference Sensor (Mixer)
90 80 70
VOIF(dBV)
60 50 40 30 20 10 0 60 65
Conversion characteristic
3rd order IM-characteristic
70
75
80
85
90
95
100
VIRF (dBV)
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Figure 42. Conversion Characteristic of the Interference Sensor (Mixer)
100 90 80
-30C
VOIF (dBV)
70 60 50 40 30 20 10 0 70 75 80 85 90 95 100 105 110 115
30C
90C
VIRF (dBV)
Figure 43. Third-order Interference Characteristic of the Interference Sensor (Mixer)
80
70
VOIF (dBV)
60
-30C
50
40
30C 90C
70 75 80 85 90 95 100 105 110 115
30
20
VIRF (dBV)
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Interference Sensor (Amplifier)
Figure 44. Interference Sensor Principle Application
1:2
VIIF9
9
10
IF
VS I10 Tamb
IL1 RG9 = 200 50 fIF 2 VIIF 1 5 2 6 IL1 = 0.7 dB
AGC Thresholds
Figure 45. AGC Threshold of the Interference IF Amplifier versus Temperature
45.0
Threshold (dBV
44.5 44.0 43.5 43.0 42.5 42.0 41.5 41.0 -30
-20
-10
0
10
20
30
40
50
60
70
80
90
Tamb (C)
Figure 46. Wideband AGC Threshold (I10 = 1 A) versus I13
105
108 MHz
VIRF (dBV)
100
95
88 MHz
90
98 MHz
85 0 5 10 15 20 25 30 35 40 45 50 55
I13 (A)
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Figure 47. Wideband AGC Threshold (I10 = 1 A) versus Temperature
100 98 96
U13 = 0 V
VIRF 15/16
94 92 90 88 86 84 82 80 -30 -20 -10 0 10 20 30 40 50 60 70 80 90
I13 = 30 A
I13 = 0 A
Tamb (C)
AGC Characteristics
Figure 48. AGC Characteristic of the Interference IF and Detector Block
10000.00
-30C
1000.00
90C
100.00
I10 (A)
30C
10.00
1.00
0.10
0.01 35 45 55 65 75 85 95
VIIF (dBV)
Figure 49. Characteristic of the Wideband AGC (I13 = 0 V)
10000.00
1000.00
-30C
100.00
I10 (A)
10.00
30C
1.00
90C
0.10
0.01 80 85 90 95 100 105 110 115 120
VIIF (dBV)
28
U4065B
4807A-AUDR-05/04
U4065B
Figure 50. Characteristic of the Wideband AGC (V13 = 0 V)
10000.00
1000.00
100.00
-30C
I10 (A)
10.00
30C
1.00
0.10
90C
0.01 90 95 100 105 110 115 120
VIRF (dBV)
DC Characteristics
Figure 51. Supply Current versus Supply Voltage
18 16 14 12
I6
I (mA)
10 8 6 4 2 0 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0
I18, I19 I3
VS (V)
Figure 52. Reference Voltage versus Temperature
3.88 3.87 3.86
VREF (V)
3.85 3.84 3.83 3.82 3.81 -30
-20
-10
0
10
20
30
40
50
60
70
80
90
Tamb (C)
29
4807A-AUDR-05/04
Figure 53. Supply Current versus Temperature
40 35 30 25
I3 + I6 + I18 + I19
I (mA)
20 15 10 5 0 -30 -10 10 30 50
I6 I18, I19 I3
70 90
Tamb (C)
Figure 54. Reference Voltage versus I17
4.00
3.95
VREF (V)
3.90
3.85
3.80
3.75 -10 -8 -6 -4 -2 0 2 4
I17 (mA)
30
U4065B
4807A-AUDR-05/04
4807A-AUDR-05/04
R10 (Tracking adj.) C21 R16 C12 18p R11 D4 4 1n 100p C17 150n 4.7p C26 22p 47p 24 C13 C14 C 16 1n 6.8p 13 L4 56k R14 160k L5 R17 470 820 CF3 C20 C23 D5 C22 6.8p 120k 6 L6 OSC 1 IF 2 C18 3 R13 15 R19 10k 1n 1.5k appr. 8 mA R4 470 R7 56k 1n C7 L2 2.2 H C8 R5 22 1p5 C10 10p R6 47k
Figure 55. Application Diagram
Q1 BFR93A 3 R3 D3 L3 1 6 10n CF1 12 56k C11 4
C1
D2
C2
2p7
S391D
U4065B
1 CF2 R15 Q2 BC858 22 R12 330k R9 220 C15 100n R18 330 C19 22n CF4 C24 1n Gain adj. 100k R21 R20 22k
R1
1n
22
C5
D1 S392D C3
R2 100
10n
10n
C4
L1
1n
220nH 470n C9
C25
27p
C6
1n VS = 8.5 V IF OUT LO OUT
ANT 75
VAGC
VTUN
1.7 - 6.5 V
U4065B
31
Part List
Item Q1 Q2 D1 D2 D3, D4, D5 L1 L2 L3 L4 L5 L6 CF1 CF2, CF3, CF4 Description BFR93AR (BFR93A) BC858 S392D S391D BB804 11 turns, 0.35 mm wire, 3 mm diameter (approximately 220 nH) 2.2 mH (high Q type) TOKO(R) 7KL-type, # 600ENF-7251x TOKO 7KL-type, # 291ENS 2341IB TOKO 7KL-type, # M600BCS-1397N TOKO 7KL-type, # 291ENS 2054IB TOKO type SKM 2 (230 KHZ) TOKO type SKM 3 (180 KHZ)
32
U4065B
4807A-AUDR-05/04
U4065B
Ordering Information
Extended Type Number U4065B-AFL U4065B-AFL3 Package SO24 plastic SO24 plastic Remarks - Taping according to ICE-286-3
Package Information
Package SO24
Dimensions in mm
15.55 15.30 9.15 8.65 7.5 7.3
2.35 0.25 0.10 13.97 13 0.25 10.50 10.20
0.4 1.27
24
technical drawings according to DIN specifications
1
12
33
4807A-AUDR-05/04
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4807A-AUDR-05/04

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