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DS4000 Digitally Controlled TCXO
www.maxim-ic.com
GENERAL DESCRIPTION
The DS4000 digitally controlled temperature-compensated crystal oscillator (DC-TCXO) features a digital temperature sensor, one fixed-frequency temperaturecompensated square-wave output (F1), one programmable temperature-compensated squarewave output (F2), and digital communication for frequency tuning (SDA, SCL).
FEATURES
Aging 1.0ppm (First Year) Frequency Stability 1.0ppm from -40C to +85C Frequency Versus Supply Stability of 1.0ppm per Volt Base Frequency is Digitally Tunable by 10ppm One Fixed-Frequency Output and One (n + 1) or 2(n + 1) Division of the Base Frequency Output Temperature Measurements from -40C to +85C with 10-Bit/+0.25C Resolution and 3C Accuracy 2-Wire Serial Interface
APPLICATIONS
Reference Oscillators in PLL Circuits Global Positioning Systems SATCOM Telecom Wireless Base Stations

PIN CONFIGURATION
TOP VIEW
A B 6 5 4 3 2 1 C D F2 VCC F1 VOSC GND GND
ORDERING INFORMATION
PART DS4000 DS4000N TEMP RANGE 0C to +70C -40C to +85C PIN-PACKAGE 24 BGA 24 BGA
SCL SDA A0 GNDOSC N.C. GND
Selector Guide appears end of data sheet.
BGA
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
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REV: 072403
DS4000 Digitally Controlled TCXO
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relative to Ground Storage Temperature Range Operating Voltage Range Operating Temperature Range Commercial Industrial Soldering Temperature -0.3V to +6.0V -55C to +85C VCC = 5V 5% 0C to +70C -40C to +85C See IPC/JEDEC J-STD-020A (2x max)
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
(VCC = 5V 5%, over the operating temperature range.) PARAMETER Supply Voltage Oscillator Supply Voltage Input Logic High Input Logic Low SYMBOL VCC VOSC VIH VIL CONDITIONS (Notes 1, 2) (Notes 1, 2) (Note 1) (Note 1) MIN 4.75 4.75 2.2 -0.3 TYP 5.0 5.0 MAX 5.25 5.25 VCC + 0.3 +0.8 UNITS V V V V
DC ELECTRICAL CHARACTERISTICS
(VCC = 5V 5%, over the operating temperature range.) PARAMETER Active Supply Current Active Oscillator Supply Current Output Logic High 2.4V Output Logic Low 0.4V Input Leakage I/O Leakage Temperature Conversion Time SYMBOL ICC IOSC IOH IOL ILI ILO tCONVT (Note 3) 250 CONDITIONS (Notes 3, 4) (Notes 3, 4) (Note 1) (Note 1) -1 4 1 1 300 MIN TYP 1.5 3.5 MAX 2 5.5 UNITS mA mA mA mA mA mA ms
Note 1: All voltages are referenced to ground. Note 2: For 10% operating range, contact factory. Note 3: Typical values are at +25C and nominal supplies. Note 4: These parameters are measured with the outputs disabled.
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DS4000 Digitally Controlled TCXO
AC ELECTRICAL CHARACTERISTICS: TCXO
(VCC = 5V 5%, over the operating temperature range.) PARAMETER Output Frequency Frequency Stability vs. Temperature Frequency Stability vs. Voltage Frequency Stability vs. Aging F1, F2 Rise and Fall Time, 10% to 90% Max Output Capacitive Load Duty Cycle SYMBOL F1 F2 DF/TA DF/V DF/Yr tR, tF CL tW / t 10Hz 100Hz 1kHz 10kHz 100kHz 40 50 -85 -115 -129 -134 -139 (Note 6) CONDITIONS CMOS (Note 5) MIN 10 -1.0 1.0 1.0 4 10 60 TYP MAX 20 +1.0 UNITS MHz ppm ppm/V ppm/Yr ns pF %
Phase Noise f1 Output (Note 7)
fN
dBc/Hz
Note 5: F1 is the base frequency as defined by the package markings. F2 is a programmable frequency output. The output frequency of F2 is derived from the base frequency, F1, by programming the F2 frequency select register and duty cycle (DC) bit in the TCXO control register. The minimum output frequency is F1 / (28 + 1) with DC = 0 and f1 / [2 x (28 + 1)] with DC = 1. Note 6: First year typical. Note 7: 16.384MHz, 5V, +25C with one of the two outputs enabled.
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DS4000 Digitally Controlled TCXO
AC ELECTRICAL CHARACTERISTICS--2-WIRE SERIAL INTERFACE
(VCC = 4.75 to 5.25V, TA = -40C to +85C) PARAMETER SCL Clock Frequency Bus Free Time Between a STOP and START Condition Hold Time (Repeated) START Condition Low Period of SCL Clock High Period of SCL Clock Setup Time for a Repeated START Condition Data Hold Time SYMBOL fSCL CONDITION Fast mode Standard mode Fast mode tBUF Standard mode Fast mode (Note 7) Standard mode (Note 7) Fast mode tLOW Standard mode Fast mode Standard mode Fast mode tSU:STA Standard mode tHD:DAT Fast mode (Note 8) Standard mode (Note 8) Fast mode (Note 9) Data Setup Time tSU:DAT Standard mode (Note 9) Rise Time of Both SDA and SCL Fall Time of Both SDA and SCL Setup Time for STOP Condition Capacitive Load for Each Bus Line Input Capacitance 250 20 + 0.1CB 20 + 0.1CB 20 + 0.1CB 20 + 0.1CB 0.6 4.0 400 5 pF pF 300 ns 1000 300 ns 1000 ms 4.7 0 0 100 ns 0.9 0.9 MIN 0 0 1.3 4.7 0.6 4.0 1.3 4.7 0.6 4.0 0.6 ms ms ms TYP MAX 400 100 UNITS kHz
tHD:STA
ms
tHIGH
ms
ms
tR
Fast mode (Note 9) Standard mode (Note 9) Fast mode (Note 10) Standard mode (Note 10) Fast mode Standard mode
tF
tSU:STO CB CI
(Note 10)
Note 7: After this period, the first clock pulse is generated. Note 8: The maximum tHD:DAT has only to be met if the device does not stretch the LOW period (tLOW) of the SCL signal. Note 9: A fast-mode device can be used in a standard mode system, but the requirement tSU:DAT >250ns must then be met. This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line tRMAX + tSU:DAT (1000 + 250 = 1250ns) before the SCL line is released. Note 10: CB: Total capacitance of one bus line in pF.
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DS4000 Digitally Controlled TCXO
Figure 1. Timing Diagram
PIN DESCRIPTION
PIN 1A, 1B, 1C, 1D, 2C, 2D 2A, 2B 3A, 3B 3C, 3D 4A, 4B 4C, 4D 5A, 5B 5C, 5D 6A, 6B 6C, 6D NAME GND N.C. GNDOSC VOSC A0 F1 SDA VCC SCL F2 FUNCTION Ground. DC power is provided to the device on these pins. No Connection. (Do not connect to ground.) Oscillator Ground. DC power is provided to the oscillator on these pins. Oscillator Power Supply. DC power is provided to the oscillator on these pins. 2-Wire Slave Address Input. This pin is used to configure the slave address. DC-TCXO Frequency Output 2-Wire Serial-Data Input/Output. SDA is the input/output pin for the 2-wire serial interface. The SDA pin is open drain and requires an external pullup resistor. Power Supply. DC power is provided to the device on these pins. 2-Wire Serial-Clock Input. SCL is used to synchronize data movement on the serial interface. The SCL pin is open drain and requires an external pullup resistor. DC-TCXO Frequency Output
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DS4000 Digitally Controlled TCXO
DETAILED DESCRIPTION
The DS4000 digitally controlled temperature-compensated crystal oscillator (DC-TCXO) features a digital temperature sensor, one fixed-frequency temperature-compensated square-wave output (F1), one programmable temperature-compensated square-wave output (F2), and digital communication for frequency tuning (SDA, SCL).
Figure 2. Block Diagram
VCC VOSC
TEMPERATURECOMPENSATED CRYSTAL OSCILLATOR SDA SCL A0 2-WIRE SERIAL INTERFACE DIGITAL TEMPERATURE SENSOR
F2 F1
DS4000
GND GND
OSC
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DS4000 Digitally Controlled TCXO
TEMPERATURE-COMPENSATED CRYSTAL OSCILLATOR
The DS4000 can either function as a standalone TCXO or as a digitally controlled TCXO. When used as a standalone TCXO, the only requirements needed to function properly are power, ground, and an output. However, the 2-wire interface must be used to tune (push and pull) the crystal. The DS4000 is capable of supplying two different outputs, F1 and F2. 1) F1 is the base frequency of the crystal unit inside of the device. The output type is a CMOS square wave. 2) F2 is a programmable frequency output. The frequency select register can program this output to an integer division of the base (F1) frequency. The duty cycle (DC) bit determines if the output is an n + 1 or a 2(n + 1) division of F1. F2 FREQUENCY SELECT REGISTER (FSR) (5Dh) Bit Name Default 7 D7 0 6 D6 0 5 D5 0 4 D4 0 3 D3 0 2 D2 0 1 D1 0 0 D0 0
F2 = F1 / (FSR value + 1); with DC = 0 F2 = F1 / [2 x (FSR value + 1)]; with DC = 1 TCXO CONTROL REGISTER (60h) Bit Name Default 7 X 0 6 X 0 5 X 0 4 X 0 3 F2OE 0 2 F1OE 0 1 FT 0 0 DC 0
DC, Duty Cycle Bit: If 50% duty cycle is desired, then this bit must be set to logic 1. The default condition at power-up is logic 0. FT: This bit must be programmed by the user to 0. F1OE, F1 Output Enable Bit: This bit allows the user to disable/enable the F1 output. F2OE, F2 Output Enable Bit: This bit allows the user to disable/enable the F2 output.
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DS4000 Digitally Controlled TCXO
DIGITAL TUNING THE BASE CRYSTAL FREQUENCY
When using the 2-wire interface for tuning the base frequency, the frequency tuning register is used. The frequency tuning register contains two's complement data. The data is used to add or subtract an offset from the crystal loading register. When the tuning register is programmed with a value, the next temperature-update cycle sums the programmed value with the factory-compensated value. This allows the user/system to digitally control the base frequency by a microcontroller using the 2-wire protocol. FREQUENCY TUNING REGISTER (66h) 7 6 5 Bit Name SIGN FO6 FO5 Default 0 0 0
4 FO4 0
3 FO3 0
2 FO2 0
1 FO1 0
0 FO0 0
FOS[6:0], Frequency Offset: These bits are used to tune the base crystal frequency. Each bit represents approximately 0.08ppm and, therefore, for a value of 07FH, pushes or pulls the base frequency by approximately 10.16ppm. SIGN, Sign Bit: This bit is used to determine whether to add or subtract the frequency offset from the crystal loading.
Table 1. Frequency Tuning Relationship
CALCULATED FREQUENCY OFFSET (ppm) -10.16 -8.00 -5.28 -1.84 -0.08 0.0 +0.08 +1.84 +5.28 +8.00 +10.16 DIGITAL DATA (Binary) 0111 1111 0110 0100 0100 0010 0001 0111 0000 0001 0000 0000 1111 1111 1110 1000 1011 0011 1001 1100 1000 0000 DIGITAL DATA (hex) 7Fh 64h 42h 17h 01h 00h FFh E8h B3h 9Ch 80h
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DS4000 Digitally Controlled TCXO
DIGITAL TEMPERATURE SENSOR
The digital temperature sensor provides 10-bit temperature readings that indicate the temperature of the device. Temperature readings are communicated from the DS4000 over a 2-wire serial interface. No additional components are required. The DS4000 has an external address bit that allows a user to choose the slave address from two possible values. The factory-calibrated temperature sensor requires no external components. Upon power-up, the DS4000 starts performing temperature conversions with a resolution of 10 bits (+0.25C resolution). Following an 8-bit command protocol, temperature data can be read over the 2-wire interface. The host can periodically read the value in the temperature register, which contains the last completed conversion. As conversions are performed in the background, reading the temperature register does not affect the conversion in progress.
READING TEMPERATURE
The DS4000 measures temperature through the use of an on-chip temperature-measurement technique with an operation range from 0C to +70C (commercial) or -40C to +85C (industrial). The device performs continuous conversions with the most recent result being stored in the temperature register. The digital temperature is retrieved from the temperature register using the READ TEMPERATURE command, as described in detail in the following paragraphs. Table 2 shows the exact relationship of output data to measured temperature. The data is transmitted serially over the 2-wire serial interface, MSB first. The MSB of the temperature register contains the "sign" (S) bit, denoting whether the temperature is positive or negative. For Fahrenheit usage, a lookup table or conversion routine must be used. TEMPERATURE/DATA RELATIONSHIP (UNIT = C) MSB (64h) BIT 7 BIT 6 6 S 2 LSB (65h) BIT 7 BIT 6 2
-1
BIT 5 5 2 BIT 5 0
BIT 4 4 2 BIT 4 0
BIT 3 3 2 BIT 3 0
BIT 2 2 2 BIT 2 0
BIT 1 1 2 BIT 1 0
BIT 0 0 2 BIT 0 0
2
-2
Table 2. Temperature/Data Relationship
TEMPERATURE (C) +85 +75 +0.5 0 -0.5 -20 -40 DIGITAL OUTPUT (Binary) 0101 0101 0000 0000 0100 1011 0000 0000 0000 0000 1000 0000 0000 0000 0000 0000 1111 1111 1000 0000 1110 1100 0000 0000 1101 1000 0000 0000 DIGITALOUTPUT (hex) 5500h 4B00h 0080h 0000h FF80h EC00h D800h
Note: Internal power dissipation raises the temperature above the ambient. The delta between ambient and the die temperature depends on power consumption, PC board layout, and airflow.
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DS4000 Digitally Controlled TCXO
READ TEMPERATURE COMMAND
This command reads the last temperature conversion result from the temperature register in the format described in the Reading Temperature section. If an application can accept temperature resolutions of +1.0C, then the master can read the first data byte and follow with a NACK and STOP. For higher resolution, both bytes must be read.
Table 3. Command Set
INSTRUCTION Frequency Select Register (Note 1) TCXO Control Register (Note 1) Read Temperature (Note 2) Frequency Tuning Register (Note 2) FUNCTION Defines F2 output frequency Enables/disables F1 and F2; sets duty cycle of F2 Reads 10-bit temperature register Digitally adds/subtracts an offset from oscillator PROTOCOL 5Dh 60h 64h 66h 2-WIRE BUS DATA AFTER ISSUING PROTOCOL Read or write 1 data byte Read or write 1 data byte Read 1 or 2 data bytes Read or write 1 data byte
Note 1: The slave does not increment the internal address pointer between instructions. The address pointer must be reinitialized after each access. Note 2. If the user only desires 8-bit thermometer readings, the master can read one data byte, and follow with a NACK and STOP. If higher resolution is required, both bytes must be read.
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DS4000 Digitally Controlled TCXO
2-WIRE SERIAL INTERFACE
The DS4000 supports a bidirectional 2-wire serial bus and data transmission protocol. The bus must be controlled by a master device, which generates the serial clock (SCL), controls the bus access, and generates the START and STOP conditions. The DS4000 operates as a slave on the 2-wire bus. The DS4000 works in a regular mode (100kHz clock rate) and a fast mode (400kHz clock rate), which are defined within the bus specifications. Connections to the bus are made by the open-drain I/O signals SDA and SCL. The following bus protocol has been defined (Figure 3): Data transfer can be initiated only when the bus is not busy. During data transfer, the data signal must remain stable whenever the clock signal is HIGH. Changes in the data signal while the clock signal is HIGH are interpreted as control signals.
Accordingly, the following bus conditions have been defined: Bus Not Busy: Both data and clock signals remain HIGH. Start Data Transfer: A change in the state of the data signal, from HIGH to LOW, while the clock line is HIGH, defines the START condition. Stop Data Transfer: A change in the state of the data signal, from LOW to HIGH, while the clock line is HIGH, defines the STOP condition. Data Valid: The state of the data signal represents valid data when, after a START condition, the data signal is stable for the duration of the HIGH period of the clock signal. The data on the line must be changed during the LOW period of the clock signal. There is one clock pulse per bit of data. Each data transfer is initiated with a START condition and terminated with a STOP condition. The number of data bytes transferred between START and STOP conditions is not limited and is determined by the master device. The information is transferred byte-wise and each receiver acknowledges with a ninth bit. Acknowledge: Each receiving device, when addressed, is required to generate an acknowledge after reception of each byte. The master device must generate an extra clock pulse that is associated with this acknowledge bit. A device that acknowledges must pull down the serial data (SDA) signal during the acknowledge clock pulse in such a way that the SDA signal is stable LOW during the HIGH period of the acknowledge-related clock pulse. Of course, setup and hold times must be taken into account. A master must signal an end-of-data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave must leave the data signal HIGH to enable the master to generate the STOP condition.
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DS4000 Digitally Controlled TCXO
Figure 3. Data Transfer On 2-Wire Serial Bus
SDA
MSB SLAVE ADDRESS R/W BIT ACKNOWLEDGEMENT SIGNAL FROM RECEIVER
ACKNOWLEDGEMENT SIGNAL FROM RECEIVER 3-7 8 9 ACK STOP CONDITION OR REPEATED START CONDITION
SCL
START CONDITION
1
2
3-5
6
7
8
9 ACK
1
2
REPEATED IF MORE BYTES ARE TRANSFERRED
DATA TRANSFER
Figures 4 and 5 detail how data transfer is accomplished on the 2-wire bus. Depending on the R/W bit in the transmission protocols as shown, two types of data transfer are possible: 1) Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the master is the slave address. Next follows a number of data bytes. The slave returns an acknowledge bit after each received byte. Data is transferred with the most significant bit (MSB) first. 2) Data transfer from a slave transmitter to a master receiver. The master transmits the first byte (the slave address). The slave then returns an acknowledge bit. Next follows a number of data bytes transmitted by the slave to the master. The master returns an acknowledge bit after all received bytes other than the last byte. At the end of the last received byte, a "not acknowledge" is returned. The master device generates all of the serial clock pulses and the START and STOP conditions. A transfer is ended with a STOP condition or with a repeated START condition. Since a repeated START condition is also the beginning of the next serial transfer, the bus is not released.
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DS4000 Digitally Controlled TCXO
SLAVE ADDRESS
The slave address is the first byte received following the START condition generated by the master device. The address byte consists of a 7-bit slave address and the R/W direction bit. The DS4000 slave address is set to 100010A0, where A0 is externally hardwired to a HIGH or LOW state. This allows design flexibility to set the slave's address to one of two possible address locations. The last bit following the slave address is the direction bit (R/W) and defines the operation to be performed by the master, transmit data (R/W = 0), or receive data (R/W = 1). Following the START condition, the DS4000 monitors the SDA bus by checking the slave address being transmitted. Upon receiving the proper slave address and R/W bit, the slave device outputs an acknowledge signal on the SDA line regardless of the operation mode. The DS4000 can operate in the following two modes: 1) Slave Receiver Mode: Serial data and clock are received through SDA and SCL. After each byte is received, an acknowledge bit is transmitted. START and STOP conditions are recognized as the beginning and end of a serial transfer. Address recognition is performed by the hardware after reception of the slave address and direction bit (Figure 4). 2) Slave Transmitter Mode: The first byte is received and handled as in the slave receiver mode. However, in this mode, the direction bit indicates that the transfer direction is reversed. Serial data is transmitted on SDA by the DS4000 while the serial clock is input on SCL. START and STOP conditions are recognized as the beginning and end of a serial transfer (Figure 5).
Figure 4. Data Write--Slave Receiver Mode

R/W

S
100010A0
S = START A = ACKNOWLEDGE P = STOP
0
A
XXXXXXXX
A
XXXXXXXX
A
P
Figure 5. Data Read--Slave Transmitter Mode

R/W
S
100010A0
1
A
XXXXXXXX
A
XXXXXXXX
A
XXXXXXXX
A
XXXXXXXX
A
P
S = START A = ACKNOWLEDGE P = STOP A = NOT ACKNOWLEDGE
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DS4000 Digitally Controlled TCXO
SELECTOR GUIDE
PART DS4000A0/WBGA DS4000A0N/WBGA DS4000CW/WBGA DS4000CWN/WBGA DS4000D0/WBGA DS4000D0N/WBGA DS4000EC/WBGA DS4000ECN/WBGA DS4000G0/WBGA DS4000G0N/WBGA DS4000GF/WBGA DS4000GFN/WBGA DS4000GW/WBGA DS4000GWN/WBGA DS4000KI/WBGA DS4000KIN/WBGA TEMP RANGE 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C PIN-PACKAGE 24 BGA 24 BGA 24 BGA 24 BGA 24 BGA 24 BGA 24 BGA 24 BGA 24 BGA 24 BGA 24 BGA 24 BGA 24 BGA 24 BGA 24 BGA 24 BGA TOP MARK DS4000A0 DS4000A0 ###XX N DS4000CW DS4000CW ###XX N DS4000D0 DS4000D0 ###XX N DS4000EC DS4000EC ###XX N DS4000G0 DS4000G0 ###XX N DS4000GF DS4000GF ###XX N DS4000GW DS4000GW ###XX N DS4000KI DS4000KI ###XX N FREQUENCY DESIGNATOR (MHz) 10.00000 10.00000 12.80000 12.80000 13.00000 13.00000 14.31818 14.31818 16.00000 16.00000 16.38400 16.38400 16.80000 16.80000 19.44000 19.44000
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DS4000 Digitally Controlled TCXO
PACKAGE INFORMATION
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.)
NOTE: THE BGA IS SOLDER-MASKED DEFINED.
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DS4000 Digitally Controlled TCXO
PACKAGE INFORMATION (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.)
1.27
PAD: 0.85mm
SOLDERMASK: 0.60mm
1.27
8.89
DIMENSIONS IN MILLIMETERS
Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product. No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
(c) 2003 Maxim Integrated Products * Printed USA
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