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CXG1097EN
Low Noise Amplifier with Bypass Switch/Mixer For the availability of this product, please contact the sales office.
Description The CXG1097EN is a dual mode low noise amplifier with a bypass switch/ mixer MMIC for Japan CDMA cellular. This IC is designed using the Sony's GaAs J-FET process. Features * Dual mode low noise amplifier with a bypass switch * High gain Low noise amplifier high current mode: Gp = 14.5dB (Typ.) Mixer: Gc = 12.0dB (Typ.) * Low noise Low noise amplifier high current mode: NF = 1.6dB (Typ.) Mixer: NF = 4.5dB (Typ.) * Low distortion Low noise amplifier high current mode: IIP3 = +4.5dBm (Typ.) Mixer: IIP3 = +3dBm (Typ.) * Small package 16-pin VSON Applications Japan CDMA cellular (J-CDMA) Element Structure GaAs J-FET MMIC Block Diagram Pin Configuration 16 pin VSON (Plastic)
Absolute Maximum Ratings (Ta = 25C) * Supply voltage VDD 4.5 * Input power PIN +5 * Operating temperature Topr -35 to +85 * Storage temperature Tstg -65 to +150 Recommended Operating Conditions * Supply voltage VDD 2.7 to 3.3 * Control voltage VCTL (H) 2.4 to 3.3 VCTL (L) 0 to 0.3
V dBm C C
V V V
RFIN RFIN 9 8 RFOUT 7 SW RFIN
9
8 7 6 5 4 3 2 1
RFOUT SW RFIN CTL2 LNA RFOUT/VDD (LNA, Logic) GND MIX RFIN GND LOIN
SW RFOUT 10 CTL1 11
SW RFOUT 10
LNA RFIN 12
5
LNA RFOUT
LNA RFIN 12 CAP 13
3
MIX RFIN
GND 14 VDD (LO AMP) 15
IFOUT 16
1 LOIN IFOUT/VDD (MIX) 16
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E99Z08A05-PS
CXG1097EN
Electrical Characteristics Conditions: VDD = 2.7V, VCTL (H) = 2.7V, VCTL (L) = 0V, fRF = 850MHz, fLO = 740MHz, PLO = -10dBm, unless otherwise specified (Ta = 25C) Block Item Control current for High state Current consumption VCTL1 VCTL2 Symbol Min. Typ. Max. Unit H L L H H L Power gain Low noise amplifier block Noise figure H H H H L Input IP3 H H Isolation H H Current consumption Conversion gain Mixer block Noise figure Input IP3 LO to RF leak level L H L or H L H L or H L H L H L or H L H L H ICTLH IDDSW IDDL IDDH GPSW GPL GPH NFL NFH IIP3SW IIP3L IIP3H ISO IDD GC NF IIP3 PLK -- -- -- -- 50 0.3 3.8 10.5 70 0.6 5 17 mA A When no signal Measurement condition
-3.7 -3.2 -2.7 11 13 -- -- 25 -3 2 20 -- 10.5 -- 0.5 -- 12.5 14.5 1.8 1.6 35 0 4.5 24 7.5 12 4.5 3 -30 14 16 2.3 2.1 -- -- -- -- 10 13.5 6 -- dB mA dB dB dBm 1 -- When a small signal When no signal When a small signal dBm 1 dB dB When a small signal
-25 dBm
1 fRF=850MHz/850.9MHz, PRF = -25dBm (low noise amplifier mode, mixer)/0dBm (bypass switch mode) Conversion by the IM3 suppression ratio for two-wave input. Note) The values shown above are the specified values on the Sony's recommended evaluation board.
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CXG1097EN
Recommended Evaluation Circuit
C1 RFIN 9 10 CTL1 L1 12 13 C4 14 VDD (LO AMP) C7 C6 L8 15 16 IFOUT C9 VDD (MIX) C10 L9 L10 C8 3 L6 2 1 L5 5 4 L2 11 8 C2 7 6
C3 RFOUT
CTL2 L3 VDD (LNA, Logic) C5
MIX RFIN L4
L7
LOIN
L1 L2 L3 L4 L5 L6 L7 L8 L9 L10
18nH 18nH 33nH 10nH 15nH 27nH 33nH 33nH 220nH 180nH
C1 C2 C3 C4 C5 C6 C7 C8 C9 C10
100pF 100pF 100pF 1000pF 1000pF 100pF 1000pF 6pF 1000pF 1000pF
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CXG1097EN
Example of Representative Characteristics (Ta = 25C) Low Noise Amplifier Block
GpL, NFL vs. fRF
16 15 14 13 Gp [dB] 12 11 10 9 NFL GpL VDD = 2.7V VCTL1 = 2.7V VCTL2 = 0V 8 7 6 5 NF [dB] Gp [dB] 4 3 2 1 16 15 14 13 12 11 10
GpH, NFH vs. fRF
8 GpH 7 6 5 VDD = 2.7V VCTL1 = 2.7V VCTL2 = 2.7V NFH 9 4 3 2 1 NF [dB]
8 0 800 810 820 830 840 850 860 870 880 890 900 fRF [MHz]
0 8 800 810 820 830 840 850 860 870 880 890 900 fRF [MHz]
POUTL, IM3L vs. Pin
30 20 10 0 POUTL -10 POUT [dBm] -20 -30 -40 IM3L -50 -60 -70 -80 -40 -30 -20 -10 0 10 VDD = 2.7V VCTL1 = 2.7V VCTL2 = 0V fRF1 = 850MHz fRF2 = 850.9MHz POUT [dBm] -10 -20 -30 -40 -50 -60 -70 -80 -40 30 20 10 0
POUTH , IM3H vs. Pin
POUTH
IM3H VDD = 2.7V VCTL1 = 2.7V VCTL2 = 2.7V fRF1 = 850MHz fRF2 = 850.9MHz -30 -20 -10 0 10
Pin [dBm]
Pin [dBm]
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CXG1097EN
Example of Representative Characteristics (Ta = 25C) Mixer Block
Gc, NF vs. fRF
13 Gc 12 8 12 9 13
Gc, NF vs. PLO
9 Gc 8
11 Gc [dB] VDD = 2.7V fLO = fRF - 110MHz PLO = -10dBm NF 8
7 NF [dB] Gc [dB]
11 VDD = 2.7V fRF = 850MHz fLO = 740MHz NF
7 NF [dB] Plk [dBm]
10
6
10
6
9
5
9
5
4
8
4
3 7 800 810 820 830 840 850 860 870 880 890 900 fRF [MHz]
7 -25
3 -20 -15 -10 -5 0 PLO [dBm]
POUT, IM3 vs. Pin
30 20 3 10 0 POUT IIP3 [dBm] -10 POUT [dBm] -20 IM3 -30 -40 -50 -60 -70 -80 -40 -30 -20 -10 0 10 VDD = 2.7V fRF1 = 850MHz fRF2 = 850.9MHz fLO = 740MHz PLO = -10dBm -2 -3 -4 -25 2 1 4
IIP3, Plk vs. PLO
-20 IIP3
-25
Plk 0 -1 VDD = 2.7V fRF1 = 850MHz fRF2 = 850.9MHz fLO = 740MHz PLO = -10dBm -20 -15 -10 -5 0 -30
-35
-40 PLO [dBm]
Pin [dBm]
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CXG1097EN
Recommended Evaluation Board Front
50mm
RFIN
RFOUT
MIX RFIN
IFOUT
LOIN
Glass fabric-base 4-layer epoxy board (thickness: 0.2mm x 2) GND for the whole 2nd and 3rd layers VDD (LO AMP) GND VDD (MIX) VCTL1 VCTL2 VDD (LNA, Logic)
Enlarged Diagram of Center Part
C1 L1
C3 C2
L2 C7 C6 C4 L8 C8 L9 L7 L6
L3 L5 L4
C5
L10 C10 C9
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CXG1097EN
Package Outline
Unit: mm
16PIN VSON(PLASTIC)
0.9 MAX 0.6 3.5 A S 0.05 S
0.35 0.1 2.5
B 0.4 1.4 4x 0.2 S A B
2x 0.2 S B 0.35 0.1
Soldrer Plating 0.13 0.025 + 0.09 0.14 - 0.03 NOTE: 1) The dimensions of the terminal section apply to the ranges of 0.1mm and 0.25mm from the end of a terminal. TERMINAL SECTION
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE VSON-16P-01 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY 0.02 g
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0.03 0.03
0.2 0.01
0.23 0.02
0.05 M S A-B
0.5 0.2
2.7
Sony Corporation

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