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DISCRETE SEMICONDUCTORS
DATA SHEET
PHC20512 Complementary enhancement mode MOS transistors
Product specification Supersedes data of 1997 Jun 19 File under Discrete Semiconductors, SC13b 1997 Oct 22
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
FEATURES * High-speed switching * No secondary breakdown * Very low on-state resistance. APPLICATIONS * Motor and actuator driver * Power management * Synchronized rectification. DESCRIPTION One N-channel and one P-channel enhancement mode MOS transistor in an 8-pin plastic SOT96-1 (SO8) package. CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling.
1 4 s1
handbook, halfpage
PHC20512
PINNING - SOT96-1 (SO8) PIN 1 2 3 4 5 6 7 8 SYMBOL s1 g1 s2 g2 d2 d2 d1 d1 DESCRIPTION source 1 gate 1 source 2 gate 2 drain 2 drain 2 drain 1 drain 1
d1 d1 5
d2 d2
8
MAM118
g1
s2
g2
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA SYMBOL Per channel VDS drain-source voltage (DC) N-channel P-channel VSD source-drain diode forward voltage N-channel P-channel VGS VGSth gate-source voltage (DC) gate-source threshold voltage N-channel P-channel ID drain current (DC) N-channel P-channel RDSon drain-source on-state resistance N-channel P-channel Ptot total power dissipation VGS = 10 V; ID = 3.2 A VGS = -10 V ID = -2 A Ts = 80 C - - - 0.05 0.12 3.5 W VDS = VGS; ID = 1 mA VDS = VGS ; ID = -1 mA Ts = 80 C - - 6.4 -4 A A 1 -1 2.8 -2.8 V V IS = 1.25 A IS = -1.25 A - - - 1 -1.3 20 V V V - - 30 -30 V V PARAMETER CONDITIONS MIN. MAX. UNIT
1997 Oct 22
2
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL Per channel VDS drain-source voltage (DC) N-channel P-channel VGS ID gate-source voltage (DC) drain current (DC) N-channel P-channel IDM peak drain current N-channel P-channel Ptot total power dissipation Ts = 80 C; note 3 Tamb = 25 C; note 4 Tamb = 25 C; note 5 Tamb = 25 C; note 6 Tstg Tj IS storage temperature operating junction temperature Ts = 80 C - - note 2 - - note 2 - - - - - - -65 -65 Ts = 80 C; note 1 - - - - - PARAMETER CONDITIONS MIN.
PHC20512
MAX.
UNIT
30 -30 20 6.4 -4 25 -16 3.5 2.6 1.1 1.5 +150 +150
V V V A A A A W W W W C C
Source-drain diode source current (DC) N-channel P-channel ISM peak pulsed source current N-channel P-channel Notes 1. Ts is the temperature at the soldering point of the drain lead. 2. Pulse width and duty cycle limited by maximum junction temperature. 3. Maximum permissible dissipation per MOS transistor. Both devices may be loaded up to 3.5 W at the same time. 4. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an Rth a-tp (ambient to tie-point) of 27.5 K/W. 5. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an Rth a-tp (ambient to tie-point) of 90 K/W. 6. Maximum permissible dissipation if only one MOS transistor dissipates. Device mounted on printed-circuit board with an Rth a-tp (ambient to tie-point) of 90 K/W. 3.5 -2.6 14 -10 A A A A
1997 Oct 22
3
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
PHC20512
handbook, halfpage
8
MGG340
102 handbook, halfpage ID (A) 10
(1)
MGG341
Ptot (W) 6
tp = 10 s 100 s tp T 1 ms 10 ms
4
1 2
P
=
tp 0 0 50 100 Ts (C) 150 10-1 T 1 10-1
t 10
100 ms DC VDS (V) 102
= 0.01; Ts = 80 C. (1) RDSon limitation.
Fig.2 Power derating curve.
Fig.3 SOAR; N-channel.
-102 handbook, halfpage ID (A) -10
(1)
MBH587
tp = 10 s 100 s 1 ms
-1
P
=
tp T
10 ms
tp
t T
-10-1
100 ms DC -10 VDS (V) -102
-10-1
-1
= 0.01; Ts = 80 C. (1) RDSon limitation.
Fig.4 SOAR; P-channel.
1997 Oct 22
4
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
THERMAL CHARACTERISTICS SYMBOL Rth j-s PARAMETER thermal resistance from junction to soldering point
PHC20512
VALUE 20
UNIT K/W
CHARACTERISTICS Tj = 25 C unless otherwise specified. SYMBOL Per channel V(BR)DSS drain-source breakdown voltage N-channel P-channel VGSth gate-source threshold voltage N-channel P-channel IDSS drain-source leakage current N-channel P-channel IGSS gate leakage current N-channel P-channel RDSon drain-source on-state resistance N-channel P-channel Ciss input capacitance N-channel P-channel Coss output capacitance N-channel P-channel Crss reverse transfer capacitance N-channel P-channel QG total gate charge N-channel P-channel QGS gate-source charge N-channel P-channel VGS = 10 V; VDD = 15 V; ID = 3.2 A VGS = -10 V; VDD = -15 V; ID = -2 A - - 1 1 - - nC nC VGS = 10 V; VDD = 15 V; ID = 3.2 A VGS = -10 V; VDD = -15 V; ID = -2 A - - 15 13 - - nC nC VGS = 0; VDS = 24 V; f = 1 MHz VGS = 0; VDS = -24 V; f = 1 MHz - - 100 100 - - pF pF VGS = 0; VDS = 24 V; f = 1 MHz VGS = 0; VDS = -24 V; f = 1 MHz - - 200 200 - - pF pF VGS = 0; VDS = 24 V; f = 1 MHz VGS = 0; VDS = -24 V; f = 1 MHz - - 450 450 - - pF pF VGS = 4.5 V; ID = 1.6 A VGS = 10 V; ID = 3.2 A VGS = -4.5 V; ID = -1 A VGS = -10 V; ID = -2 A - - - - - - - - 0.1 0.05 0.25 0.12 VGS = 0; VDS = 24 V VGS = 0; VDS = -24 V VGS = 20 V; VDS = 0 - - - - 100 100 nA nA - - - - 100 -100 nA nA VGS = VDS ; ID = 1 mA VGS = VDS ; ID = -1 mA 1 -1 - - 2.8 -2.8 V V VGS = 0; ID = 10 A VGS = 0; ID = -10 A 30 -30 - - - - V V PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
1997 Oct 22
5
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
SYMBOL QGD PARAMETER gate-drain charge N-channel P-channel td(on) turn-on delay time N-channel P-channel td(off) turn-off delay time N-channel P-channel tf fall time N-channel P-channel tr rise time N-channel P-channel ton turn-on switching time N-channel P-channel toff turn-off switching time N-channel P-channel Source-drain diode VSD source-drain diode forward voltage N-channel P-channel trr reverse recovery time N-channel P-channel IS = 1.25 A; di/dt = -100 A/s IS = -1.25 A; di/dt = 100 A/s - - VGD = 0; IS = 1.25 A VGD = 0; IS = -1.25 A - - - - VGS = 10 to 0 V; VDD = 15 V; ID = 1 A; Rgen = 6 VGS = -10 to 0 V; VDD = -15 V; ID = -1 A; Rgen = 6 - - VGS = 0 to 10 V; VDD = 15 V; ID = 1 A; - Rgen = 6 VGS = 0 to -10 V; VDD = -15 V; ID = -1 A; Rgen = 6 - VGS = 10 to 0 V; VDD = 15 V; ID = 1 A; Rgen = 6 VGS = 0 to -10 V; VDD = -15 V; ID = -1 A; Rgen = 6 - - VGS = 0 to 10 V; VDD = 15 V; ID = 1 A; - Rgen = 6 VGS = -10 to 0 V; VDD = -15 V; ID = -1 A; Rgen = 6 - 8 VGS = 10 to 0 V; VDD = 15 V; ID = 1 A; Rgen = 6 VGS = -10 to 0 V; VDD = -15 V; ID = -1 A; Rgen = 6 - - VGS = 0 to 10 V; VDD = 15 V; ID = 1 A; - Rgen = 6 VGS = 0 to -10 V; VDD = -15 V; ID = -1 A; Rgen = 6 - 7 6 VGS = 10 V; VDD = 15 V; ID = 3.2 A VGS = -10 V; VDD = -15 V; ID = -2 A - - 5 4 CONDITIONS MIN.
PHC20512
TYP. MAX. UNIT - - - - nC nC ns ns
20 29
- -
ns ns
- -
ns ns
16
12 4
- -
ns ns
15 10
- -
ns ns
32 45
- -
ns ns
1 -1.3 - -
V V ns ns
45 75
1997 Oct 22
6
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
PHC20512
handbook, full pagewidth
VDD Vin RL Vout 0
90 %
10 %
90 % Vin Vout 10 % 0 td(on) tf
MAM274
td(off) tr toff
ton
Fig.5 Switching times test circuit with input and output waveforms; N-channel.
handbook, full pagewidth
0 -VDD Vin
10 %
RL Vout 0 10 % Vout Vin td(on) tr ton 90 %
90 %
10 %
90 % td(off) tf toff
MGD391
Fig.6 Switching times test circuit with input and output waveforms; P-channel.
1997 Oct 22
7
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
PHC20512
102 handbook, full pagewidth Rth js (K/W)
(1)
MGG342
10
(2) (3) (4) (5) (6)
1
P
(7) (8) (9)
=
tp T
tp T 10-4 10-3 10-2 10-1
t
10-1 10-6
10-5
tp (s)
1
(1) = 0.75. (5) = 0.1.
(2) = 0.5. (6) = 0.05.
(3) = 0.33. (7) = 0.02.
(4) = 0.2. (8) = 0.01. (9) = 0.
Fig.7
Transient thermal resistance from junction to soldering point as a function of pulse time for N- and P-channels; typical values.
1997 Oct 22
8
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
PHC20512
handbook, halfpage
1250 C (pF)
MGG343
handbook, halfpage
1250 C (pF)
MGG352
1000
1000
750
750
(1)
500
(2)
500
(1)
(2)
250
(3)
250
(3)
0 0 4 8 12 16 20 VDS (V)
0 0
-4
-8
-12
-16 -20 VDS (V)
VGS = 0; f = 1 MHz; Tj = 25 C. (1) Ciss. (2) Coss. (3) Crss.
VGS = 0; f = 1 MHz; Tj = 25 C. (1) Ciss. (2) Coss. (3) Crss.
Fig.8
Capacitance as a function of drain-source voltage; N-channel typical values.
Fig.9
Capacitance as a function of drain source voltage; P-channel typical values.
handbook, halfpage
30
MGG344
handbook, halfpage (1)
-16
MGG353
ID (A)
(1)
ID (A)
(2)
-12 20
(2) (3) (3)
-8
(4)
10
(4)
-4
(5)
(5)
(6) (6)
0 0 4 8 VDS (V) 12
0 0
-4
-8
VDS (V)
-12
Tamb = 25 C; tp = 80 s; = 0. (1) VGS = 10 V. (2) VGS = 5 V. (3) VGS = 4.5 V.
(4) VGS = 4 V. (5) VGS = 3.5 V. (6) VGS = 3 V.
Tamb = 25 C; tp = 80 s; = 0. (1) VGS = -10 V. (2) VGS = -5 V. (3) VGS = -4.5 V.
(4) VGS = -4 V. (5) VGS = -3.5 V. (6) VGS = -3 V.
Fig.10 Output characteristics; N-channel typical values.
Fig.11 Output characteristics; P-channel typical values.
1997 Oct 22
9
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
PHC20512
handbook, halfpage
30
MGG345
handbook, halfpage
-16
MGG354
ID (A) 20
ID (A) -12
-8
10 -4
0 0 2 4 VGS (V) 6
0 0
-2
-4
VGS (V)
-6
VDS = 10 V; Tamb = 25 C; tp = 80 s; = 0.
VDS = -10 V; Tamb = 25 C; tp = 80 s; = 0.
Fig.12 Transfer characteristic; N-channel typical values.
Fig.13 Transfer characteristic; P-channel typical values.
handbook, halfpage
16
MGG346
handbook, halfpage
-16
MGG355
V (V) 12
VDS, VGS (V) -12
(1)
(2)
8
(1) (2)
-8
4
-4
0 0 4 8 12 QG (nC) VDD = 12.5 V; ID = 3.2 A; Tamb = 25 C. (1) VDS. (2) VGS. 16
0 0 4 8 12 QG (nC) VDD = -12.5 V; ID = -2 A; Tamb = 25 C. (1) VDS. (2) VGS. 16
Fig.14 Gate-source voltage and drain-source voltage as a function of total gate charge; N-channel typical values.
Fig.15 Gate-source voltage and drain-source voltage as a function of total gate charge; P-channel typical values.
1997 Oct 22
10
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
PHC20512
handbook, halfpage
16
MGG347
handbook, halfpage
-10
MGG356
IS (A) 12
IS (A)
-8
(1)
(2)
(3)
-6
(1) (2) (3)
8 -4 4
-2
0 0 0.4 0.8 VSD (V) 1.2
0 0
-0.4
-0.8
VSD (V)
-1.2
VGD = 0. (1) Tamb = 150 C; tp = 300 s; = 0. (2) Tamb = 25 C; tp = 300 s; = 0. (3) Tamb = -65 C; tp = 300 s; = 0.
VGD = 0. (1) Tamb = 150 C; tp = 300 s; = 0. (2) Tamb = 25 C; tp = 300 s; = 0. (3) Tamb = -65 C; tp = 300 s; = 0.
Fig.16 Source current as a function of source-drain diode forward voltage; N-channel typical values.
Fig.17 Source current as a function of source-drain diode forward voltage; P-channel typical values.
1997 Oct 22
11
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
PHC20512
103 handbook, halfpage
MGG348
103 handbook, halfpage RDSon
MGG357
RDSon (m)
(1) (2) (3) (4) (5)
(m)
(1) (2) (3) (4) (5) (6)
102
102
10
0
2
4
6
8
10 VGS (V)
10
0
-2
-4
-6
-8 -10 VGS (V)
VDS ID x RDSon; Tamb = 25 C; tp = 300 s; = 0. VDS ID x RDSon; Tamb = 25 C; tp = 300 s; = 0. (1) ID = 0.5 A. (2) ID = 1.6 A. (3) ID = 3.2 A. (4) ID = 6.4 A. (5) ID = 10 A. ID = 0.1 A. ID = 0.5 A. ID = 1 A. ID = 2 A. (5) ID = 4 A. (6) ID = 8 A. (1) (2) (3) (4)
Fig.18 Drain-source on-state resistance as a function of gate-source voltage; N-channel typical values.
Fig.19 Drain-source on-state resistance as a function of gate-source voltage; P-channel typical values.
1997 Oct 22
12
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
PHC20512
handbook, halfpage
1.3
MGG349
handbook, halfpage
1.3
MGG358
k 1.2
k 1.2
1.1
1.1
1
1
0.9
0.9
0.8
0.8
0.7 -100
-50
0
50
100
150 Tj (C)
0.7 -100
-50
0
50
100
150 Tj (C)
V GSth at T j k = ------------------------------------V GSth at 25C VGSth at VDS = VGS; ID = 1 mA.
V GSth at T j k = ------------------------------------V GSth at 25C VGSth at VDS = VGS; ID = -1 mA.
Fig.20 Temperature coefficient of gate-source threshold voltage as a function of junction temperature; N-channel typical values.
Fig.21 Temperature coefficient of gate-source threshold voltage as function of junction temperature; P-channel typical values.
1997 Oct 22
13
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
PHC20512
handbook, halfpage
2
MGG359
handbook, halfpage
2
MGG359
k
(1)
k
(1)
1.5
(2)
1.5
(2)
1
1
0.5
0.5
0 -100
-50
0
50
100
150 Tj (C)
0 -100
-50
0
50
100
150 Tj (C)
R DSon at T j k = ---------------------------------------R DSon at 25 C (1) RDSon at VGS = 10 V; ID = 3.2 A. (2) RDSon at VGS = 4.5 V; ID = 1.6 A.
R DSon at T j k = ---------------------------------------R DSon at 25 C (1) RDSon at VGS = -10 V; ID = -2 A. (2) RDSon at VGS = -4.5 V; ID = -1 A.
Fig.22 Temperature coefficient of drain-source on-resistance as a function of junction temperature; N-channel typical values.
Fig.23 Temperature coefficient of drain-source on-resistance as a function of junction temperature; P-channel typical values.
1997 Oct 22
14
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
PACKAGE OUTLINE SO8: plastic small outline package; 8 leads; body width 3.9 mm
PHC20512
SOT96-1
D
E
A X
c y HE vMA
Z 8 5
Q A2 A1 pin 1 index Lp 1 e bp 4 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3
0.010 0.057 0.069 0.004 0.049
0.019 0.0100 0.014 0.0075
0.244 0.039 0.028 0.050 0.041 0.228 0.016 0.024
0.028 0.004 0.012
8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03S JEDEC MS-012AA EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-04 97-05-22
1997 Oct 22
15
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
DEFINITIONS Data Sheet Status Objective specification Preliminary specification Product specification Limiting values
PHC20512
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1997 Oct 22
16
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
NOTES
PHC20512
1997 Oct 22
17
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
NOTES
PHC20512
1997 Oct 22
18
Philips Semiconductors
Product specification
Complementary enhancement mode MOS transistors
NOTES
PHC20512
1997 Oct 22
19
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1997
Internet: http://www.semiconductors.philips.com
SCA55
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Printed in The Netherlands
137107/00/03/pp20
Date of release: 1997 Oct 22
Document order number:
9397 750 02977

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