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SM6451AV
NIPPON PRECISION CIRCUITS INC.
Audio Variable Volume IC
OVERVIEW
The SM6451AV is a 3-wire serial-controlled electronic variable volume IC for audio applications. It provides electronic volume control for a stereo system (left and right channels), and independent channel attenuation and muting, with greatly enhanced digital zip noise suppression. The chip address function allows up to four SM6451AV devices to be connected and individually controlled over the 3-wire control interface from a single CPU. It is available in 16-pin VSOP packages.
PINOUT
(Top View)
RSTN ADRS1 ADRS2 DVDD LOUT LIN AVDD VRL
1
16
MDT MCK MLEN DVSS ROUT RIN AVSS
6451AV
FEATURES
s s
8
9
VRR
s s s
s
s s
APPLICATIONS
s
4.4 0.2 6.4 0.2
Stereo inputs and outputs Attenuation function * 2-channel independent control * 1.0 dB/step over 80 steps * 0 to -80 dB range Mute function 3-wire serial data control (MDT, MCK, MLEN) Chip addressing (up to 4 devices can be connected in parallel) Low noise * 0.002% THD + noise * 10 Vrms residual noise 5 V single power supply Silicon-gate CMOS process
PACKAGE DIMENSIONS
(Unit: mm)
16 pin VSOP
Audio equipment
0.275TYP
5.1 0.2
0.15 -
+ 0.1 5 0.0
ORDERING INFORMATION
0 10 0.10 0.22 - 0.05
+ 0.10
SM6451AV
16-pin VSOP
0.10 0.05 1.15 0.1
Device
Package
0.65
0.12 M
0.5 0.2
NIPPON PRECISION CIRCUITS--1
SM6451AV
BLOCK DIAGRAM
DVDD DVSS Attenuation Control 1/2VDD MLEN MCK MDT RSTN Chip Address Decoder ADRS1 ADRS2 VRL Reference Voltage Circuits Attenuation Decoder Interface Control
LIN
LOUT
VRR 1/2VDD
RIN
Attenuation Control AVDD AVSS
ROUT
PIN DESCRIPTION
Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1. Name RSTN ADRS1 ADRS2 DVDD LOUT LIN AVDD VRL VRR AVSS RIN ROUT DVSS MLEN MCK MDT I/O1 Ip Ip Ip - O I - O O - I O - Ip Ip Ip A/D1 D D D D A A A A A A A A D D D D Description System reset input (LOW-level reset) Chip address set 1 Chip address set 2 Digital supply Left-channel audio output Left-channel audio input Analog supply Left-channel reference voltage (0.5VDD). Connect a 10 F capacitor between VRL and AVSS. Right-channel reference voltage (0.5VDD). Connect a 10 F capacitor between VRR and AVSS. Analog ground Right-channel audio input Right-channel audio output Digital ground Microcontroller latch enable input Microcontroller clock input Microcontroller data input
Ip = input pin with pull-up, A = analog, D= digital
NIPPON PRECISION CIRCUITS--2
SM6451AV
SPECIFICATIONS
Absolute Maximum Ratings
DVSS = AVSS = 0 V, DVDD = AVDD = VDD
Parameter Supply voltage Input voltage Power dissipation Storage temperature Soldering temperature Soldering time Symbol VDD VIN PD Tstg Tsld tsld Rating -0.3 to 7.0 VSS - 0.3 to VDD + 0.3 150 -55 to 125 255 10 Unit V V mW C C s
Recommended Operating Conditions
DVSS = AVSS = 0 V, DVDD = AVDD = VDD
Parameter Supply voltage Supply voltage deviation Operating temperature Symbol VDD DVDD - AVDD, DVSS - AVSS Topr Rating 4.5 to 5.5 0.1 -40 to 85 Unit V V C
DC Characteristics
DVDD = AVDD = VDD = 4.5 to 5.5 V, VSS = 0 V, Ta = -40 to 85 C
Rating Parameter Symbol Condition min IDDD1 IDDD2 AVDD Current consumption HIGH-level input voltage1 LOW-level input voltage1 Input current1 Input leakage current1 1. IDDA VIH VIL IIL IIH VIN = 0 V VIN = VDD Data transfer stopped, MDT, MCK, MLEN, RSTN, ADRS1, ADRS2 = VDD ADRS1 = ADRS2 = 0V, 1.2 Vrms analog input, ATT = 0 dB, data transfer active - - - 0.7VDD - - - typ 0.3 1 4.5 - - 230 - max 1.0 2 8 - 0.3VDD 400 1.0 A mA mA V V A A Unit
DVDD Current consumption
MDT, MCK, MLEN, RSTN, ADRS1, ADRS2
NIPPON PRECISION CIRCUITS--3
SM6451AV
AC Digital Characteristics
DVDD = AVDD = VDD = 4.5 to 5.5 V, VSS = 0 V, Ta = -40 to 85 C Serial inputs (MDT, MCK, MLEN)
Rating Parameter MCK, MLEN rise time MCK, MLEN fall time MDT setup time MDT hold time MLEN setup time MLEN hold time MLEN LOW-level pulsewidth MLEN HIGH-level pulsewidth Symbol min tr tf tMDS tMDH tMCS tMCH tMEWL tMEWH - - 50 50 50 50 50 50 typ - - - - - - - - max 100 100 - - - - - - ns ns ns ns ns ns ns ns Unit
MDT tMDS MCK tMCS MLEN tMEWL tf MCK MLEN
0.9VDD 0.1VDD
0.5VDD tMDH 0.5VDD tMCH 0.5VDD tMEWH tr
0.9VDD 0.1VDD
0.5VDD
Reset input (RSTN)
Rating Parameter RSTN LOW-level pulsewidth Symbol min tRSTN 100 typ - max - ns Unit
NIPPON PRECISION CIRCUITS--4
SM6451AV
AC Analog Characteristics
VDD = 5.0 V, 1.2 Vrms amplitude, 1 kHz input frequency, 100 k output load resistance, Ta = 25 C, AC-coupled inputs Analog inputs (LIN, RIN)
Rating Parameter Input reference amplitude Input resistance Input clipping voltage Symbol VAI RIN VCLP THD + N = 1%, ATT = 0 dB Condition min - 40 - typ 1.2 50 1.75 max - 60 - Vrms k Vrms Unit
Analog outputs (LOUT, ROUT)
Rating Parameter Residual noise voltage Signal-to-noise ratio Total harmonic distortion + noise Gain control range Step size Attenuation error (1k to 20kHz) Symbol VNS SNR THD + N RCNT Step ERR1 ERR2 AT0 AT2 Absolute attenuation (1 kHz) AT4 AT6 AT8 Mute attenuation (1 kHz) Channel crosstalk Frequency response Quiescent output zip noise voltage (while ATT value adjusting) Minimum driver load resistance Mute CT FR NJ RML 0 to -60 dB -61 to -80 dB ATT = 0 dB ATT = -20 dB ATT = -40 dB ATT = -60 dB ATT = -80 dB ATT = Mute ATT = 0 dB ATT = 0 dB, f = 200 kHz 0 Vrms input ATT = 0 dB, THD + N = 1% Condition min Input signal: 0 Vrms, A-weight filter, 0 dBr = 1.2 Vrms, ATT = 0 dB ATT = 0 dB, 20 kHz lowpass filter - 95 - -80 0.8 -2 -5 - - - - - -88 -105 - - - typ 10 100 0.0017 - 1 - - -0.1 -20.1 -40.3 -60.5 -83.0 -92 -112 -5 - 6 max 20 - 0.0025 0 1.5 1 0 - - - - - - - - 3 10 Vrms dBr % dB dB dB dB dB dB dB dB dB dB dB dB mV k Unit
Reference voltage (VRL, VRR)
Rating Parameter Reference voltage output Symbol VREF Condition min 0.45VDD typ 0.5VDD max 0.55VDD V Unit
NIPPON PRECISION CIRCUITS--5
SM6451AV
MEASUREMENT CIRCUIT
Chip address: ADRS1 = LOW, ADRS2 = LOW
330pF
1 RSTN 2 ADRS1 3 ADRS2 4 DVDD
MDT 16 MCK 15 MLEN 14 DVSS 13 ROUT 12 RIN 11 AVSS 10 VRR 9 0.022uF + 10uF + 1uF + 1uF 100k
CPU
SM6451
+ 10uF
0.022uF
5 LOUT 6 LIN 7 AVDD + 10uF 8 VRL 0.022uF
+ 10uF
0.022uF +
+ 1uF 1uF
100k
Generator
Analyzer
Audio Precision System One SYS - 322A
NIPPON PRECISION CIRCUITS--6
SM6451AV
MICROCONTROLLER INTERFACE
The SM6451AV uses a 3-wire serial interface comprising MDT (data), MCK (clock) and MLEN (latch enable) to select channels and attenuation levels for the addressed device.
Input Timing
The microcontroller data input timing is shown in figure 1.
MDT
D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
MCK
MLEN
Figure 1. Microcontroller data input timing Data is shifted into the internal shift register on the rising edge of MCK, and the attenuation value is updated on the rising edge of MLEN. Accordingly, data on MDT should be changed on the falling edge of MCK. The dotted lines for MCK and MLEN also indicate valid timing. Note, however, a minimum of 16 MCK input pulses are required.
Data Format
The format of microcontroller input data is shown in figure 2.
Attenuation Data 7
Attenuation Data 6
Attenuation Data 5
Attenuation Data 4
Attenuation Data 3
Attenuation Data 2
Attenuation Data 1
MDT
D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
Figure 2. Microcontroller data format
D15, D14
Don't care.
D13, D12
Chip address bits. D13 corresponds to ADRS1 and D12 corresponds to ADRS2. The device is addressed only when ADRS1:ADRS2 matches D13:D12. Example 1: If D13 = LOW, D12 = HIGH and ADRS1 = LOW, ADRS2 = LOW, then the device is not addressed since ADRS2 and D12 do not match. Example 2: If D13/D12 = LOW and ADRS1/ADRS2 = LOW, then the device is addressed and all input data is read and the attenuation settings updated.
D11, D10
Don't care.
NIPPON PRECISION CIRCUITS--7
Attenuation Data 0
Chip Address 1
Chip Address 2
Channel Select
Channel Select
Don't Care
Don't Care
Don't Care
Don't Care
D0
SM6451AV
D9, D8
Channel select bits. The selected channel(s) are shown in table 1.
Table 1. Channel select
D9 LOW LOW HIGH HIGH D8 LOW HIGH LOW HIGH Selected channel Both left and right channels Left channel Right channel No change
D7 to D0
Attenuation register (ATT) set bits.
Table 2. Attenuation setting1
Attenuation 0 dB -1 dB -2 dB : -15 dB -16 dB -17 dB : -63 dB -64 dB -65 dB : -79 dB -80 dB Mute Mute : Mute Mute 1. ATT H 00 01 02 : 0F 10 11 : 3F 40 41 : 4F 50 51 52 : FE FF D7 LOW LOW LOW : LOW LOW LOW : LOW LOW LOW : LOW LOW LOW LOW : HIGH HIGH D6 LOW LOW LOW : LOW LOW LOW : LOW HIGH HIGH : HIGH HIGH HIGH HIGH : HIGH HIGH D5 LOW LOW LOW : LOW LOW LOW : HIGH LOW LOW : LOW LOW LOW LOW : HIGH HIGH D4 LOW LOW LOW : LOW HIGH HIGH : HIGH LOW LOW : LOW HIGH HIGH HIGH : HIGH HIGH D3 LOW LOW LOW : HIGH LOW LOW : HIGH LOW LOW : HIGH LOW LOW LOW : HIGH HIGH D2 LOW LOW LOW : HIGH LOW LOW : HIGH LOW LOW : HIGH LOW LOW LOW : HIGH HIGH D1 LOW LOW HIGH : HIGH LOW LOW : HIGH LOW LOW : HIGH LOW LOW HIGH : HIGH HIGH D0 LOW HIGH LOW : HIGH LOW HIGH : HIGH LOW HIGH : HIGH LOW HIGH LOW : LOW HIGH
Outputs are muted after system reset.
NIPPON PRECISION CIRCUITS--8
SM6451AV
ANALOG PERFORMANCE CHARACTERISTICS
DVDD = AVDD = 5.0 V, 100 k output load resistance, Ta = 25 C
1 f = 1kHz ATT = 0dB 20kHz LPF
0.1 ATT = 0dB 20kHz LPF
THD + N(%)
0.1
THD + N(%)
0.01 VIN=0.2Vrms VIN=0.4Vrms VIN=0.8Vrms VIN=1.2Vrms
0.01
0.001 0.1
1
2
0.001
VIN(Vrms)
20
100
1k
10k
20k
Freq(Hz)
Figure 3. THD + N vs. input amplitude
Figure 4. THD + N vs. input frequency
2 1 0 VIN = 1.2Vrms f = 1kHz
20
16
VIN = 0Vrms A-Weight Filter
Noise (uV)
-10 -20 -30 -40 -50 -60 -70 -80
Error(dB)
-1 -2 -3 -4 -5
12
8
4
0
0
0
-10
-20
-30
-40
-50
-60
-70
-80
ATT(dB)
ATT(dB)
Figure 5. Attenuation error
Figure 6. Residual noise vs. ATT
+0 -20
ATT=0dB ATT=-20dB ATT=-40dB ATT=-60dB VIN = 1.2Vrms
-40
Cross Talk Gain(dB)
-60 -80 -100 -120 -140
VIN = 1.2Vrms ATT = 0dB
Gain(dB)
-40 -60 -80 -100
ATT=-80dB ATT=MUTE 20 100 1k 10k 100k
20
100
1k
10k
100k
Freq(Hz)
Freq(Hz)
Figure 7. Frequency response
Figure 8. Crosstalk frequency response
NIPPON PRECISION CIRCUITS--9
SM6451AV
+0 -20 VIN = 1.2Vrms = 0dB f = 1kHz ATT = 0dB BH window
100 VIN = 1.2Vrms f = 1kHz ATT = 0dB 20kHz LPF
FFT Gain(dB)
-40 -60 -80 -100 -120
10
THD + N(%)
1
0.1
0.01 -140 -160 0 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k 0.001 1k 10k 100k
Freq(Hz)
Load resistance()
Figure 9. FFT plot (ATT = 0 dB)
Figure 10. THD + N vs. load resistance
10 AVDD + DVDD ADRS1=ADRS2=5V 8
10 AVDD + DVDD ADRS1=ADRS2=5V
Current consumption(mA)
Current consumption(mA)
8
6
6
4
4
2 4.50
4.75
5.00
5.25
5.50
2 -50
-25
0
25
50
75
100
Supply volutage(V)
Operating temperature(C)
Figure 11. Current consumption vs. supply voltage
Figure 12. Current consumption vs. temperature
NIPPON PRECISION CIRCUITS--10
SM6451AV
TYPICAL APPLICATIONS
Connection Guidelines
Decoupling capacitors of approximately 10 F should be connected from AVDD, VRL, VRR to AVSS, and from DVDD to DVSS. In addition, approximately 0.01 F capacitors should also be connected from AVDD, VRL, VRR to AVSS, and from DVDD to DVSS to suppress digital switch noise. An approximately 0.001 F capacitor connected from RSTN to DVSS will force a system reset when power is applied.
Connection 1 (to DAC)
+ 5V
DVDD
AVDD1 to 4 LOA LOBN SM5864 ROA ROBN AVSS1 to 4
DVDD Analog L.P.F. Analog L.P.F. LIN RIN
AVDD LOUT ROUT
for Front L ch OUT R ch OUT
DVSS
SM6451
ADRS1 ADRS2 DVSS AVSS
MDT MCK MLEN
CPU
MDT MCK MLEN ADRS1 ADRS2 AVDD DVDD for Rear LOUT ROUT DVSS L ch OUT R ch OUT
SM6451
LIN RIN AVSS
NIPPON PRECISION CIRCUITS--11
SM6451AV
Connection 2
R 3.3R L ch Input 4Vrms 1.2Vrms R R ch Input 3.3R RIN ROUT LIN LOUT R L ch Output 3.3R
SM6451
R
3.3R
R ch Output
The SM6451AV uses a 1.2 Vrms input reference amplitude. If the input signal is 4 Vrms, then the input must be reduced by a factor of 1/3.3, and the output increased by a factor of 3.3.
Connection 3
AVDD L ch Input LIN LOUT L ch Output
SM6451
R ch Input RIN ROUT R ch Output
AVSS
When there is a possibility that the input peak-to-peak amplitude will exceed the supply voltage, input protection diodes should be connected to prevent device breakdown.
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. 4-3, Fukuzumi 2-chome Koto-ku, Tokyo 135-8430, Japan Telephone: 03-3642-6661 Facsimile: 03-3642-6698 NC9704AE 1998.06
NIPPON PRECISION CIRCUITS INC.
NIPPON PRECISION CIRCUITS--12

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