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PRELIMINARY INFORMATION
1
TC1232 MICROPROCESSOR MONITOR
FEATURES
s s s s s Precision Voltage Monitor ....................... Adjustable +4.5V or +4.75V Reset Pulse Width ............................. 250msec Min No External Components Adjustable Watchdog Timer ........................ 150msec, 600msec or 1.2sec Debounced Manual Reset Input for External Override
GENERAL DESCRIPTION
The TC1232 is a fully-integrated processor supervisor. It provides three important functions to safeguard processor sanity: precision power on/off reset control, watchdog timer and external reset override. On power-up, the TC1232 holds the processor in the reset state for a minimum of 250msec after VCC is within tolerance to ensure a stable system start-up. Microprocessor sanity is monitored by the on-board watchdog circuit. The microprocessor must provide a periodic low-going signal on the ST input. Should the processor fail to supply this signal within the selected time-out period (150msec, 600msec or 1200msec), an out-of-control processor is indicated and the TC1232 issues a processor reset as a result. The outputs of the TC1232 are immediately driven active when the PB input is brought low by an external pushbutton switch or other electronic signal. When connected to a push-button switch, the TC1232 provides contact debounce. The TC1232 is packaged in a space-saving 8-pin plastic DIP or SOIC package and requires no external components.
2 3 4 5 6 7
APPLICATIONS
s s s s s Computers Controllers Intelligent Instruments Automotive Systems Critical P Power Monitoring
ORDERING INFORMATION
Part No. TC1232COA TC1232COE TC1232CPA TC1232EOA TC1232EOE TC1232EPA Package 8-Pin SOIC 16-Pin SOIC (Wide) 8-Pin PDIP 8-Pin SOIC 16-Pin SOIC (Wide) 8-Pin PDIP Temp. Range 0C to +70C 0C to +70C 0C to +70C - 40C to +85C - 40C to +85C - 40C to +85C
FUNCTIONAL BLOCK DIAGRAM
VCC 5%/10% TOLERANCE SELECT REF RST
+ - +
TOL
RESET GENERATOR RST
PB RST DEBOUNCE
TC1232
TD
WATCHDOG TIMEBASE SELECT
WATCHDOG TIMER
ST
GND
8
TC1232-4 11/6/96
TELCOM SEMICONDUCTOR, INC.
5-19
MICROPROCESSOR MONITOR
TC1232
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin (With Respect to GND) - 0.3V to +5.8V Operating Temperature Range: TC1232C .......................................... 0C to +70C TC1232E ..................................... - 40C to + 85C Storage Temperature Range ................ - 65C to +150C Lead Temperature (Soldering, 10 sec) ................. +300C
*Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS: TA = TMIN to TMAX; VCC = +4.5V to 5.5V, unless otherwise specified.
Symbol
VCC VIH VIL IL IOH IOL ICC VCCTP VCCTP
Parameter
Supply Voltage ST and PB RST Input High Level ST and PB RST Input Low Level Input Leakage ST, TOL Output Current RST Current RST, RST Operating Current VCC 5% Trip Point (Note 3) VCC 10% Trip Point (Note 3)
Test Conditions
Min
4.5 2.0
Typ
5.0 -- -- -- -12 10 50 4.62 4.37
Max
5.5 VCC +0.3 +0.8 +1.0 -- -- 200 4.74 4.49
Unit
V V V A mA mA A V V
Note 1 - 0.3 - 1.0 - 1.0 2.0 -- 4.50 4.25
VOH = 2.4V VOL = 0.4V Note 2 TOL = GND TOL = VCC
CAPACITANCE (Note 4): TA = +25C
Symbol
CIN COUT
Parameters
Input Capacitance ST, TOL Output Capacitance RST, RST
Test Conditions
Min
-- --
Typ
-- --
Max
5 7
Units
pF pF
AC ELECTRICAL CHARACTERISTICS: TA = TMIN to TMAX; VCC = +5V to +10%, unless otherwise specified.
Symbol
tPB tPBD tRST tST tTD
Parameters
PB RST (Note 5) PB RST Delay Reset Active Time ST Pulse Width ST Time-out Period
Test Conditions
Figure 3 Figure 3 Figure 4 Figure 4 TD Pin = 0V TD Pin = Open TD Pin = VCC Figure 5
Min
20 1 250 75 62.5 250 500 10
Typ
-- 4 610 -- 150 600 1200 --
Max
-- 20 1000 -- 250 1000 2000 --
Units
msec msec msec nsec msec msec msec sec
tF
VCC Fall Time (Note 4)
5-20
TELCOM SEMICONDUCTOR, INC.
MICROPROCESSOR MONITOR
1
TC1232
specified.
AC ELECTRICAL CHARACTERISTICS: (Cont.) TA = TMIN to TMAX; VCC = +5V to +10%, unless otherwise
Symbol
tR tRPD tRPU
NOTES: 1. 2. 3. 4. 5. 6.
Parameter
VCC Rise Time (Note 4) VCC Detect to RST High and RST Low VCC Detect to RST High and RST Open (Note 6)
Test Conditions
Figure 6 Figure 7, VCC Falling Figure 8, VCC Rising
Min
0 -- 250
Typ
-- -- 610
Max
-- 100 1000
Units
sec nsec msec
2 3
PB RST is internally pulled up to VCC with an internal impedance of typically 40k. Measured with outputs open. All voltages referenced to GND. Guaranteed by design. PB RST must be held low for a minimum of 20msec to guarantee a reset. tR = 5sec.
PIN CONFIGURATIONS
8-Pin PDIP
PB RST TD TOL GND 4 1 2 3 8 7 VCC ST RST RST PB RST TD TOL GND 5 1 2 3 4
8-Pin SOIC
8 7 VCC ST RST RST NC PB RST NC TD NC TOL NC GND
16-Pin SOIC Wide
1 2 3 4 5 6 7 8 16 NC 15 VCC 14 NC 13 ST
4 5 6 7
TC1232CPA TC1232EPA
6
TC1232COA TC1232EOA
6 5
TC1232COE TC1232EOE
12 NC 11 RST 10 NC 9 RST
PIN DESCRIPTION
Pin No. Pin No. Pin No. (8-Pin PDIP) (8-Pin SOIC) (16-Pin SOIC) Symbol Description
1 1 2 PB RST Push-button Reset Input. A debounced active-low input that ignores pulses less than 1msec in duration and is guaranteed to recognize inputs of 20msec or greater. TD Time Delay Set. The watchdog time-out select input (tTD = 150msec for TD = 0V, tTD = 600msec for TD = open, tTD = 1.2sec for TD = VCC). TOL Tolerance Input. Connect to GND for 5% tolerance or to VCC for 10% tolerance. GND Ground. RST Reset Output (Active High) - goes active: 1. If VCC falls below the selected reset voltage threshold 2. If PB RST is forced low 3. If ST is not strobed within the minimum time-out period 4. During power-up RST Reset Output (Active Low, Open Drain) - see RST. ST Strobe Input. Input for watchdog timer. VCC The +5V Power-Supply Input. NC No Internal Connection.
2 3 4 5
2 3 4 5
4 6 8 9
6 7 8
6 7 8
11 13 15 1, 3, 5, 7, 10, 12, 14, 16
8
TELCOM SEMICONDUCTOR, INC.
5-21
MICROPROCESSOR MONITOR
TC1232
DETAILED DESCRIPTION Power Monitor
The TC1232 detects out-of-tolerance power supply conditions and warns a processor-based system of an impending power failure. When VCC is detected as below the preset level defined by TOL, the VCC comparator outputs the signals RST and RST. If TOL is connected to ground, the RST and RST signals become active as VCC falls below 4.75 volts. If TOL is connected to VCC, the RST and RST become active as VCC falls below 4.5 volts. Because the processing is stopped at the last possible moment of valid VCC, the RST and RST are excellent control signals for a P. The reset outputs will remain in their active states until VCC has been continuously in-tolerance for a minimum of 250msec allowing the power supply and P to stabilize before RST is released. mode and set it low while in the background or interrupt mode. If both modes do not execute correctly, the watchdog timer issues reset pulses.
Supply Monitor Noise Sensitivity
The TC1232 is optimized for fast response to negativegoing changes in VDD. Systems with an inordinate amount of electrical noise on VDD (such as systems using relays), may require a 0.01F or 0.1F bypass capacitor to reduce detection sensitivity. This capacitor should be installed as close to the TC1232 as possible to keep the capacitor lead length short.
+5V
Push-button Reset Input
The debounced manual reset input (PB RST) manually forces the reset outputs into their active states. Once PB RST has been low for a time tPBD, the push-button delay time, the reset outputs go active. The reset outputs remain in their active states for a minimum of 250msec after PB RST rises above VIH (Figure 3). A mechanical push-button or active logic signal can drive the PB RST input. The debounced input ignores input pulses less than 1msec and is guaranteed to recognize pulses of 20msec or greater. No external pull-up resistor is required because the PB RST input has an internal pull-up to VCC of approximately 100A.
VCC PB RST
TD ST I/O MICROPROCESSOR RST
RESET
TC1232 GND TOL
Figure 1. Push-button Reset
Watchdog Timer
When the ST input is not stimulated for a preset time period, the watchdog timer function forces RST and RST signals to the active state. The preset time period is determined by the TD inputs to be 150msec with TD connected to ground, 600msec with TD floating, or 1200msec with TD connected to VCC, typical. The watchdog timer starts timing out from the set time period as soon as RST and RST are inactive. If a high-to-low transition occurs on the ST input pin prior to time-out, the watchdog timer is reset and begins to time-out again. If the watchdog timer is allowed to time-out, then the RST and RST signals are driven to the active state for 250msec minimum (Figure 2). The software routine that strobes ST is critical. The code must be in a section of software that is executed frequently enough so the time between toggles is less than the watchdog time-out period. One common technique controls the P I/O line from two sections of the program. The software might set the I/O line high while operating in the foreground
5-22
+5V 10K
3 -TERMINAL REGULATOR
+5V
VCC
RST
RESET
0.1 F
MICROPROCESSOR TC1232
ST TD TOL GND
I/O
Figure 2. Watchdog Timer
TELCOM SEMICONDUCTOR, INC.
MICROPROCESSOR MONITOR
1
TC1232
tPB
2
tF
VIH
PB RST
tPBD
VCC
tRST
VIL
+4.75V
RST
3 4
+4.25V
RST
Figure 3. Push-button Reset. The debounced PB RST input ignores input pulses less than 1msec and is guaranteed to recognize pulses of 20msec or greater
Figure 5. Power-Down Slew Rate
PUSH-BUTTON RESET
tST
ST
5
tR
tTD
+4.75V
6 7
+4.25V
NOTE: IS THE MAXIMUM ELAPSED TIME BETWEEN ST HIGH-TO-LOW TRANSITIONS (ST IS ACTIVATED BY FALLING EDGES ONLY) WHICH WILL KEEP THE WATCHDOG TIMER FROM FORCING THE RESET OUTPUTS ACTIVE FOR A TIME OF tRST. tTD IS A FUNCTION OF THE VOLTAGE AT THE TD PIN, AS TABULATED BELOW.
tTD
tTD
CONDITON TD PIN = 0V TD PIN = OPEN TD PIN = VCC MIN 62.5msec 250msec 500msec TYP 150msec 600msec 1200msec MAX 250msec 1000msec 2000msec
VCC
Figure 4. Strobe Input
Figure 6. Power-Up Slew Rate
8
TELCOM SEMICONDUCTOR, INC.
5-23
MICROPROCESSOR MONITOR
TC1232
VCC = 5V +4.5V (5% TRIP POINT) +4.25V (10% TRIP POINT)
4.6V (5% TRIP POINT) 4.5V(10% TRIP POINT)
VCC
tRPD
tRPU
RST VOH
RST VOH
RST
VOL
RST
VCC SLEW RATE = 1.66mV/sec (0.5V/300sec)
VOL
Figure 7. VCC Detect Reset Output Delay (Power-Down)
Figure 8. VCC Detect Reset Output Delay (Power-Up)
5-24
TELCOM SEMICONDUCTOR, INC.

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