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M74HCT573 OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING s s s s s s HIGH SPEED: tPD = 21ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4A(MAX.) at TA=25C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) BALANCED PROPAGATION DELAYS: tPLH tPHL SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 573 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HCT573B1R M74HCT573M1R T&R M74HCT573RM13TR M74HCT573TTR DESCRIPTION The M74HCT573 is an high speed CMOS OCTAL LATCH WITH 3-STATE OUTPUTS fabricated with silicon gate C2MOS technology. This 8-BIT D-Type latches is controlled by a latch enable input (LE) and output enable input (OE). While the LE input is held at a high level, the Q outputs will follow the data input precisely. When the LE is taken low, the Q outputs will be latched precisely at the logic level of D input data. While the OE input is at low level, the eight outputs will be in a normal logic state (high or low logic level) and while OE is at high level the outputs will be in a high impedance state. The 3-State output configuration and the wide choice of outline make bus organized system simple. The M74HCT573 is designed to directly interface HSC2MOS systems with TTL and NMOS components. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/11 M74HCT573 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2, 3, 4, 5, 6, 7, 8, 9 12, 13, 14, 15, 16, 17, 18, 19 11 10 20 SYMBOL OE D0 to D7 Q0 to Q7 NAME AND FUNCTION 3 State Output Enable Input (Active LOW) Data Inputs 3 State Latch Outputs LE GND VCC Latch Enable Input Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS OE H L L L LE X L H H D X X L H OUTPUTS Q Z NO CHANGE (*) L H X: Don't Care Z: High Impedance (*): Q Outputs are latched at the time when the LE input is taken low logic level. LOGIC DIAGRAM 2/11 M74HCT573 ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO PD Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Power Dissipation Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 20 20 35 70 500(*) -65 to +150 300 Unit V V V mA mA mA mA mW C C ICC or IGND DC VCC or Ground Current Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 C; derate to 300mW by 10mW/C from 65C to 85C RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top tr, tf Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time (VCC = 4.5 to 5.5V) Parameter Value 4.5 to 5.5 0 to VCC 0 to VCC -55 to 125 0 to 500 Unit V V V C ns 3/11 M74HCT573 DC SPECIFICATIONS Test Condition Symbol Parameter VCC (V) 4.5 to 5.5 4.5 to 5.5 4.5 4.5 5.5 5.5 5.5 5.5 IO=-20 A IO=-6.0 mA IO=20 A IO=6.0 mA VI = VCC or GND VI = VIH or VIL VO = VCC or GND VI = VCC or GND Per Input pin VI = 0.5V or VI = 2.4V Other Inputs at VCC or GND TA = 25C Min. 2.0 Typ. Max. Value -40 to 85C Min. 2.0 Max. -55 to 125C Min. 2.0 Max. V Unit VIH High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current High Impedance Output Leakage Current Quiescent Supply Current Additional Worst Case Supply Current VIL 0.8 4.4 4.18 4.5 4.31 0.0 0.17 0.1 0.26 0.1 0.5 4 2.0 4.4 4.13 0.8 4.4 4.10 0.1 0.33 1 5 40 2.9 0.8 V VOH VOL II IOZ V 0.1 0.40 1 10 80 3.0 V A A A mA ICC ICC AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter VCC (V) 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 4.5 CL (pF) 50 50 150 50 150 50 150 50 50 50 50 TA = 25C Min. Typ. 7 21 25 19 23 19 23 18 7 4 Max. 12 33 39 30 36 30 36 25 15 10 5 Value -40 to 85C Min. Max. 15 41 49 38 45 38 45 31 19 13 5 -55 to 125C Min. Max. 18 50 59 45 54 45 54 38 22 15 5 ns ns ns ns ns ns ns ns Unit tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (LE - Q,Q) tPLH tPHL Propagation Delay Time (D - Q,Q) tPZL tPZH Output Enable Time tPLZ tPHZ Output Disable Time tW(L) Minimum Pulse Width (LE) tW(H) ts th Minimum Set-Up Time Minimum Hold Time RL = 1 K RL = 1 K 4/11 M74HCT573 CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) TA = 25C Min. Typ. 5 10 51 Max. 10 Value -40 to 85C Min. Max. 10 -55 to 125C Min. Max. 10 pF pF pF Unit CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance (note 1) 1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per Flip Flop) TEST CIRCUIT TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ CL = 50pF/150pF or equivalent (includes jig and probe capacitance) R1 = 1K or equivalent RT = ZOUT of pulse generator (typically 50) SWITCH Open VCC GND 5/11 M74HCT573 WAVEFORM 1: LE TO Qn PROPAGATION DELAYS, LE MINIMUM PULSE WIDTH, Dn TO LE SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle) 6/11 M74HCT573 WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIMES (f=1MHz; 50% duty cycle) WAVEFORM 3: PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle) 7/11 M74HCT573 Plastic DIP-20 (0.25) MECHANICAL DATA mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.34 8.5 2.54 22.86 7.1 3.93 0.130 0.053 0.254 1.39 0.45 0.25 25.4 0.335 0.100 0.900 0.280 0.155 1.65 TYP MAX. MIN. 0.010 0.055 0.018 0.010 1.000 0.065 TYP. MAX. inch P001J 8/11 M74HCT573 SO-20 MECHANICAL DATA mm. DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F L M S 7.40 0.50 12.60 10.00 1.27 11.43 7.60 1.27 0.75 8 (max.) 0.291 0.020 13.00 10.65 0.35 0.23 0.5 45 (typ.) 0.496 0.393 0.050 0.450 0.300 0.050 0.029 0.512 0.419 0.1 TYP MAX. 2.65 0.2 2.45 0.49 0.32 0.014 0.009 0.020 0.004 MIN. TYP. MAX. 0.104 0.008 0.096 0.019 0.012 inch PO13L 9/11 M74HCT573 TSSOP20 MECHANICAL DATA mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0 0.45 0.60 0.05 0.8 0.19 0.09 6.4 6.2 4.3 6.5 6.4 4.4 0.65 BSC 8 0.75 0 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 6.6 6.6 4.48 0.002 0.031 0.007 0.004 0.252 0.244 0.169 0.256 0.252 0.173 0.0256 BSC 8 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0089 0.260 0.260 0.176 inch A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0087225C 10/11 M74HCT573 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2000 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom (c) http://www.st.com 11/11 |
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