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| (R) STY25NA60 N - CHANNEL 600V - 0.225 - 25 A - Max247 EXSTREMELY LOW GATE CHARGE POWER MOSFET TYPE STY25NA60 s s V DSS 600 V R DS(on) < 0.24 ID 25 A s s s s s TYPICAL RDS(on) = 0.225 EFFICIENT AND RELIABLE MOUNTING THROUGH CLIP 30V GATE TO SOURCE VOLTAGE RATING 100% AVALANCHE TESTED LOW INTRINSIC CAPACITANCE GATE CHARGE MINIMIZED REDUCED VOLTAGE SPREAD 1 2 3 DESCRIPTION The Max247TM package is a new high volume power package exibiting the same footprint as the industry standard TO-247, but designed to accomodate much larger silicon chips, normally supplied in bigger packages such as TO-264.The increased die capacity makes the device idealto reduce component count in multiple paralleled designs and save board space with respect to larger packages. APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING s SWITCH MODE POWER SUPPLY (SMPS) s DC-AC CONVERTER FOR WELDING EQUIPMENT AND UNINTERRUPTABLE POWER SUPPLY AND MOTOR DRIVE s Max247TM INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symb ol V DS V DGR V GS ID ID I DM (*) P tot T s tg Tj Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (RGS = 20 k) G ate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 o C Drain Current (pulsed) T otal Dissipation at Tc = 25 C Derating F actor Storage Temperature Max. O perating Junction Temperature o o Value 600 600 30 25 16.5 100 300 2.4 -55 to 150 150 Un it V V V A A A W W /o C o o C C (*) Pulse width limited by safe operating area March 1999 1/8 STY25NA60 THERMAL DATA R thj -case R thj -amb R thc-sink Thermal Resistance Junction-case Thermal Resistance Junction-ambient Thermal Resistance Case-Heatsink with Conductive Grease Max Max Typ 0.42 40 0.05 o o C/W C/W o C/W AVALANCHE CHARACTERISTICS Symbo l IAR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy o (starting Tj = 25 C, I D = IAR , VDD = 50 V) Max Valu e 25 3000 Unit A mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 A V GS = 0 Min. 600 50 500 100 T yp. Max. Unit V A A nA V DS = Max Rating Zero G ate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) V GS = 30 V T c = 125 oC ON () Symbo l V GS(th) R DS(on) I D(o n) Parameter Gate Threshold Voltage V DS = V GS Test Con ditions ID = 250 A I D = 12.5 A 25 Min. 3 T yp. 4 0.225 Max. 5 0.24 Unit V A Static Drain-source O n V GS = 10 V Resistance On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V DYNAMIC Symbo l g f s () C iss C os s C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse T ransfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 25 V f = 1 MHz ID = 12.5 A V GS = 0 Min. 20 6200 690 195 T yp. Max. Unit S pF pF pF 2/8 STY25NA60 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l t d(on) tr Qg Q gs Q gd Parameter Turn-on delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 300 V I D = 12.5 A V GS = 10 V R G = 4.7 (see test circuit, figure 3) V DD = 480 V ID = 25 A V GS = 10 V Min. T yp. 45 70 240 25 115 315 Max. Unit ns ns nC nC nC SWITCHING OFF Symbo l tr (Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Con ditions V DD = 480 V I D = 25 A V GS = 10 V R G = 4.7 (see test circuit, figure 5) Min. T yp. 70 25 105 Max. Unit ns ns ns SOURCE DRAIN DIODE Symbo l ISD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 25 A V GS = 0 840 19.5 46.5 di/dt = 100 A/s I SD = 25 A T j = 150 o C V DD = 100 V (see test circuit, figure 5) Test Con ditions Min. T yp. Max. 25 100 2 Unit A A V ns C A () Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STY25NA60 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STY25NA60 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STY25NA60 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STY25NA60 Max247 MECHANICAL DATA mm MIN. A A1 b b1 b2 c D e E L L1 4.70 2.20 1.00 2.00 3.00 0.40 19.70 5.35 15.30 14.20 3.70 TYP. MAX. 5.30 2.60 1.40 2.40 3.40 0.80 20.30 5.55 15.90 15.20 4.30 MIN. inch TYP. MAX. DIM. P025Q 7/8 STY25NA60 Information furnished is believed to be accurate and reliable. However, STMicroelect onics assumes no responsibil ity for the consequences r of use of such information nor for any infringement of patents or other rights of third partes which may result from its use. No license is i granted by implication or otherwise under any patent or patent rights of STMicroelectro nics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all informaton previously supplied. STMicroelectronics products i are not authorized for use as critical components in life support devices or systems with express written approval of STMicroelectronics. out The ST logo is a trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysi - Malta - Mexico - Morocco - The Netherlands a Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 8/8 http://www.st.com . |
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