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| RFP22N10, RF1S22N10SM Data Sheet January 2002 File Number 2385.3 22A, 100V, 0.080 Ohm, N-Channel Power MOSFETs These N-Channel power MOSFETs are manufactured using the MegaFET process. This process, which uses feature sizes approaching those of LSI integrated circuits gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as switching regulators, switching converters, motor drivers, and relay drivers. These transistors can be operated directly from integrated circuits. Formerly developmental type TA9845. Features * 22A, 100V * rDS(ON) = 0.080 * UIS SOA Rating Curve (Single Pulse) * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * 175oC Operating Temperature * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards" Ordering Information PART NUMBER RFP22N10 RF1S22N10SM PACKAGE TO-220AB TO-263AB BRAND RFP22N10 F1S22N10 Symbol D NOTE: When ordering use the entire part number. Add the suffix, 9A, to obtain the TO-263AB variant in tape and reel, e.g. RF1S22N10SM9A. G S Packaging JEDEC TO-220AB SOURCE DRAIN GATE GATE SOURCE DRAIN (FLANGE) JEDEC TO-263AB DRAIN (FLANGE) (c)2002 Fairchild Semiconductor Corporation RFP22N10, RF1S22N10SM Rev. B RFP22N10, RF1S22N10SM Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFP22N10, RF1S22N10SMS Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 1M) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ , TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg 100 100 20 22 50 100 0.67 -55 to 175 300 260 UNITS V V V A A W W/oC oC oC oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 150oC. Electrical Specifications PARAMETER TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS TEST CONDITIONS ID = 250A, VGS = 0 (Figure 7) VGS = VDS, ID = 250A (Figure 9) VDS = 80V, VGS = 0V VDS = 80V, VGS = 0V, TC = 150oC MIN 100 2 VGS = 0V to 20V VGS = 0V to 10V VGS = 0V to 2V VDD = 80V, ID 22A, RL = 3.64 Ig(REF) = 1mA (Figure 11) TO-220 and TO-263 TYP 13 24 65 18 MAX 4 1 50 100 0.080 60 120 150 75 3.5 1.5 62 UNITS V V A A nA ns ns ns ns ns ns nC nC nC oC/W oC/W Drain to Source Breakdown Voltage Gate to Source Threshold Voltage Zero-Gate Voltage Drain Current Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time Total Gate Charge Gate Charge at 10V Threshold Gate Charge Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient IGSS rDS(ON) t(ON) td(ON) tr td(OFF) tf t(OFF) QG(TOT) QG(10) QG(TH) RJC RJA VGS = 20V, VDS = 0 ID = 22A, VGS = 10V (Figure 8) VDD = 50Vwwwwwwwww, ID = 11A, RL = 4.5, VGS = 10V, RGS = 25 (Figure 11) Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage (Note 2) Diode Reverse Recovery Time NOTE: 2. Pulse Test: Pulse Duration = 300s maximum, duty cycle = 2%. SYMBOL VSD trr ISD = 22A ISD = 22A, dISD/dt = 100A/s TEST CONDITIONS MIN TYP MAX 1.5 200 UNITS V ns (c)2002 Fairchild Semiconductor Corporation RFP22N10, RF1S22N10SM Rev. B RFP22N10, RF1S22N10SM Typical Performance Curves 1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 0.6 0.4 0.2 0 0 25 125 50 75 100 TC , CASE TEMPERATURE (oC) 150 175 ID, DRAIN CURRENT (A) Unless otherwise Specified 25 20 15 10 5 0 25 50 75 100 125 150 175 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 100 ID MAX (CONTINUOUS) ID , DRAIN CURRENT (A) 10 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 1 DC OPERATION IAS, AVALANCHE CURRENT (A) TJ = MAX RATED SINGLE PULSE TC = 25oC 100 VGS = 20V STARTING TJ = 25oC 10 STARTING TJ = 150oC If R = 0 tAV = (L)(IAS)/(1.3 RATED BVDSS - VDD) If R 0 tAV = (L/R)ln[(IAS R)/(1.3 RATED BVDSS - VDD) + 1] 0.1 1 tAV, TIME IN AVALANCHE (ms) 10 VDSS(MAX) = 100V 0.1 1 10 VDS , DRAIN TO SOURCE VOLTAGE (V) 100 1 0.01 FIGURE 3. FORWARD BIAS SAFE OPERATING AREA FIGURE 4. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY 50 VGS = 10V ID , DRAIN CURRENT (A) 40 VGS = 8V 30 VGS = 6V VGS = 7V ID , DRAIN CURRENT (A) 50 PULSE DURATION = 80s VDS = 15V DUTY CYCLE = 0.5% MAX. TC = -55oC 30 TC = 175oC TC = 25oC 40 20 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX TC = 25oC VGS = 5V 20 10 VGS = 4V 0 10 0 0 2 4 6 8 VDS , DRAIN TO SOURCE VOLTAGE (V) 10 0 2 4 6 8 VGS , GATE TO SOURCE VOLTAGE (V) 10 FIGURE 5. SATURATION CHARACTERISTICS FIGURE 6. TRANSER CHARACTERISTICS (c)2002 Fairchild Semiconductor Corporation RFP22N10, RF1S22N10SM Rev. B RFP22N10, RF1S22N10SM Typical Performance Curves 2.0 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE NORMALIZED DRAIN TO SOURCE ON RESISTANCE ID = 250A Unless otherwise Specified (Continued) 3.0 2.5 ID = 22A, VGS = 10V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 1.5 2.0 1.5 1.0 0.5 0 -50 1.0 0.5 0 -50 100 50 150 0 TJ , JUNCTION TEMPERATURE (oC) 200 0 50 100 150 200 TJ , JUNCTION TEMPERATURE (oC) FIGURE 7. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE FIGURE 8. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 1.50 VGS = VDS , ID = 250A NORMALIZED GATE THRESHOLD VOLTAGE 1.25 1.00 0.75 0.50 0.25 0 -50 C, CAPACITANCE (pF) 2500 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGS 2000 1500 CISS 1000 500 CRSS 0 50 100 150 200 0 0 5 10 15 20 TJ , JUNCTION TEMPERATURE (oC) COSS 25 VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 9. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE VDS, DRAIN TO SOURCE VOLTAGE (V) 100 10 VGS, GATE TO SOURCE VOLTAGE (V) GATE TO SOURCE VOLTAGE RL = 4.55 IG(REF) = 1mA VGS = 10V 75 7.5 VDD = VDSS VDD = VDSS 50 0.75VDSS 0.50VDSS 0.25VDSS 0.75VDSS 0.50VDSS 0.25VDSS 5 25 2.5 DRAIN TO SOURCE VOLTAGE 0 20 IG(REF) IG(ACT) t, TIME (s) 80 IG(REF) IG(ACT) 0 NOTE: Refer to Fairchild Application Notes AN7254 and AN7260. FIGURE 11. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT (c)2002 Fairchild Semiconductor Corporation RFP22N10, RF1S22N10SM Rev. B RFP22N10, RF1S22N10SM Test Circuits and Waveforms VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD + - 0V IAS 0.01 0 tAV FIGURE 12. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 13. UNCLAMPED ENERGY WAVEFORMS tON VDS VDS VGS RL + tOFF td(OFF) tr tf 90% td(ON) 90% DUT RGS VGS - VDD 0 10% 90% 10% VGS 0 10% 50% PULSE WIDTH 50% FIGURE 14. SWITCHING TIME TEST CIRCUIT VDS RL FIGURE 15. RESISTIVE SWITCHING WAVEFORMS VDD Qg(TOT) Qgd Qgs VGS VGS + VDD DUT IG(REF) IG(REF) 0 0 VDS FIGURE 16. GATE CHARGE TEST CIRCUIT FIGURE 17. GATE CHARGE WAVEFORMS (c)2002 Fairchild Semiconductor Corporation RFP22N10, RF1S22N10SM Rev. B TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM DISCLAIMER FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R) SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R) VCXTM STAR*POWER is used under license FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4 |
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