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| 5 4 3 2 1 JACKALOPE - CNR/ACR multi-channel upgrade card D REVISION HISTORY: 1) 04/12/01 - Original release. 2) 06/27/01 - Changed C27,C28 from 10 to 220uF; Changed C22, C24 from 220 to 3.3uF; analog to digital ground connection on codec page; pull up/down on SPDIF output; changed +5VD_ACRC to ACR_5VD (Analog I/O) D SCOPE: Jackalope provides an upgrade to 4/6 channels on CNR or ACR equipped motherboards. Stuffing options allow for 2/4 channel operation for motherboards without onboard audio. CDROM In VIDEO In BLOCK DIAGRAM: MIC In C B UNIQUE COMPONENTS: 1) STAC9756 Audio Codec with 48-TQFP, 9.0mm tip-to-tip, package. 2) 24.576 MHz crystal in Epson MA-306 package, use dual MA-306/CA-301 layout. 3) LT1121 in SOT-223. 4) CUI SJ-3535 stereo connector. 5) Radial lead capacitors PCB footprints are listed in PackageDiameter/LeadSpacing/LeadDiameter form. 6) 0.33uF cap, Panasonic F/Y5V 16V 0.85mm tall 805 series, or B/Y5P 16V 0.85mm tall 1206 series. Substitution of +1uF EIA3216 cap is acceptable. 7) EIA prefix footprint surface mount components (EIA abcd) have dimensions of a.b mm by c.d mm. 8) SMT prefix footprint surface mount components (SMT wxyz) have dimensions of 0.wx inches by 0.yz inches. 9) Sharp GP1FE500TK "Optical Mini-Jack" optical connector AUX In LINE In C Analog In ACR Connector Analog Out AC Link STAC97XX REAR Out CTR/LFE Out S/PDIF Out Power Conditioning: +5V AVDD +3.3V DVDD B SigmaTel, Inc. 3815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 fax: (512)744-1700 Title A A Overview Size A Date: 5 4 3 STEVB-AC-ACRCNR0601 Monday, July 09, 2001 2 2-9750/66-RD2-1.0-070901 Sheet 1 1 Rev B 7 of 5 4 3 2 1 Advanced Communications Riser Connector CON1 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 Audio_mute# Audio_GND PC_Beep RESERVED RESERVED PRI_DN# -12V AGND +12V AGND +5V Digital AUDIO_PWRDN MONO_PHONE RESERVED RESERVED RESERVED AGND +5V Dual USB_OC# DGND USB+ USBA1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 6 PC_BEEP D D 3,5 ACR_PRI_DN# 3,4 ACR_12V 3,4,7 ACR_5VD KEY DGND RESERVED RESERVED +3.3V Digital DGND AC97_SDATA_OUT AC97_RESET# AC97_SDATA_IN3 SDI_2/3_GND AC97_SDATA_IN2 DGND AC97_MSTRCLK EEPROM_SCL TXD3 MDIO TXD2 TX_ENABLE TXD1 3.3 DVDD TXD0 TX_ERROR TX_CLK DVDD COL DGND RDCLK 3.3 DVDD IPB_OUT:0 DGND IPB_OUT:1 reserved TDFRAME DGND TXD3 MDIO TXD2 TX_ENABLE TXD1 3.3 DVDD TXD0 TX_ERROR TX_CLK DVDD COL Reserved Reserved Reserved Reserved Reserved ACR Connector DGND SPDIF_IN DGND +3.3V Dual DGND AC97_SYNC SDO_GND AC97_SDATA_IN1 SDO_0/1_GND AC97_SDATA_IN0 BIT_GND AC97_BITCLK EEPROM_SDL RXD3 MDC RXD2 RX_DV RXD1 DGND RXDO RX_ERROR RX_CLK DGND CRS DGND TDCLK IPB_IN:1 IPB_IN:0 DGND reserved DSLRST RDFRAME DGND RXD3 MDC RXD2 RX_DV RXD1 DGND RXDO RX_ERROR RX_CLK DGND CRS RESERVED RESERVED RESERVED RESERVED RESERVED 3,4,5 ACR_3.3VD 3,6 AC97_SDATA_OUT 3,5,6 AC97_RST# AC97_SYNC 3,6 AC97_SDATA_IN1 3,5 AC97_SDATA_IN0 3,5 ACR_SDA AC97_BITCLK 3,6 ACR_SDA 5 C 5 C ACR_SCL ACR_SCL ACR_3.3VD R1 0 C1 0.1uF 1 2 3 6 7 A0 A1 A2 SCLK WP 8 VCC U1 AT24C164/SO SDA 5 B R2 100K 4 GND ACR_SCL B R3 10K Populate R1 for AT24C164. Remove R1 for ST34A02 or second ACR in system (24C164 only). Don't care for 24LC09 This design is the property of SigmaTel Inc. It is offered on an "as is" basis, and carries no implied warranty. SigmaTel, Inc. A 3815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 fax: (512)744-1700 Title A ACR connector Size B Date: 5 4 3 2 STEVB-AC-ACRCNR0601 Monday, July 09, 2001 Sheet 1 Rev A 2 of 7 2-9750/66-RD2-1.0-070901 5 4 3 2 1 Communication and Networking Riser Connector CON2 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 MII_MDIO MII_COL MII_TXC GND MII_RXERR MII_TXD3 GND MII_TXD1 MII_TXEN GND MII_RXD2 MII_RXD0 GND RESERVED +5Vdual USB_OC# GND -12V +3.3VD USB+ GND USB+12V GND +3.3Vdual +5VD MII_MDC MII_CRS GND MII_RXDV MII_RXC GND MII_TXD2 MII_TXD0 GND RESERVED MII_RXD1 MII_RXD3 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 D D 2,4,5 CNR_3.3VD A13 A14 A15 A16 A17 A18 A19 U2 CNR_12V CNR_5VD 2,4 2,4,7 1 2 3 4 A0 A1 A2 GND DVDD WCSCL SDA 8 7 6 5 C CNR_3.3VD C2 0.1uF C KEY CDC_DN_ENAB# Low when primary audio codec is located on the motherboard. B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 GND EE_DOUT EE_SHCLK GND SMB_A0 SMB_SCL CDC_DN_ENAB# GND AC97_SYNC AC97_SDATA_OUT AC97_BITCLK CNR Connector GND EE_DIN EE_DCS SMB_A1 SMB_A2 SMB_SDA AC97_RESET# RESERVED AC97_SDATA_IN1 AC97_SDATA_IN0 GND A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 R5 100K R6 100K R7 100K 256 x 8 EEPROM R4 100K CNR_SDA AC97_RST# 2,5,6 5 2,5 CNR_CDC_DN_ENAB# 2,6 AC97_SYNC 2,6 AC97_SDATA_OUT 2,6 AC97_BITCLK AC97_SDATA_IN1 2,5 AC97_SDATA_IN0 2,5 CNR_SCL B 5 B For additional information on the CNR specification, please goto: http://developer.intel.com/technology/CNR/ AC97_SYNC AC97_SDATA_OUT AC97_BITCLK 1 1 1 TP5 SYNC TP6 SDO TP7 BCLK TP8 PDN# TP9 SDIN0 TP10 SDIN1 TP11 RST# CNR_CDC_DN_ENAB#1 AC97_SDATA_IN0 AC97_SDATA_IN1 AC97_RST# 1 1 1 SigmaTel, Inc. 3815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 fax: (512)744-1700 Title A A CNR connector Size B Date: 5 4 3 2 STEVB-AC-ACRCNR0601 Monday, July 09, 2001 Sheet 1 Rev A 3 of 7 2-9750/66-RD2-1.0-070901 5 4 3 2 1 Power Conditioning D Low cost 5V supply option. Remove linear regulator, L2, and C3. Install L1. Audio noise may be increased. D 2,3,7 ACR_5VD 2,3,7 CNR_5VD L1 HZ0805E601R-00 U3 LT1121_ST-5 2,3 2,3 ACR_12V CNR_12V L2 HZ0805E601R-00 + 1 2 C3 +10uF/16V 3 VIN OUTPUT AVDD GND + C4 +10uF/16V Audio Codec Analog Power C C DVDD 2,3,5 ACR_3.3VD C5 2,3,5 CNR_3.3VD + +10uF/16V L3 HZ0805E601R-00 Audio Codec Digital Power B B Codec digital powered from +3.3Vmain since audio codecs are not required to retain their register states locally during suspend modes. SigmaTel, Inc. A 3815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 fax: (512)744-1700 Title A POWER Size B Date: 5 4 3 2 STEVB-AC-ACRCNR0601 Monday, July 09, 2001 Sheet 1 Rev A 4 of 7 2-9750/66-RD2-1.0-070901 5 4 3 2 1 This circuit will switch the codec on the riser from primary to secondary if a codec is present on the motherboard. D Stuffing option for SDATA_IN routing if mux is not used. R8 2,3 AC97_SDATA_IN1 R9 2,3 AC97_SDATA_IN0 DVDD DVDD 4 3 2 1 15 14 13 12 11 10 9 CODEC_ID0 CODEC_ID1 6 6 7 16 U4 I0 I1 I2 I3 I4 I5 I6 I7 S0 S1 S2 EN 0 OPTIONAL 0 OPTIONAL D VCC Y 5 SDATA_IN 6 R10 100K This pull-up is required for CNR. C C 2,3 CNR_CDC_DN_ENAB# 2,3 ACR_PRI_DN# R11 0 PI5C3251/SO R12 0 OPTIONAL R13 0 OPTIONAL 8 GND Programming header is a row of pads on back of board to allow EEPROM programming during bed of nails testing B Stuffing option for CODEC ID if R24 removed (CDC_DN_ENAB# and PRI_DN# unused) 2,3,4 ACR_3.3VD 2 ACR_SDA 2 ACR_SCL 2,3,6 AC97_RST# 1 3 5 7 9 J1 B 2 4 6 8 10 CNR_3.3VD CNR_SDA CNR_SCL 2,3,4 3 3 Programming Header AC97_RESET# 0 1 1 CODEC DOWN# X 0 1 AC97_SDATA_IN0 Hi-Z Hi-Z SDATA_IN AC97_SDATA_IN1 Hi-Z SDATA_IN Hi-Z Note: CODEC DOWN# represents ACR_PRI_DN# or CNR_CDC_DN_ENAB# SigmaTel, Inc. A 3815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 fax: (512)744-1700 Title A CODEC Disable circuits Size B Date: 5 4 3 2 STEVB-AC-ACRCNR0601 Monday, July 09, 2001 Sheet 1 Rev A 5 of 7 2-9750/66-RD2-1.0-070901 5 4 3 2 1 AVDD DVDD D C8 0.1uF C9 1uF Place 0.1uF decoupling caps as close to Codec as possible. U5 1 9 2 3 DVDD1 DVDD2 XTL_IN XTL_OUT AVDD1 AVDD2 VREF VREFOUT PC_BEEP AUX_L AUX_R VIDEO_L VIDEO_R CD_L CD_GND CD_R MIC1 MIC2 LINE_IN_L LINE_IN_R PHONE MONO_OUT LINE_OUT_L LINE_OUT_R LNLVL_OUT_L LNLVL_OUT_R AFILT1 AFILT2 CAP2 4 7 DVSS1 DVSS2 STAC9756 AVSS1 AVSS2 25 38 C6 1uF C7 0.1uF D C10 27 28 12 14 15 16 17 18 19 20 21 22 23 24 13 37 35 36 R19 39 41 29 30 32 26 42 C17 1uF R20 C13 VREFOUT 1uF 7 PC_BEEP 2 Y1 C11 27pF 24.576MHz 2,3,5 AC97_RST# 2,3 AC97_SDATA_OUT 5 SDATA_IN 2,3 AC97_SYNC 2,3 AC97_BITCLK R17 22 OPTION C C12 27pF R15 1K 0.1uF R14 1K R16 22 11 5 8 10 6 40 43 44 48 34 31 33 RESET# SDATA_OUT SDATA_IN SYNC BIT_CLK D_SCLK D_LRCLK I2S_OUT1 SPDIF/I2S_OUT2 Z_SCLK Z_LRCLK Z_DATA EAPD/GPIO R18 0 OPTION TP1 pin44 TP2 pin43 1 1 CD_L CD_GND CD_R MIC1 LINE_IN_L LINE_IN_R 7 7 7 7 7 7 C14 0.1uF C15 0.1uF C C16 27pF OPTION FOR STAC9766 ONLY OPTIONAL EMI FILTER: Capacitor value selected to minimize high-frequency components in clock output. Capacitor should be selected to critically damp, or slightly under damp the BIT_CLK signal. Do not install capacitor in secondary codec configuration or if additional R-C EMI filters are present on the motherboard BIT_CLK signal. LINE_OUT_L LINE_OUT_R 0 7 7 5 OHMS FOR STC9766 driving headphones. REAR_OUT_L 7 REAR_OUT_R 7 TP3 EAPD 1 47 R21 47K R22 47K 7 JACK_SENSE 5 CODEC_ID0 5 CODEC_ID1 R23 47K 0 45 46 CID0 CID1 C18 820pF C19 820pF B STAC9700 STAC9721 STAC9750 STAC9756 STAC9766 DVDD JP1 1 2 MIC_GND 7 B Install R44 to disable SPDIF output per AC97 r2.2 spec. Route mic ground and mic_in next to each other to minimize noise. R44 OPT 10K 1 JP100 2 7 SPDIF_OUT Connect Analog and Digital ground planes together close to codec. SigmaTel, Inc. A 3815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 fax: (512)744-1700 Title A AUDIO CODEC Size B Date: 5 4 3 2 STEVB-AC-ACRCNR0601 Monday, July 09, 2001 Sheet 1 Rev B 6 of 7 2-9750/66-RD2-1.0-070901 5 4 3 2 1 LINE-IN Circuit L4 HZ0805E601R-00 2 3 4 5 1 J2 CUI SJ-3535N C21 C23 L6 HZ0805E601R-00 R26 47K R27 47K 0.33uF 0.33uF LINE_IN_R LINE_IN_L 6 6 FRONT CHANNEL C22 +3.3uF/50V + 6 6 LINE_OUT_R LINE_OUT_L C20 1000pF R24 47K L5 HZ0805E601R-00 2 3 4 5 1 C24 +3.3uF/50V + D D LAYOUT NOTE: 1 5 3 2 4 *** Note: 3.3uF ac-coupling capacitors will drive loads of 10K ohms and greater and still meet the WHQL bandwidth requirements of PC99. C25 1000pF R25 47K L7 HZ0805E601R-00 J3 CUI SJ-3535N BOTTOM VIEW CUI STACK SJ-3535 3.5mm Audio Jack REAR CHANNEL (Headphone) C27 +220uF/6.3V + 6 REAR_OUT_R 6 REAR_OUT_L C26 1000pF R28 47K L8 HZ0805E601R-00 2 3 4 5 1 Supports 3-Terminal and 2-Terminal MIC input. This node 2.0V min at 800uA, as required by PC99. VREFOUT + C30 +10uF/16V R30 510 6 C28 +220uF/6.3V + C Microphone Input Circuit C 2 3 4 5 1 J5 CUI SJ-3535N 2K R31 *** Note: 3.3uF ac-coupling capacitors will drive loads of 10K ohms and greater and still meet the WHQL bandwidth requirements of PC99. C29 1000pF R29 47K L9 HZ0805E601R-00 J4 CUI SJ-3535N C31 R32 3.3K 0.068uF MIC1 6 C32 3300pF MIC_GND 6 S/PDIF SERIAL OUTPUT 2,3,4 1 TP4 SPDIF C34 0.1uF R35 220 ACR_5VD R33 10K JACK_SENSE 6 J6 C33 470pF R34 110 4 5 6 3 2 1 B B Microphone ground should be routed back to codec along with the main microphone signal trace. Improper microphone grounding can result in audible mouse and CDROM noise. Tie MIC_GND to AGND at a point near the codec. CDROM Circuit with 4.5dB Attenuation J7 4 3 2 1 MOLEX 70553-0038 R37 R38 R39 5.6K 5.6K 5.6K C35 C36 C37 0.33uF 0.33uF 0.33uF CD_R CD_GND CD_L 6 6 6 6 SPDIF_OUT R36 110 1 2 3 4 R40 10K R41 10K R42 10K Some optical trasmitters float high when the codec is reset which causes the codec to disable the S/PDIF output. Install R43 to prevent unwanted S/PDIF disable. R43 OPT 100K C38 0.1uF 8 7 9 Drive IC GP1FE500TK SigmaTel, Inc. A Note: Attenuation of the CDROM input is often useful since many CDROMs output signals larger than 1Vrms. If 0.0dB attenuation is desired, R13, R14, and R15 should be be changed to 0.0R, and R16, R17, and R18 should not be installed. CDROM Attenuation R18,R19,R20 R23,R24,R25 4.5dB 5.6K 10K 0dB 0 DNS Size B Date: Title 3815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 fax: (512)744-1700 A Analog I/O STEVB-AC-ACRCNR0601 Monday, July 09, 2001 Sheet 1 Rev B 7 of 7 5 4 3 2 2-9750/66-RD2-1.0-070901 |
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