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LTC488/LTC489 Quad RS485 Line Receiver FEATURES s s s s DESCRIPTIO s s s s s Low Power: ICC = 7mA Typ. Designed for RS485 or RS422 Applications Single 5V Supply - 7V to 12V Bus Common Mode Range Permits 7V Ground Difference Between Devices on the Bus 60mV Typical Input Hysteresis Receiver Maintains High Impedance in Three-State or with the Power Off 28ns Typical Receiver Propagation Delay Pin Compatible with the SN75173 (LTC488) Pin Compatible with the SN75175 (LTC489) The LTC488 and LTC489 are low power differential bus/ line receivers designed for multipoint data transmission standard RS485 applications with extended common mode range (12V to - 7V). They also meet the requirements of RS422. The CMOS design offers significant power savings over its bipolar counterpart without sacrificing ruggedness against overload or ESD damage. The receiver features three-state outputs, with the receiver output maintaining high impedance over the entire common mode range. The receiver has a fail-safe feature which guarantees a high output state when the inputs are left open. Both AC and DC specifications are guaranteed 4.75V to 5.25V supply voltage range. APPLICATI s s S Low Power RS485/RS422 Receivers Level Translator TYPICAL APPLICATI EN EN EN 2 4 DI DRIVER 1/4 LTC486 120 120 1 RECEIVER 1/4 LTC488 4000 FT 24 GAUGE TWISTED PAIR EN12 EN12 2 DI DRIVER 1/4 LTC487 120 120 1 4000 FT 24 GAUGE TWISTED PAIR 4 RECEIVER 1/4 LTC489 3 RO U EN 12 3 RO LTC488/9 TA01 UO UO 1 LTC488/LTC489 ABSOLUTE AXI U RATI GS Supply Voltage (VCC) .............................................. 12V Control Input Currents ........................ - 25mA to 25mA Control Input Voltages ................... - 0.5V to VCC + 0.5V Receiver Input Voltages ........................................ 14V Receiver Output Voltages .............. - 0.5V to VCC + 0.5V PACKAGE/ORDER I FOR ATIO TOP VIEW B1 A1 RO1 EN RO2 A2 B2 GND 1 2 3 4 5 6 7 8 R R R R 16 VCC 15 B4 14 A4 13 RO4 12 EN 11 RO3 10 A3 9 B3 ORDER PART NUMBER LTC488CN LTC488CS LTC488IN LTC488IS N PACKAGE 16-LEAD PLASTIC DIP S PACKAGE 16-LEAD PLASTIC SOL TJMAX = 150C, JA = 70C/W (N PKG) TJMAX = 150C, JA = 90C/W (S PKG) Consult factory for Military grade parts. DC ELECTRICAL CHARACTERISTICS VCC = 5V 5% (Notes 2 and 3), unless otherwise noted. SYMBOL VINH VINL IIN1 IIN2 VTH VTH VOH VOL IOZR ICC RIN IOSR t PLH t PHL t SKD PARAMETER Input High Voltage Input Low Voltage Input Current Input Current (A, B) Differential Input Threshold Voltage for Receiver Receiver Input Hysteresis Receiver Output High Voltage Receiver Output Low Voltage Three-State Output Current at Receiver Supply Current Receiver Input Resistance Receiver Short-Circuit Current Receiver Input to Output Receiver Input to Output | t PLH - t PHL | Differential Receiver Skew CONDITIONS EN, EN, EN12, EN34 EN, EN, EN12, EN34 EN, EN, EN12, EN34 VCC = 0V or 5.25V, VIN = 12V VCC = 0V or 5.25V, VIN = - 7V - 7V VCM 12V VCM = 0V IO = - 4mA, VID = 0.2V IO = 4mA, VID = - 0.2V VCC = Max 0.4V VO 2.4V No Load - 7V VCM 12V, VCC = 0V 0V VO VCC CL = 15pF (Figures 1, 3) CL = 15pF (Figures 1, 3) CL = 15pF (Figures 1, 3) q q q q q q q q q q q q q q 2 U U W WW U W (Note 1) Operating Temperature Range LTC488C/LTC489C ................................. 0C to 70C LTC488I/LTC489I .............................. - 40C to 85C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec.)................ 300C TOP VIEW B1 A1 RO1 EN12 RO2 A2 B2 GND 1 2 3 4 5 6 7 8 R R R R 16 VCC 15 B4 14 A4 13 RO4 12 EN34 11 RO3 10 A3 9 B3 ORDER PART NUMBER LTC489CN LTC489CS LTC489IN LTC489IS N PACKAGE 16-LEAD PLASTIC DIP S PACKAGE 16-LEAD PLASTIC SOL TJMAX = 150C, JA = 70C/W (N PKG) TJMAX = 150C, JA = 90C/W (S PKG) MIN 2.0 TYP MAX 0.8 2 1.0 - 0.8 UNITS V V A mA mA V mV V - 0.2 60 3.5 0.2 0.4 1 7 12 7 12 12 28 28 4 85 55 55 10 V A mA k mA ns ns ns LTC488/LTC489 DC ELECTRICAL CHARACTERISTICS VCC = 5V 5% (Notes 2, 3 and 4), unless otherwise noted. SYMBOL t ZL t ZH t LZ t HZ PARAMETER Receiver Enable to Output Low Receiver Enable to Output High Receiver Disable from Low Receiver Disable from High CONDITIONS CL = 15pF (Figures 2, 4) S1 Closed CL = 15pF (Figures 2, 4) S2 Closed CL = 15pF (Figures 2, 4) S1 Closed CL = 15pF (Figures 2, 4) S2 Closed q q q q MIN TYP 30 30 30 30 MAX 45 45 45 45 UNITS ns ns ns ns The q denotes specifications which apply over the operating temperature range. Note 1: "Absolute Maximum Ratings" are those beyond which the safety of the device cannot be guaranteed. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. Note 3: All typicals are given for VCC = 5V and TA = 25C. TYPICAL PERFOR A CE CHARACTERISTICS Receiver Output Low Voltage vs Temperature at I = 8mA 0.9 0.8 0.7 4.8 4.6 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 -25 0 75 50 25 TEMPERATURE (C) 100 125 4.2 4.0 3.8 3.6 3.4 3.2 3.0 -50 -25 0 75 50 25 TEMPERATURE (C) 100 125 OUTPUT CURRENT (mA) OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) Receiver Output Low Voltage vs Output Current at TA = 25C 36 OUTPUT CURRENT (mA) 28 24 20 16 12 8 4 0 0 0.5 1.5 1.0 OUTPUT VOLTAGE (V) 2.0 488 G04 INPUT THRESHOLD VOLTAGE (V) 32 1.59 TIME (ns) UW 488 G01 Receiver Output High Voltage vs Temperature at I = 8mA -18 -16 -14 -12 -10 -8 -6 -4 -2 0 Receiver Output High Voltage vs Output Current at TA = 25C 4.4 5 4 3 OUTPUT VOLTAGE (V) 488 G03 2 488 G02 TTL Input Threshold vs Temperature 1.63 5 Receiver | tPLH - tPHL | vs Temperature 1.61 4 3 1.57 2 1.55 -50 -25 0 75 25 50 TEMPERATURE (C) 100 125 1 -50 -25 0 75 25 50 TEMPERATURE (C) 100 125 488 G05 488 G06 3 LTC488/LTC489 TYPICAL PERFOR A CE CHARACTERISTICS Supply Current vs Temperature 7.0 SUPPLY CURRENT (mA) PI FU CTIO S PIN 1 (B1) Receiver 1 input. PIN 2 (A1) Receiver 1 input. PIN 3 (RO1) Receiver 1 output. If the receiver output is enabled, then if A > B by 200mV, RO1 will be high. If A < B by 200mV, then RO1 will be low. PIN 4 (EN)(LTC488) Receiver output enabled. See Function Table for details. PIN 4 (EN12)(LTC489) Receiver 1, Receiver 2 output enabled. See Function Table for details. PIN 5 (RO2) Receiver 2 output. Refer to RO1. PIN 6 (A2) Receiver 2 input. PIN 7 (B2) Receiver 2 input. PIN 8 (GND) Ground connection. PIN 9 (B3) Receiver 3 input. PIN 10 (A3) Receiver 3 input. PIN 11 (RO3) Receiver 3 output. Refer to RO1. PIN 12 (EN)(LTC488) Receiver output disabled. See Function Table for details. PIN 12 (EN34)(LTC489) Receiver 3, Receiver 4 output enabled. See Function Table for details. PIN 13 (RO4) Receiver 4 output. Refer to RO1. PIN 14 (A4) Receiver 4 input. PIN 15 (B4) Receiver 4 input. PIN 16 (VCC) Positive Supply; 4.75V VCC 5.25V FU CTIO TABLES LTC488 DIFFERENTIAL A-B VID 0.2V -0.2V < VID < 0.2V VID 0.2V X EN H X H X H X L ENABLES EN X L X L X L H OUTPUT RO H H ? ? L L Z 4 UW 6.6 6.2 5.8 5.4 -50 -25 0 75 25 50 TEMPERATURE (C) 100 125 488 G07 U U U U U LTC489 DIFFERENTIAL A-B VID 0.2V -0.2V < VID < 0.2V VID 0.2V X ENABLES EN12 or EN34 H H H L OUTPUT RO H ? L Z H: High Level L: Low Level X: Irrelevant ?: Indeterminate Z: High Impedance (Off) LTC488/LTC489 TEST CIRCUITS 100pF A D DRIVER 54 100pF B RECEIVER RO CL 488/9 F02 488/9 F01 S1 RECEIVER OUTPUT CL 1k S2 1k VCC Figure 1. Receiver Timing Test Circuit Figure 2. Receiver Enable and Disable Timing Test Circuit Note: The input pulse is supplied by a generator having the following characteristics: f = 1MHz, Duty Cycle = 50%, tr < 10ns, tf 10ns, ZOUT = 50 SWITCHI G TI E WAVEFOR S VOD2 INPUT A, B -VOD2 tPHL VOH RO VOL 488/9 F03 INPUT 0V f = 1MHz; tr 10ns; t f 10ns 0V tPLH 1.5V Figure 3. Receiver Propagation Delays APPLICATI S I FOR ATIO EN 4 3 120 SHIELD DX 1/4 LTC486 DX 1 12 EN 1 2 1/4 LTC488 OR 1/4 LTC489 RX EN 3 RX 488/9 F05 2 EN 12 DX 4 1/4 LTC486 1 DX Figure 5. Typical Connection U W W U W UO U 3V EN OR EN12 0V tZL 1.5V f = 1MHz; tr 10ns; t f 10ns 1.5V tLZ 5V 1.5V RO VOL tZH VOH RO 0V 1.5V OUTPUT NORMALLY LOW tHZ OUTPUT NORMALLY HIGH 0.5V 0.5V 1.5V 488/9 F04 Figure 4. Receiver Enable and Disable Times SHIELD 2 120 1 RX 1/4 LTC488 OR 1/4 LTC489 3 RX 3 5 LTC488/LTC489 APPLICATI S I FOR ATIO Typical Application A typical connection of the LTC488/LTC489 is shown in Figure 5. Two twisted-pair wires connect up to 32 driver/ receiver pairs for half-duplex data transmission. There are no restrictions on where the chips are connected to the wires, and it isn't necessary to have the chips connected at the ends. However, the wires must be terminated only at the ends with a resistor equal to their characteristic impedance, typically 120. The input impedance of a receiver is typically 20k to GND, or 0.5 unit RS485 load, so in practice 50 to 60 transceivers can be connected to the same wires. The optional shields around the twisted-pair help reduce unwanted noise, and are connected to GND at one end. Cables and Data Rate The transmission line of choice for RS485 applications is a twisted-pair. There are coaxial cables (twinaxial) made for this purpose that contain straight-pairs, but these are less flexible, more bulky, and more costly than twistedpairs. Many cable manufacturers offer a broad range of 120 cables designed for RS485 applications. Losses in a transmission line are a complex combination of DC conductor loss, AC losses (skin effect), leakage, and AC losses in the dielectric. In good polyethylene cable such as the Belden 9841, the conductor losses and dielectric losses are of the same order of magnitude, leading to relatively low overall loss (Figure 6). 10 CABLE LENGTH (FT) LOSS PER 100 FT (dB) 1 0.1 0.1 1 10 FREQUENCY (MHz) 100 488/9 F06 Figure 6. Attenuation vs Frequency for Belden 9841 6 U When using low loss cables, Figure 7 can be used as a guideline for choosing the maximum line length for a given data rate. With lower quality PVC cables, the dielectric loss factor can be 1000 times worse. PVC twisted-pairs have terrible losses at high data rates (> 100kbps), and greatly reduce the maximum cable length. At low data rates however, they are acceptable and much more economical. 10k 1k 100 10 10k 100k 1M DATA RATE (bps) 2.5M 10M 488/9 F07 W U UO Figure 7. Cable Length vs Data Rate Cable Termination The proper termination of the cable is very important. If the cable is not terminated with its characteristic impedance, distorted waveforms will result. In severe cases, distorted (false) data and nulls will occur. A quick look at the output of the driver will tell how well the cable is terminated. It is best to look at a driver connected to the end of the cable, since this eliminates the possibility of getting reflections from two directions. Simply look at the driver output while transmitting square wave data. If the cable is terminated properly, the waveform will look like a square wave (Figure 8). If the cable is loaded excessively (47), the signal initially sees the surge impedance of the cable and jumps to an initial amplitude. The signal travels down the cable and is reflected back out of phase because of the mistermination. When the reflected signal returns to the driver, the amplitude will be lowered. The width of the pedestal is equal to twice the electrical length of the cable (about 1.5ns/foot). If the cable is lightly loaded (470), the signal reflects in phase and increases the amplitude at the drive output. An input frequency of 30kHz is adequate for tests out to 4000 ft. of cable. LTC488/LTC489 APPLICATI DX S I FOR ATIO PROBE HERE Rt RECEIVER DRIVER Rt = 120 Rt = 47 Rt = 470 Figure 8. Termination Effects AC Cable Termination Cable termination resistors are necessary to prevent unwanted reflections, but they consume power. The typical differential output voltage of the driver is 2V when the cable is terminated with two 120 resistors, causing 33mA of DC current to flow in the cable when no data is being sent. This DC current is about 60 times greater than the supply current of the LTC488/LTC489. One way to eliminate the unwanted current is by AC coupling the termination resistors as shown in Figure 9. 120 C C = LINE LENGTH (FT) x 16.3pF RECEIVER 488/9 F09 Figure 9. AC Coupled Termination The coupling capacitor must allow high frequency energy to flow to the termination, but block DC and low frequencies. The dividing line between high and low frequency depends on the length of the cable. The coupling capacitor must pass frequencies above the point where the line represents an electrical one-tenth wavelength. The value of the coupling capacitor should therefore be set at 16.3pF per foot of cable length for 120 cables. With the coupling capacitors in place, power is consumed only on the signal Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U RX W U UO edges, and not when the driver output is idling at a 1 or 0 state. A 100nF capacitor is adequate for lines up to 4000 ft. in length. Be aware that the power savings start to decrease once the data rate surpasses 1/(120 x C). Receiver Open-Circuit Fail-Safe Some data encoding schemes require that the output of the receiver maintains a known state (usually a logic 1) when the data is finished transmitting and all drivers on the line are forced in three-state. The receiver of the LTC488/ LTC489 has a fail-safe feature which guarantees the output to be in a logic 1 state when the receiver inputs are left floating (open-circuit). However, when the cable is terminated with 120, the differential inputs to the receiver are shorted together, not left floating. Because the receiver has about 60mV of hysteresis, the receiver output will maintain the last data bit received. If the receiver output must be forced to a known state, the circuits of Figure 10 can be used. The termination resistors are used to generate a DC bias which forces the receiver output to a known state, in this 5V 488/9 F08 110 130 RECEIVER RX 130 110 5V RX 1.5k 120 RECEIVER RX 1.5k 5V 100k C 120 RECEIVER RX 488/9 F10 Figure 10. Forcing "0" When All Drivers Are Off 7 LTC488/LTC489 APPLICATI S I FOR ATIO case a logic 0. The first method consumes about 208mW and the second about 8mW. The lowest power solution is to use an AC termination with a pullup resistor. Simply swap the receiver inputs for data protocols ending in logic 1. Fault Protection All of LTC's RS485 products are protected against ESD transients up to 2kV using the human body model (100pF, 1.5k). However, some applications need more protection. Y DRIVER Z 120 TYPICAL APPLICATI RS232 IN 488/9 F11 RS232 Receiver 5.6k Figure 11. ESD Protection with TransZorbs(R) RECEIVER 1/4 LTC488 OR 1/4 LTC489 TransZorb is a registered trademark of General Instruments, GSI PACKAGE DESCRIPTIO 0.300 - 0.325 (7.620 - 8.255) 0.130 0.005 (3.302 0.127) Dimensions in inches (millimeters) unless otherwise noted. N Package 16-Lead Plastic DIP 0.045 - 0.065 (1.143 - 1.651) 16 15 14 0.009 - 0.015 (0.229 - 0.381) 0.015 (0.381) MIN 0.065 (1.651) TYP 0.260 0.010 (6.604 0.254) ( +0.025 0.325 -0.015 8.255 +0.635 -0.381 ) 0.125 (3.175) MIN 1 0.045 0.015 (1.143 0.381) 0.100 0.010 (2.540 0.254) 0.018 0.003 (0.457 0.076) 2 S Package 16-Lead Plastic SOL 0.291 - 0.299 (7.391 - 7.595) 0.005 (0.127) RAD MIN 0.010 - 0.029 x 45 (0.254 - 0.737) 0.398 - 0.413 (10.109 - 10.490) 16 15 14 13 12 11 10 9 0.093 - 0.104 (2.362 - 2.642) 0.037 - 0.045 (0.940 - 1.143) 0 - 8 TYP SEE NOTE 0.009 - 0.013 (0.229 - 0.330) SEE NOTE 0.016 - 0.050 (0.406 - 1.270) 0.050 (1.270) TYP 0.004 - 0.012 (0.102 - 0.305) 2 3 5 7 8 NOTE: PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS. 0.014 - 0.019 (0.356 - 0.482) TYP 1 8 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7487 (408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977 (c) LINEAR TECHNOLOGY CORPORATION 1992 UO U The best protection method is to connect a bidirectional TransZorb from each line side pin to ground (Figure 11). A TransZorb is a silicon transient voltage suppressor that has exceptional surge handling capabilities, fast response time, and low series resistance. They are available from General instruments, GSI, and come in a variety of breakdown voltages and prices. Be sure to pick a breakdown voltage higher than the common mode voltage required for your application (typically 12V). Also, don't forget to check how much the added parasitic capacitance will load down the bus. U W U UO S RX LTC488/9 TA02 0.770 (19.558) MAX 13 12 11 10 9 3 4 5 6 7 8 0.394 - 0.419 (10.007 - 10.643) 4 6 LT/GP 1192 10K REV 0 |
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