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| TSM112 3.3V 5V 12V HOUSEKEEPING IC s OVER VOLTAGE PROTECTION FOR 3.3V s s s s s s s s s s 5V AND 12V WITHOUT EXTERNAL COMPONENTS UNDER VOLTAGE PROTECTION FOR 3.3V 5V AND 12V WITHOUT EXTERNAL COMPONENTS OVER VOLTAGE PROTECTION FOR -12V OR -5V WITH EXTERNAL COMPONENTS EXTERNALLY ADJUSTABLE UNDER VOLTAGE BLANKING DURING POWER UP POWER GOOD INPUT/OUTPUT EXTERNALLY ADJUSTABLE PG DELAY FAULT OUTPUT REMOTE OUTPUT EXTERNALLY ADJUSTABLE REMOTE DELAY PRECISION VOLTAGE REFERENCE 2kV ESD PROTECTION N DIP14 (Plastic Package) D SO14 (Plastic Micropackage) DESCRIPTION The TSM112 integrated circuit incorporates all sensing circuitry to regulate and protect from over voltage and under voltage a multiple output power supply (3.3V, 5V and 12V). TSM112 incorporates all the necessary functions for Housekeeping features which allow safe operation in all conditions, and very high system integration. TSM112 integrates a precise voltage reference. APPLICATION PIN CONNECTIONS (top view) VS33 VS5 VS12 EP PI TUV 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC FAULT PG TPG TREM REM VREF s PC SMPS Triple Power Line Housekeeping IC (3.3V 5V 12V) ORDER CODE Part Number TSM112CN TSM112CD Temperature Range 0 to 85C 0 to 85C Package Marking N * * D TSM112C M112 GND N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT) January 2001 1/7 TSM112 PIN DESCRIPTION Name Vcc Gnd Vs12 Vs5 Vs33 Pin # 14 7 3 2 1 Type Power Supply Power Supply Analog Input Analog Input Analog Input Function Positive Power Supply Line Ground Line. 0V Reference For All Voltages Over and Under voltage Sense Input Dedicated to the 12V Line1) Over and Under voltage Sense Input Dedicated to the 5V Line1) Over and Under voltage Sense Input Dedicated to the 3.3V Line1) Tuv 6 Timing Capacitor Adjustable Under voltage Blanking Delay at Power Up (Setting Capacitor) Fault 13 Open Collector Fault Output. Fault is high when Over or Under Voltage has been Detected PI 5 Analog Input Power Good Input. Detection of the Power Conditions PG 12 Open Collector Power Good Output. PG output is High when the Power Conditions are OK Tpg 11 Timing Capacitor Adjustable Power Good Delay (Setting Capacitor) REM 9 Logic Input Input Remote Control of the Complete System by the Motherboard (Controller). Remote is active high. Switch OFF/ON of the Power Supply. Reset of the Complete System after a FAULT Activation. Trem 10 Timing Capacitor Adjustable Remote Delay (Setting Capacitor). Vref 8 Voltage Reference 2.5V Reference for all Voltages EP 4 Analog Input Extra Protection Circuit. Can be used for -12V or -5V Over Voltage Protection. 1. Over and Under Voltage Inputs can go higher than Vcc within the allowed Max Rating range ABSOLUTE MAXIMUM RATINGS Symbol Vcc Iout Io VFault Top Pd Tstg ESD Tuv EP PI PG Tpg REM Trem DC Supply Voltage DC Supply Voltage 1) Output Current Power Good Output current for the Voltage reference Fault Ouput Operating Free Air Temperature Range Power Dissipation Storage Temperature Electrostatic Discharge Adjustable Under voltage Blanking At Power UP Extra Protection Power Good Input Power Good Output Adjustable Power Good Delay Remote Control Adjustable Remote Delay Value 25 30 20 5 -55 to 125 0.7 -55 to 150 2 5 5 5 5 5 5 5 Unit V mA mA V C W C kV V V V V V V V 1. All voltage values, except differential voltage are with respect to network ground terminal. OPERATING CONDITIONS Symbol Vcc Toper Parameter DC Supply Conditions Operating Free Air Temperature Range Value 4.5 to 24 0 to 85 Unit V C 2/7 TSM112 ELECTRICAL CHARACTERISTICS Tamb = 25C and Vcc = 17V (unless otherwise Symbol Parameter specified) Test Condition Min Typ Max Unit Total Current Consumption Icc Vov33 Vov5 Vov12 Vuv33 Vuv5 Vuv12 Vep Tfault Tuv Thuv Total Supply Current Over Voltage and Under Voltage Protection Over Voltage Sense 3.3V Over Voltage Sense 5V Over Voltage Sense12V Input can go higher than Vcc Input can go higher than Vcc Input can go higher than Vcc 3.8 5.8 13.4 2.1 3.7 9.2 4 6.1 14.2 2.3 4 10 1.28 100 300 1.28 Power Good (PG) Vpgth Power Good Voltage Threshold Vpghyst Power Good Voltage Threshold Hysteresis Vpgol Low Output Open Collector Saturation Voltage Ipgoh High Output Open Collector Leakage Current Tpgr Power Good Output Rise Time Tpgf Power Good Output Fall Time Tpg Power Good Adjustable Delay PIth Power Input Detection Threshold Vfaultol Ifaultoh Vremth Vremih Iremil Trem1 Trem2 Fault Output Saturation Voltage Level Fault Output Leakage Current Level Remote ON/OFF Input Voltage Threshold High Input Remote Voltage Low Input Remote Saturation Current Remote Adjustable Delay ON to OFF Remote Adjustable Delay OFF to ON 1.28 70 Collector Current = 15mA PG Output = 5V Load Capacitor = 100pF Load Capacitor = 100pF Load Capacitor Cpg=2.2F Fault IFault = 1mA Vfault = 5V 0.7 3.3 Load Capacitor Crem=0.1F Load Capacitor Crem=0.1F Voltage Reference Vref Regline Regline Internal Voltage Reference Line regulation Line regulation Io = 0mA Io = 0mA 4.5V 100 500 100 500 Remote Control (REM) Regload Load regulation 1) 1. Do not short circuit the Vref Pin 3/7 TSM112 Figure 1 : Figure 1: Application Schematic ~ PRIMARY RECT. MAIN CONV. 12V 5V 3.3V 12V 5V 3.3V PWM + OPTO + Vref AUX. CONV. Vcc 5Vstby 5Vstby PWM + OPTO + Vref TSM112 Over & Undervoltage Protection FAULT Reference Logic Sequencer PG REM Figure 2 : Internal Schematic Vcc TO POWER SUPPLY OUTPUT 12V 5V 3.3V Vs12 Vs5 Vs33 OVP UVP TSM112 LOGIC SECONDARY HOUSEKEEPING PI PG FAULT REM Trem Tpg Ep 12V FROM MAIN CONV. Gnd 5V 3.3V Vref Vref UV BLANK Tuv 4/7 to MOTHERBOARD TSM112 Figure 3 : Figure 3 : Detailed Internal Schematic Vcc IN 12V VS12 OUT 12V Vov12 OVP Vref OVP Tfault S R Vuv12 IN 5V VS5 OUT 5V Vov5 OVP Vref UVP 0.8V Vuv5 IN 3.3V VS33 Tpg OUT 3.3V Vov33 OVP Vref UVP 1.25V Vuv33 EP OVP 1.25V VREF Vref PI Tpg Cpg Pg Power Up UV blanking Tuv UVP UVP Vcc Trem Trem Crem Tuv Cuv TO MOTHERBOARD Q 1k FAULT TSM112 3.47V Rem Gnd 5/7 TSM112 PRINCIPLE OF OPERATION AND APPLICATION HINTS TSM112: Housekeeping IC. TSM112 is a one chip solution for all PC SMPS: it integrates on one chip the Housekeeping Circuitry (Over Voltage and Under Voltage protections, with adequate sequencing). Triple Power Line Protection. The TSM112 Housekeeping Circuit is dedicated to 3.3V, 5V and 12V power lines protection. It integrates a Precision Voltage Reference, a Triple Over Voltage Protection Circuit and a Triple Under Voltage Protection Circuit as well as all the necessary logic and transient timing management circuits for optimal and secure communication with the motherboard, during start up, switch off and stabilized conditions. Over Voltage Protection The Over Voltage Protection Circuit is made of three comparators with internal voltage thresholds (Vov33, Vov5, Vov12) which do not require any external components for proper operation. The outputs of these three comparators are ORed. Under Voltage Protection The Under Voltage Protection Circuit is made of three comparators with internal voltage thresholds (Vuv33, Vuv5, Vuv12) which do not require any external components for proper operation. The outputs of these three comparators are ORed, and blanked by an internal delay circuitry (Power Up Blanking - Tuv) which can be adjusted with an external capacitor (Cuv). This allows that during power up, the under voltage protection circuit is inhibited. Latch OFF The Over Voltage and Under Voltage Circuits outputs are again ORed before activating a latch. When activated, this latch commands the full switch OFF of the three main power lines (3.3V, 5V, 12V) by an external link between the housekeeping and the primary PWM circuits via the main optocoupler or any other device . Note that the Under Voltage Circuit, after Power Up UV blanking, bears no other delay to the latch setting 6/7 input whereas the Over Voltage circuit bears an additional Tfault delay time. This allows an efficient protection against Output Short Circuit conditions. Power Good The Over Voltage and Under Voltage Circuits are Ored to switch the Power Good output active (PG) to warn the motherboard that the voltage of at least one of the three power lines is out of range. The PG activation bears an internal Tpg delay circuitry which can be adjusted with an external capacitor (Cpg). Remote Control Thanks to this information link to the motherboard, a resetting signal to the latch is achievable with the Remote pin (REM). When the Remote pin is active, the external Fault link between Housekeeping circuit and the PWM generator is active (high = PWM OFF) and the PG pin is active (high). Note that to reset effectively the latch, a minimum width Remote pulse should be applied thanks to an internal delay circuitry (Trem) which can be adjusted with an external capacitor (Crem). TSM112 PACKAGE MECHANICAL DATA 14 PINS - PLASTIC PACKAGE Millimeters Dim. Min. a1 B b b1 D E e e3 F i L Z 0.51 1.39 0.5 0.25 20 8.5 2.54 15.24 7.1 5.1 3.3 1.27 2.54 0.050 Typ. Max. 1.65 Min. 0.020 0.055 Inches Typ. Max. 0.065 0.020 0.010 0.787 0.335 0.100 0.600 0.280 0.201 0.130 0.100 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom (c) http://www.st.com 7/7 |
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