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| AN732 Vishay Siliconix Designing A High-Voltage Non-Isolated Buck-Boost Converter with the Si9121DY Nitin Kalje INTRODUCTION The Si9121DY is a non-isolated buck-boost converter IC, operating from a wide input voltage range of -10 to -60 V with minimal external components. This polarity inverter converts -48 V to +5 V or +3.3 V, making it suitable for applications including digital phones and ISDN power supplies. A non-isolated buck-boost design with the Si9121 eliminates the need for an expensive transformer, while its integrated low on-resistance MOSFET driver, floating feedback error amplifier, fixed-frequency oscillator, output voltage sensing resistor divider, and depletion mode MOSFET for start up/VCC regulation reduce the external component count to less than 10. Current-mode control technology achieves good line transient response, making the Si9121DY suitable for the high source impedance environment. Other features include the under-voltage lock out, programmable soft start, pulse by pulse current limit, hiccup mode with negligible power delivery and dissipation during continuous short circuit conditions, automatic recovery from hiccup after fault removal, and over temperature shutdown. The Si9121 is available in a narrow body SO-8 package and allows power dissipation of up to 1.25 W. while the output capacitor supports the load current. Since the current in an inductor cannot change instantaneously, the voltage across it reverses to maintain a constant current when the main switch turns off. The reverse voltage is clamped to (VO + VD), and the inductor is discharged through the diode, output capacitor, and load. The energy stored and discharged to the load is proportional to the square of the peak inductor current. At full load, the circuit can be designed to operate in a continuous conduction mode to reduce the peak and RMS currents in the MOSFET switch and an inductor. Operation is in discontinuous mode at lower loads. The constant volt-second product determines the operating duty cycle in continuous conduction mode while the amount of energy needed to be stored in the inductor determines the duty cycle in discontinuous conduction mode. The peak and average inductor currents for continuous mode operation are: I L(AVG) + I OUT 1-d DIL 2 (1) DEVICE OPERATION The Si9121DY uses a current-mode flyback topology to convert the -48-V input to a +5-V or +3.3-V output. As shown in Figure 1, the inductor stores energy during switch-on time, I L(PK) + IOUT 1-d ) (2) COM IL L C ID COM IL IL IL(PK) IL(AVG) t Si9121 +VOUT SW IS t ISW ID -VIN IOUT t FIGURE 1. Buck-Boost Converter Document Number: 71156 04-May-00 www.vishay.com S FaxBack 408-970-5600 1 AN732 Vishay Siliconix 4 VOUT 5 R1* - GM + R2* + - VREF 1.25 V + - - + H 10 mA VCC Soft Start 2 mA VNEG COMP 3.5 V L Hiccup Discharge Mode GND 6 1.5 V OSC 7 VCC 0.6 V - + Low Side Error Amp - + RQ S 3 BYPASS Bias/ Reference Circuit OCL + 0.67 V - 50% Max. PWM Duty Cycle OTP 8 LX -VIN 1 - + CS 0.6-V Hysteresis *R1 and R2 are internal voltage setting resistors used to set output voltage to fixed 3.3 V or 5 V. - + 2 VNEG 8.5 V + - FIGURE 2. Detailed Block Diagram DESIGN AND COMPONENT SELECTION GUIDELINES The following sections provide an outline of considerations for designing a buck-boost converter using the Si9121DY. The component selection is based on the 100-kHz operating frequency to achieve maximum efficiency. An inductor, input/output filter, a tantalum or low-cost aluminum capacitor, a Schottky diode, and a few resistors/capacitors are required for a complete solution. operation at a nominal line. Use the following equation to calculate the inductance: (V OUT ) V D) (1 * d) 2 2 I OMIN FSW LMIN + (3) d+ (VOUT ) V F) (V IN-V SW) ) (V OUT ) VF) (4) Inductor Selection of the inductor is based on the inductance value, the maximum temperature rise of the coil at maximum load current, and peak saturating current. The temperature rise is related to the power dissipation and/or efficiency. The higher inductance value drives the converter in continuous mode operation, reducing the RMS currents but at the same time increasing the size of the inductor for the same current handling capability. To find a balance, select a load current (IO(min)) that is slightly lower than the operating load current at which the converter begins continuous current mode www.vishay.com S FaxBack 408-970-5600 Where, LMIN = min Inductance for continuous conduction mode operation at VIN and IOUT (H) IO(min) = min load current required for in continuous conduction mode (A) VOUT = Output voltage (V) VIN = Nominal Input voltage (V) VF = Diode Forward drop at IO (V) Document Number: 71156 04-May-00 2 AN732 Vishay Siliconix VSW = Voltage drop across MOSFET + current sense resistor at IO (V) FSW = Switching frequency (Hz) d= Duty Cycle During start-up, the inductor on-current can reach the threshold current limit, IPK_LIMIT = VCS/RSENSE. For efficient energy storage and transfer, the inductor must be operated below its saturating flux density. Make sure that the peak saturating inductor current ISAT is more than the worst-case threshold current limit. Use the follow equation to calculate: I SAT u 0.77 R SENSE (5) Output Capacitor In the buck-boost converter, both the input and output capacitor currents are pulsating or discontinuous. Obviously, to achieve acceptable ripple performance, a much higher capacitance and lower equivalent series resistance (ESR) are needed at both input and output to support these pulsating currents. In continuous current mode, the amount of capacitance needed is a function of the output load and the switching frequency, for a given pk-pk ripple caused by loss of charges (DVOC). Use following equation to choose the capacitor value COUT for continuous conduction mode operation. I OMAX V )V F OUT (V INMIN*V ))(V )V F) SW OUT compensation, the soft-start action sequence needs to be considered as well (Figure 3). At start-up, once the VCC reaches above UVLO threshold, the COMP steps up to 1.5 V. The R2, C7, C8 combination at the COMP start charging with 10-mA of current. During this period, the duty cycle slowly opens up with the voltage rise at error output (COMP), and output starts rising during time t1 (Figure 3). During this period, the amount of energy delivered to charge the output capacitor and support the load current depends on the inductance and peak current passing through it. This continues until the output VOUT reaches approximately 2.5 V, at which point the soft-start charging current increases to 25 mA. The soft start charging current passing through resistor R2 shoots up the error amplifier output voltage to VC-pk, where the OCL comparator limits the maximum current in the inductor during on time. Care must be taken to keep VC-pk below 3.5 V. If VCOMP exceeds an upper threshold (approximately 3.5 V), the timer is started. This will discharge the compensation network capacitor and the converter will unintentionally enter into hiccup mode. Use the following equation to determine the resistor value R2. R2 v VC_PK-1.5 25 mA The output capacitor and the load resistor RL introduce the power stage pole (fp1). This pole causes gain rollover at a rate of 20db/decade. f P1 + 1 2p C OUT R L (8) C OUT w (6) F SW DV OC The input impedance of the capacitor (ESR at a switching frequency) causes the output voltage to drop when the output load current is supplied by the capacitor. In continuous current mode, the ESR needed to limit the pk-pk ripple to DVOESR can be calculated using equation 7. ESR v or ESR v DV OESR I O 1-d MAX DI L 2 The low frequency zero (fz1) should be placed before the power stage low-frequency pole (fp1) introduced by output capacitor and the load resistor RL. Placing the fz1 as early as possible on the frequency scale maintains the low frequency gain. f Z1 + 1 2 p R7 C7 C8 C7)C8 DV OESR I L(PEAK) (9) ) (7) The capacitor ESR introduces zero at the frequency where the impedance offered by the ESR is equal to the capacitive impedance. At this frequency, the gain tends to go flat. f Z*ESR + 1 2p C OUT (10) Where, V dMAX DI L + INMIN L FSW ESR The available output ripple is sum of the two ripple components DVOC and DVOESR. Total DVO(pk-pk) = DVOC + DVOESR The high frequency error amplifier pole (fp2) is needed to make the compensation independent of the output capacitor's ESR and to eliminate high-frequency noise spikes. f p2 v f Z*ESR and, f p2 + 1 2 p R7C8 (11) COMPENSATION/SOFT START NETWORK To reduce the number of external components, the Si9121DY uses the same external components for multiple functions. While selecting the R2, C7, and C8 network for lead lag Document Number: 71156 04-May-00 www.vishay.com S FaxBack 408-970-5600 3 AN732 Vishay Siliconix COMP VCOMP R7 PWM C7 Error Amp To Driver C8 VC-PK VC1 1.5 0.67 V OCL CS t t1 t2 FIGURE 3. Start-Up Sequence VCOMP Refer to Figures 4 and 5 to observe the turn on with the R2, C7, C8 values from the typical application circuit of Figure 6. Diode The output rectifier diode should be chosen carefully to maintain high-efficiency operation. The forward break down voltage (VF) is a more significant factor for low output voltages, especially the 3.3-VOUT. Up to 15% efficiency can be lost in the high VF of the rectifier if this is not chosen carefully. The output diode is forward biased when the MOSFET switch turns off and provides a path for the inductor current. This means the peak current through the diode is quite high, even if the average current is same as the load current IO. A lower forward drop at high peak currents, lower reverse recovery current/times, and a high reverse breakdown voltage VRRM are key criteria for a good rectifier. The higher reverse recovery current of the rectifier can increase the power dissipation in the MOSFET significantly since the MOSFET is hard switched from high input voltages. A Schottky rectifier is recommended because of its low forward drop VF and zero reverse recovery resulting from the absence of minority carrier conduction. Ch 1 = VOUT (2 V/div Ch 4 = VIN (50 V/div) FIGURE 4. Turn On--Si9121DB-5 Select a Schottky diode with peak reverse voltage VRRM w VIN(MAX) + VO(MAX) and average forward current of IF(AVG) w IOUT. Current Sense Resistor RSENSE The Si9121DY has two integrated comparators. The PWM comparator, which is relatively slow, performs the current mode control function by comparing the output of the error amplifier with the current in the inductor. The over current limit (OCL) comparator is a faster channel to the output driver and has a 100-ns typical propagation time. Document Number: 71156 04-May-00 Ch 1 = VOUT (1 V/div Ch 4 = VIN (50 V/div) FIGURE 5. Turn On--Si9121DB-3 www.vishay.com S FaxBack 408-970-5600 4 AN732 Vishay Siliconix GND GND L1 68 mH + 6 GND 3 7 2 + 33 mF 80 V C4 0.1 mF C5* 0.1 mF C1 1 mF C6 BYPASS VCC VNEG LX VOUT COMP CS 5 4 1 8 220 mF C2 0.1 mF* C3 10MQ100N VOUT +5 V/400 mA or +3.3 V/400 mA Si9121DY-5 or Si9121DY-3 R1 0.25 W 1/ W 2 180 pF C7 R2 75 kW (27 kW for Si9121DY-3) + 0.1 mF C8 VNEG -10 to -60 V FIGURE 6. Typical Applications Circuit *Optional With the current sense resistor in the inductor current path at turn on, a voltage signal which is proportional to the inductor current is available to control the switch-on period. This signal is used by both the PWM as well as the OCL comparator. The selection of an RSENSE resistor value is based on the allowable peak current in the inductor before saturation and the energy delivery capacity of the converter to charge the output capacitor, while supporting the load current during converter switch-on. A 0.25-W resistor value is recommended for avoiding a hiccup condition during turn-on when charging a 220-uF output filter capacitor and supporting the 400-mA-output load. Higher resistor values can be used for lower output capacitance and/or a lower output load. The low inductance WSL series resistors from Vishay are recommended to reduce the turn-on current spike at the CS pin and prevent premature cycle termination. P SW + I 2 RMS_SW R DSON ) (V IN I L(AVG)) (tr ) tf) FSW 2 (12) P quiscent + V in IGND ) (V IN ) V OUT) IOUT_IC (13) Where, IRMS_SW = RMS current in MOSFET (A) rDS(on) = On resistance of MOSFET at operating junction temperature. (W) IL(avg) = Average inductor current (A) (see Equation 1) tr, tf = Rise and fall time of drain (sec) IGND, IOUT_IC = GND supply current and VOUT supply current (A) -- (see Si9121DY data sheet) And the junction temperature POWER LOSS CONSIDERATIONS The Si9121DY is provided in an 8-pin SOIC package for low junction-to-ambient thermal resistance and higher power dissipation (up to 1.25 W at room temperature). Sources of power losses in the Si9121DY include the MOSFET on-resistance/cross conduction switching losses (PSW), quiescent current losses in operating the oscillator and control/drive circuit, and the voltage drop across the VCC regulator (PQUISCENT). Pt = PSW + PQUISCENT Power losses can be estimated by using the following equation: Document Number: 71156 04-May-00 TJ (_C) = 100 Pt + TA To achieve good operating lifetime and reliability, the maximum junction temperature should be kept below 125_C. Another major power loss occurs in the rectifier diode. The power loss in the diode is equal to the product of the output current (IO) and the forward voltage drop at IL(PK)/2. PDIODE = VF x IO Where, VF = Forward voltage drop at IL(pk)/2 Inductor power loss PL = I2LRMS x RL www.vishay.com S FaxBack 408-970-5600 5 AN732 Vishay Siliconix Where, RL is the dc resistance. The ac resistance losses of bare copper wire thinner than 28 AWG can be neglected since the ac ripple current in the inductor is not significant for continuous conduction mode. Power loss in sense resistor PSENSE = I2RMS_SW x RSENSE PM = Power loss in capacitor ESR and PCB traces Total converter power loss PTOTAL = Pt + PDIODE + PL + PM circuitry provides initial power to the IC by charging an external bypass capacitance connected to the VCC pin. The constant current is disabled when VCC exceeds 9.5 V(max). Adding another winding on the inductor can generate an external VCC. See Figure 7 for an application schematic. When the MOSFET switch turns on, the transformer phasing induces the voltage across the VCC winding NS such that the diode D2 is reverse biased. When the mosfet switch turns off, the voltage across the inductor's main windings Np and NSchanges the polarity, making the diode forward-biased. The voltage across NS is proportional to VOUT + VD2. The externally generated VCC must be in the range of 9.5 V to 12 V. Use equations 14, 15 and 16 to calculate the required number of turns for the VCC winding for a given VOUT. A 12-V zener placed between VCC and VNEG is recommended to keep the VCC below its absolute maximum rating. NS + N P (V CC ) V D2) (V OUT ) V DI) (14) OTHER APPLICATIONS A high-efficiency buck-boost converter needs to account for every milliwatt power dissipation. There are many ways to achieve high efficiency at lower power levels, such as reducing the switching frequency, but at the cost of a larger form factor. The fixed 100-kHz switching frequency used in the Si9121DY provides an optimal balance between size and efficiency. Another way of reducing power losses is to apply the VCC voltage externally, instead of deriving it from VIN through internal VCC regulator. When power is first applied during start-up, the Si9121DY will draw a constant current. The magnitude of this current is determined by a high-voltage depletion MOSFET device which is connected between VGND and VCC. This start-up or N S + 1.9 N P N S + 2.87 N P (for Si9121-5) (for Si9121-3) (15) (16) 1 GND 68 mH Np C2* 0.1 mF T1 1 GND C1 33 mF 80 V + Ns C7 220 mF 10 V + C8* 0.1 mF D2 BAS21 1 CS 2 3 4 C5 0.1 mF VNEG BYPASS COMP COIL VCC GND VOUT 7 6 5 8 D1 10MQ100N +VOUT 1 +5 V @ 400 mA or 3.3 V @ 400 mA R1 0.25 1/ W 2 C3 0.1 mF C4 180 pF Si9121DY-5 C6 1 mF R2 75 kW (27 kW for Si9121DY-3) -VIN 1 -10 to -60 V *Optional FIGURE 7. Si9121 Application with External Vcc Through Winding www.vishay.com S FaxBack 408-970-5600 6 Document Number: 71156 04-May-00 AN732 Vishay Siliconix Rectifier diode D2 should be a fast recovery switching signal diode with a reverse blocking voltage rating greater than or equal to VRRM, as calculated from equations 17 and 18. V RRM u 1.9 V INMAX ) V CC V RRM u 2.87 VINMAX ) V CC (for Si9121-5) (for Si9121-3) (17) (18) Efficiency (%) 60 50 40 30 20 10 90 80 70 Efficiency (%) 60 50 40 30 20 10 0 10 48 VIN 10 VIN 0 10 100 IOUT (mA) 60 VIN 1000 90 80 70 60 VIN 48 VIN 10 VIN The BAS21 from Lite On is recommended (Figure 7). Refer to Figures 8 and 9 to observe the efficiency improvement after using an additional winding for the external VCC. FIGURE 9. Efficiency--Si9121-5 (With VCC Winding) 100 IOUT (mA) 1000 FIGURE 8. Efficiency--Si9121-5 (Without VCC Winding) Document Number: 71156 04-May-00 www.vishay.com S FaxBack 408-970-5600 7 |
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