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PD - 94351
IRFP17N50LS
SMPS MOSFET
Applications
l l l l l l l l l l
HEXFET(R) Power MOSFET
Switch Mode Power Supply (SMPS) Uninterruptible Power Supply High Speed Power Switching ZVS and High Frequency Circuit PWM Inverters
VDSS
500V
RDS(on) typ.
0.28
Trr
170ns
ID
16A
Benefits
Low Gate Charge Qg results in Simple Drive Requirement Improved Gate, Avalanche and Dynamic dv/dt Ruggedness Fully Characterized Capacitance and Avalanche Voltage and Current Low Trr and Soft Diode Recovery High Performance Optimised Anti-parallel Diode
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case ) Mounting Torque, 6-32 or M3 screw
SMD-247
Absolute Maximum Ratings
Max.
16 11 64 220 1.8 30 13 -55 to + 150 300 10
Units
A W W/C V V/ns
C lbft.in(N.m)
Diode Characteristics
Symbol IS
ISM
VSD trr Qrr IRRM ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time
Min. Typ. Max. Units Conditions D 16 MOSFET symbol --- --- showing the A G 64 integral reverse --- --- S p-n junction diode. --- --- 1.5 V TJ = 25C, IS = 16A, VGS = 0V --- 170 250 TJ = 25C IF = 16A ns --- 220 330 TJ = 125C di/dt = 100A/s --- 470 710 TJ = 25C nC --- 810 1210 TJ = 125C --- 7.3 11 A Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Typical SMPS Topologies
l
Bridge Converters
l
All Zero Voltage Switching
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1
11/28/01
IRFP17N50LS
Static @ TJ = 25C (unless otherwise specified)
Symbol V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) IDSS IGSS
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units Conditions 500 --- --- V VGS = 0V, ID = 250A --- 0.6 --- V/C Reference to 25C, ID = 1mA --- 0.28 0.32 VGS = 10V, ID = 9.9A 3.0 --- 5.0 V VDS = V GS, ID = 250A --- --- 50 A VDS = 500V, VGS = 0V --- --- 2.0 mA VDS = 400V, VGS = 0V, TJ = 125C --- --- 100 VGS = 30V nA --- --- -100 VGS = -30V Min. 11 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 21 51 50 28 2760 325 37 3690 84 159 Max. Units Conditions --- S VDS = 50V, ID = 9.9A 130 ID = 16A 33 nC VDS = 400V 59 VGS = 10V --- VDD = 250V --- ID = 16A ns --- RG = 7.5 --- VGS = 10V --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz --- VGS = 0V, V DS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 400V, = 1.0MHz --- VGS = 0V, VDS = 0V to 400V
Dynamic @ TJ = 25C (unless otherwise specified)
Symbol gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff.
Avalanche Characteristics
Symbol
EAS IAR EAR
Parameter
Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
390 16 22
Units
mJ A mJ
Thermal Resistance
Symbol
RJC RCS RJA Notes:
Parameter
Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.24 ---
Max.
0.56 --- 40
Units
C/W
Repetitive rating; pulse width limited by
max. junction temperature.
Pulse width 300s; duty cycle 2%.
Starting TJ = 25C, L = 3.0mH, RG = 25,
IAS = 16A.
ISD 16A, di/dt 347A/s, VDD V(BR)DSS,
TJ 150C
2
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IRFP17N50LS
100
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
100
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
ID , Drain-to-Source Current (A)
10
ID , Drain-to-Source Current (A)
10
1
5.0V
5.0V
0.1
1
20s PULSE WIDTH Tj = 25C
0.01 0.1 1 10 100 0.1 0.1 1
20s PULSE WIDTH Tj = 150C
10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
3.0
RDS(on) , Drain-to-Source On Resistance (Normalized)
I D , Drain-to-Source Current (A)
TJ = 150 C
ID = 16A
2.5
10
2.0
TJ = 25 C
1.5
1
1.0
0.5
0.1 4.0
V DS = 50V 20s PULSE WIDTH 8.0 9.0 5.0 6.0 7.0 10.0
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFP17N50LS
100000 20 VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds
ID = 16A
VGS , Gate-to-Source Voltage (V)
16
10000
V DS= 400V V DS= 250V V DS= 100V
C, Capacitance(pF)
Ciss
1000
12
8
Coss
100
4
Crss
10 1 10 100 1000 0 0 30 60 90 120 150
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
1000
ISD , Reverse Drain Current (A)
TJ = 150 C
10
OPERATION IN THIS AREA LIMITED BY R
DS(on)
ID , Drain Current (A)
100
10us
10
TJ = 25 C
1
100us 1ms
1
10ms
0.1 0.2
V GS = 0 V
0.6 0.9 1.3 1.6
0.1
TC = 25 C TJ = 150 C Single Pulse
10 100 1000 10000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFP17N50LS
20
VDS VGS
RD
16
D.U.T.
+
ID , Drain Current (A)
RG
- VDD
12
10V
Pulse Width 1 s Duty Factor 0.1 %
8
Fig 10a. Switching Time Test Circuit
4
VDS 90%
0 25 50 75 100 125 150
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE)
0.01
0.001 0.00001
Notes: 1. Duty factor D = t 1 / t 2 2. Peak T = P DM x ZthJC + TC J 0.1 0.0001 0.001 0.01
PDM t1 t2 1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFP17N50LS
EAS , Single Pulse Avalanche Energy (mJ)
800
640
TOP BOTTOM ID 7A 10A 16A
VDS L
1 5V
480
D R IV E R
320
RG
20V
D .U .T
IA S
+ - VD D
A
160
tp
0 .0 1
Fig 12c. Unclamped Inductive Test Circuit
0 25 50 75 100 125 150
Starting TJ , Junction Temperature ( C)
Fig 12a. Maximum Avalanche Energy Vs. Drain Current
tp
V (B R )D SS
IAS
Fig 12d. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K 12V .2F .3F
QG
VGS
D.U.T. + V - DS
QGS VG
QGD
VGS
3mA
IG
ID
Current Sampling Resistors
Charge
Fig 13a. Gate Charge Test Circuit
Fig 13b. Basic Gate Charge Waveform
6
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IRFP17N50LS
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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IRFP17N50LS
SMD-247 Package Outline
A B 15.90 [.625] 15.30 [.603] 3.65 [.143] O 3.55 [.140] 0.25 [.010] 5.70 [.224] 5.30 [.209] DB 5.30 [.208] 4.70 [.186] 2.50 [.099] 1.50 [.060] 0.25 [.010] 13.70 [.539] 13.50 [.532] DB
5.50 [.217]
4 16.20 [.637] 16.00 [.630] 4
0.95 [.037] 0.35 [.014]
20.30 [.799] 19.70 [.776]
2.75 [.108] 2X R 2.25 [.089]
D
C 1 5.65 [.222] 4.65 [.183] 2 3
3.0 [.118] MAX.
0.20 [.225] D 5.45 [.215] 2X 0.25 [.010] 1.40 [.055] 1.00 [.040] DCA 2X 2.65 [.104] 2.15 [.085] LEAD AS SIGNMENT S NOT E S: 1. 2. 3. 4. DIMENSIONING & T OLERANCING PER ASME Y14.5M-1994. CONT ROLLING DIMENSION: MILLIMET ER. DIMENS IONS ARE SHOWN IN MILLIMET E RS [INCHE S]. T O-247 S MD IS A MODIF IE D T O-247AC. MOSF ET 1 - GAT E 2 - DRAIN 3 - SOURCE 4 - DRAIN IGBT 1 - GAT E 2 - COLLECT OR 3 - EMIT T ER 4 - COLLECT OR
2X
0.80 [.031] 0.40 [.016]
SMD-247 Part Marking Information
EXAMPLE: T HIS IS AN IRF P450S WITH AS S EMBLY LOT CODE 3A1Q PART NUMBER INTERNAT IONAL RECT IF IER LOGO AS S EMBLY LOT CODE
IRFP450S
3A1Q 9906
DATE CODE (YYWW) YY = YEAR WW = WEEK
Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.11/01
8
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