 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| M Features * Low Quiescent Current: 600 nA/Amplifier (typ) * Rail-to-Rail Input: -0.3 V to VDD+0.3 V (max) * Rail-to-Rail Output: VSS+10 mV to V DD-10 mV (max) * Gain Bandwidth Product: 14 kHz (typ) * Wide Supply Voltage Range: 1.4 V to 5.5 V (max) * Unity Gain Stable * Available in Single, Dual and Quad * Chip Select (CS) with MCP6043 * 5-lead SOT-23 package (MCP6041 only) MCP6041/2/3/4 Description The MCP6041/2/3/4 family of operational amplifiers from Microchip Technology, Inc. operate with a single supply voltage as low as 1.4 V, while drawing less than 1 A (max) of quiescent current per amplifier. These devices are also designed to support rail-to-rail input and output operation. This combination of features supports battery-powered and portable applications. The MCP6041/2/3/4 amplifiers have a typical gain bandwidth product of 14 kHz (typ) and are unity gain stable. These specs make these operational amplifiers appropriate for low frequency applications, such as battery current monitoring and sensor conditioning. The MCP6041/2/3/4 family operational amplifiers are offered in single (MCP6041), single with a Chip Select (CS) feature (MCP6043), dual (MCP6042) and quad (MCP6044) configurations. The MCP6041 device is available in the 5-lead SOT-23 package. 600 nA, Rail-to-Rail Input/Output Op Amps Applications * * * * Toll Booth Tags Wearable Products Temperature Measurement Battery Powered Available Tools * Spice macro models (at www.microchip.com) * FilterLab(R) Software (at www.microchip.com) Typical Application VDD VDD IDD 100 k Package Types MCP6041 PDIP, SOIC, MSOP NC 1 -IN 2 +IN 3 VSS 4 + 8 NC 7 VDD 6 OUT 5 NC MCP6041 SOT-23-5 OUT 1 VSS 2 +IN 3 5 VDD MCP6042 PDIP, SOIC, MSOP OUTA 1 -INA 2 +INA 3 VSS 4 - A+ +B 8 VDD 7 OUTB 6 -INB 5 +INB 10 +2.5 V to 5.5 V MCP604X VSS 1 M High Side Battery Current Sensor MCP6044 PDIP, SOIC, TSSOP 14 OUTD AD -INA1 2 - + + - 13 -IND +INA1 3 12 +IND VDD 4 4 -IN +INB 5 -INB 6 - B+ +COUTB1 7 11 VSS 10 +INC 9 -INC 8 OUTC OUTA 1 MCP6043 PDIP, SOIC, MSOP NC 1 -IN 2 +IN 3 VSS 4 + 8 CS 7 VDD 6 OUT 5 NC 2002 Microchip Technology Inc. + DS21669B-page 1 MCP6041/2/3/4 1.0 1.1 ELECTRICAL CHARACTERISTICS Maximum Ratings* PIN FUNCTION TABLE Name +IN/+INA/+INB/+INC/+IND -IN/-INA/-INB/-INC/-IND VDD VSS CS NC Function Non-inverting Inputs Inverting Inputs Positive Power Supply Negative Power Supply Chip Select No internal connection to IC VDD - VSS ......................................................................................7.0 V All inputs and outputs................................... VSS -0.3 V to VDD +0.3 V Difference Input voltage ..................................................... |VDD - VSS| Output Short Circuit Current ...............................................continuous Current at Input Pins .................................................................. 2 mA Current at Output and Supply Pins ..........................................30 mA Storage temperature ...................................................-65C to +150C Ambient temp. with power applied ..............................-55C to +125C ESD protection on all pins (HBM)..................................................... 4 kV *Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. OUT/OUTA/OUTB/OUTC/OUTD Outputs MCP6041/2/3/4 DC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, all limits are specified for VDD = +1.4 V to +5.5 V, VSS = GND, TA = 25 C, VCM = VDD/2, R L = 1 M to VDD /2, and VOUT ~ VDD/2 Parameters Sym VOS VOS/T PSRR IB IB IOS ZCM ZDIFF VCMR CMRR Min -3.0 -- 70 -- -- -- -- -- VSS-0.3 62 60 60 Typ -- 1.5 85 1.0 -- 1.0 1013||6 1013||6 -- 80 75 80 Max +3.0 -- -- -- 100 -- -- -- VDD+0.3 -- -- -- Units mV V/C dB pA pA pA ||pF ||pF V dB dB dB VDD = 5 V, VCM = -0.3 V to 5.3 V VDD = 5 V, VCM = 2.5 V to 5.3 V VDD = 5 V, VCM = -0.3 V to 2.5 V RL = 50 k to VDD /2, 100 mV < VOUT < (VDD - 100 mV) RL = 50 k to VDD /2 RL = 50 k to VDD /2, AOL 95 dB VOUT = 2.5 V, VDD = 5 V TA= -40C to+85 TA= -40C to+85C Conditions VCM = VSS Input Offset: Input Offset Voltage Drift with Temperature Power Supply Rejection Input Bias Current and Impedance: Input Bias Current Input Bias Current Over Temperature Input Offset Current Common Mode Input Impedance Differential Input Impedance Common Mode: Common-Mode Input Range Common-Mode Rejection Ratio Open Loop Gain: DC Open Loop Gain (large signal) AOL 95 115 -- dB Output: Maximum Output Voltage Swing Linear Region Output Voltage Swing Output Short Circuit Current VOL, VOH VSS + 10 VOVR IO V DD IQ VSS + 100 -- 1.4 0.3 -- -- 21 -- 0.6 VDD - 10 VDD - 100 -- 5.5 1.0 mV mV mA V A IO = 0 Power Supply: Supply Voltage Quiescent Current per amplifier DS21669B-page 2 2002 Microchip Technology Inc. MCP6041/2/3/4 MCP6041/2/3/4 AC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, all limits are specified for VDD = +5 V, VSS = GND, TA = 25 C, VCM = VDD/2, R L = 1 M to VDD /2, CL = 60 pF, and VOUT ~ VDD /2 Parameters Gain Bandwidth Product Slew Rate Phase Margin Input Voltage Noise Input Voltage Noise Density Input Current Noise Density Sym GBWP SR PM En en in Min -- -- -- -- -- -- Typ 14 3.0 65 5.0 170 0.6 Max -- -- -- -- -- -- Units kHz V/ms Vp-p nV/Hz fA/Hz G = +1 f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz Conditions SPECIFICATIONS FOR MCP6043 CHIP SELECT FEATURE Electrical Characteristics: Unless otherwise indicated, all limits are specified for VDD = +1.4 V to +5.5 V, VSS = GND, TA = 25 C, VCM = VDD/2, R L = 1 M to VDD /2, CL = 60 pF, and VOUT ~ VDD /2 Parameters Sym Min Typ Max Units Conditions CS Low Specifications: CS Logic Threshold, Low CS Input Current, Low VIL ICSL VSS -- -- 5.0 VSS + 0.3 -- V pA For entire VDD range CS = VSS CS High Specifications: CS Logic Threshold, High CS Input Current, High CS Input High, GND Current Amplifier Output Leakage, CS High VIH ICSH IQ VDD - 0.3 -- -- -- -- 5.0 20 20 VDD -- -- -- V pA pA pA For entire VDD range CS = VDD CS = VDD CS = VDD Dynamic Specifications: CS Low to Amplifier Output High Turn-on Time CS High to Amplifier Output High Z Hysteresis tON tOFF VHYST -- -- -- 2.0 10 0.6 50 -- -- ms s V CS low = VSS + 0.3 V, G = +1 V/V, VOUT = 0.9 VDD/2 CS high = V DD - 0.3 V, G = +1 V/V VOUT = 0.1 VDD/2 VDD = 5 V MCP6041/2/3/4 TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, all limits are specified for VDD = +1.4 V to +5.5 V, VSS = GND Parameters Symbol TA TA TA JA JA JA JA JA JA JA Min -40 -40 -65 -- -- -- -- -- -- -- Typ -- -- -- 256 85 163 206 70 120 100 Max +85 +125 +150 -- -- -- -- -- -- -- Units C C C C/W C/W C/W C/W C/W C/W C/W Note 1 Conditions Temperature Ranges: Specified Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances: Thermal Resistance, 5L-SOT23 Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Thermal Resistance, 8L-MSOP Thermal Resistance, 14L-PDIP Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP Note 1: The MCP6041/2/3/4 family of op amps operates over this extended range, but with reduced performance. 2002 Microchip Technology Inc. DS21669B-page 3 MCP6041/2/3/4 2.0 Note: TYPICAL PERFORMANCE CURVES The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Unless otherwise indicated, VDD = +5 V, VSS = GND, TA = 25C, VCM = VDD/2, RL = 1 M to VDD/2, CL = 60 pF, and V OUT ~ VDD/2. 35% 1196 Samples VDD = 5.5V VCM = VDD Note: 35% 30% 25% Percentage 20% 15% 10% 5% 0% -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 Input Offset Voltage (mV) 3.0 4.0 Percentage 30% 25% 20% 15% 10% 5% 0% 1196 Samples VDD = 1.4V VCM = VDD -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 Input Offset Voltage (mV) 3.0 4.0 FIGURE 2-1: Histogram of Input Offset Voltage with VDD = 5.5 V, VCM = VDD. 35% 30% 25% Percentage 20% 15% 10% 5% 0% -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 Input Offset Voltage (mV) 3.0 4.0 1199 Samples VDD = 5.5V VCM = VDD/2 FIGURE 2-4: Histogram of Input Offset Voltage with VDD = 1.4 V, VCM = VDD. 35% 30% 25% Percentage 20% 15% 10% 5% 0% -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 Input Offset Voltage (mV) 3.0 4.0 1199 Samples VDD = 1.4V VCM = VDD/2 FIGURE 2-2: Histogram of Input Offset Voltage with VDD = 5.5 V, VCM = VDD/2. 35% 30% 25% Percentage 20% 15% 10% 5% 0% -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0 Input Offset Voltage (mV) 1199 Samples VDD = 5.5V VCM = VSS FIGURE 2-5: Histogram of Input Offset Voltage with VDD = 1.4 V, VCM = VDD/2. 35% 30% 25% Percentage 20% 15% 10% 5% 0% -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0 Input Offset Voltage (mV) 1199 Samples VDD = 1.4V VCM = VSS FIGURE 2-3: Histogram of Input Offset Voltage with VDD = 5.5 V, VCM = VSS. FIGURE 2-6: Histogram of Input Offset Voltage with VDD = 1.4 V, VCM = VSS. DS21669B-page 4 2002 Microchip Technology Inc. MCP6041/2/3/4 Note: Unless otherwise indicated, VDD = +5 V, VSS = GND, TA = 25C, VCM = VDD/2, RL = 1 M to VDD/2, CL = 60 pF, and V OUT ~ VDD/2. 400 1176 Samples VDD = 5.5V VCM = VDD/2 35% 30% 25% Percentage 20% 15% 10% 5% 0% 0 2 4 6 8 -10 Input Offset Voltage Drift (V/C) 10 -8 -6 -4 -2 300 Input Offset Voltage (V) 200 100 0 -100 -200 -300 VDD = 5.5V TA = +85C TA = +25C TA = -40C TA = +85C TA = +25C TA = -40C -400 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Common Mode Input Voltage (V) FIGURE 2-7: Histogram of Input Offset Voltage Drift with VDD = 5.5 V, VCM = VDD/2. FIGURE 2-10: Input Offset Voltage vs. Common Mode Input Voltage vs. Temperature with VDD = 5.5 V. 1000 VDD = 1.4V 35% 30% 25% Percentage 20% 15% 10% 5% 0% -8 -6 -4 -10 -2 0 2 4 6 8 10 Input Offset Voltage Drift (V/C) 1143 Samples VDD = 5.5V VCM = VSS 800 Input Offset Voltage (V) 600 400 200 0 -200 -400 -600 -800 TA = +85C TA = -40C TA = +25C TA = +85C TA = +85C -1000 -0.5 0.0 0.5 1.0 1.5 Common Mode Input Voltage (V) 2.0 FIGURE 2-8: Histogram of Input Offset Voltage Drift with VDD = 5.5 V, VCM = VSS. FIGURE 2-11: Input Offset Voltage vs. Common Mode Input Voltage vs. Temperature with VDD = 1.4 V. 500 RL = 50 k 35% 30% 25% Percentage 20% 15% 10% 5% 0% 0 2 4 6 8 -10 10 -8 -6 -4 -2 Input Offset Voltage Drift (V/C) 1124 Samples VDD = 1.4V VCM = VSS Input Offset Voltage (V) 450 400 350 300 250 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Output Voltage (V) VDD = 5.5V VDD = 1.4V FIGURE 2-9: Histogram of Input Offset Voltage Drift with VDD = 1.4 V, VCM = VSS. FIGURE 2-12: Input Offset Voltage vs. Output Voltage vs. Power Supply Voltage. 2002 Microchip Technology Inc. DS21669B-page 5 MCP6041/2/3/4 Note: Unless otherwise indicated, VDD = +5 V, VSS = GND, TA = 25C, VCM = VDD/2, RL = 1 M to VDD/2, CL = 60 pF, and V OUT ~ VDD/2. 300 1000 Input Noise Voltage Density (nV/ Hz) Input Noise Voltage Density (nV/ Hz) 250 200 150 100 50 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 Common Mode Input Voltage (V) 4.5 5.0 f = 1 kHz VDD = 5V eni = 170 nV/ Hz, f = 1 kHz Eni = 5.0 Vp-p, f = 0.1 to 10 Hz 100 0.1 1 10 Frequency (Hz) 100 1000 FIGURE 2-13: vs. Frequency. 90 80 CMRR, PSRR (dB) Input Noise Voltage Density FIGURE 2-16: Input Noise Voltage Density vs. Common Mode Input Voltage. 100 95 PSRR, CMRR (dB) 1182 Samples VDD = 5.0V VCM = VSS 70 60 50 40 30 VDD = 5.0V CMRR PSRR- 90 85 80 75 70 PSRR PSRR+ CMRR 20 0.1 1 10 Frequency (Hz) 100 1000 -40 -20 0 20 40 60 80 Temperature (C) FIGURE 2-14: Common Mode Rejection Ratio, Power Supply Rejection Ratio vs. Frequency. 50 Input Bias and Offset Current (pA) 40 30 Input Bias Current FIGURE 2-17: Common Mode Rejection Ratio, Power Supply Rejection Ratio vs. Temperature. 45 Input Bias and Offset Current (pA) 40 35 30 25 20 15 10 5 0 -40 -20 0 20 40 Temperature ( C) 60 80 Input Bias Current Input Offset Current VDD = 5.5V VCM = VDD TA = 85C VDD = 5.5V 20 10 Input Offset Current 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Common Mode Input Voltage (V) FIGURE 2-15: Input Bias, Offset Currents vs. Common Mode Input Voltage with Temperature = 85C. FIGURE 2-18: vs. Temperature. Input Bias, Offset Currents DS21669B-page 6 2002 Microchip Technology Inc. MCP6041/2/3/4 Note: Unless otherwise indicated, VDD = +5 V, VSS = GND, TA = 25C, VCM = VDD/2, RL = 1 M to VDD/2, CL = 60 pF, and V OUT ~ VDD/2. 0.7 Quiescent Current (A/Amplifier) VDD = 5.5V 0.7 Quiescent Current (A/Amplifier) 0.6 0.5 0.4 0.3 0.2 0.1 0.0 -40 -20 0 20 40 60 80 Temperature ( C) VDD = 1.4V TA = +85C 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 Power Supply Voltage, VDD (V) TA = +25C TA = -40C FIGURE 2-19: Quiescent Current vs. Temperature vs. Power Supply Voltage. 140 120 Open Loop Gain (dB) 100 80 60 40 20 0 -20 0.001 0.01 1.E-03 1.E-02 FIGURE 2-22: Quiescent Current Vs. Power Supply Voltage vs. Temperature. 0 130 120 Open Loop Gain -30 Open Loop Phase () Open Loop Phase VDD = 5.5V VOUT = 0.5V to 5.0V -90 -120 -150 -180 -210 VDD = 5.5V 1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 DC Open Loop Gain (dB) -60 110 100 90 80 70 60 VDD = 1.4V VOUT = 0.5V to 0.9V 0.1 1 10 100 1k 10k -240 100k 1.E+05 1. E+0 2 1. E+0 3 1. E+0 4 1. E+0 5 Frequency (Hz) 100 1k 10k Load Resistance () 100k FIGURE 2-20: Open Loop Gain, Phase vs. Frequency with VDD = 5.5 V. 140 130 120 110 100 90 80 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Power Supply Voltage, VDD (V) 5.0 5.5 RL = 50 k VSS + 100 mV < VOUT < VDD - 100 mV FIGURE 2-23: Open Loop Gain vs. Load Resistance vs. Power Supply Voltage. 140 130 Open Loop Gain (dB) 120 110 VDD = 1.4V RL = 50 k VDD = 5.5V DC Open Loop Gain (dB) 100 90 80 0.00 0.05 0.10 0.15 0.20 0.25 Output Voltage Headroom, VDD-V OUT or VOUT-V SS (V) FIGURE 2-21: Supply Voltage. Open Loop Gain vs. Power FIGURE 2-24: Open Loop Gain vs. Output Voltage Headroom vs. Power Supply Voltage. 2002 Microchip Technology Inc. DS21669B-page 7 MCP6041/2/3/4 Note: Unless otherwise indicated, VDD = +5 V, VSS = GND, TA = 25C, VCM = VDD/2, RL = 1 M to VDD/2, CL = 60 pF, and V OUT ~ VDD/2. 18 16 Gain Bandwidth Product (kHz) 14 12 10 8 6 4 2 0 0.0 VDD = 5V RL = 100 k G = +1 V/V Gain Bandwidth Product Phase Margin 130 Channel to Channel Separation (dB) 120 110 100 90 80 70 60 100 1.E+02 90 80 70 60 50 40 30 20 10 0 4.5 5.0 Phase Margin () Phase Margin () Input Referred 1.E+03 1.E+04 1k Frequency (Hz) 10k 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 Common Mode Input Voltage(V) FIGURE 2-25: Channel to Channel Separation vs. Frequency (MCP6042 and MCP6044 only). 18 16 Gain Bandwidth Product (kHz) 14 12 10 8 6 4 2 0 -40 -20 0 20 40 Temperature (C) 60 80 VDD = 5.5V G = +1 V/V Gain Bandwidth Product Phase Margin FIGURE 2-28: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage with Unity Gain. 90 80 Gain Bandwidth Product (kHz) 70 Phase Margin () 60 50 40 30 20 10 0 18 16 14 12 10 8 6 4 2 0 -40 -20 0 20 40 Temperature (C) 60 80 VDD = 1.4V G = +1 V/V Gain Bandwidth Product Phase Margin 90 80 70 60 50 40 30 20 10 0 FIGURE 2-26: Gain Bandwidth Product, Phase Margin vs. Temperature with VDD = 5.5 V, Unity Gain. 18 Unity Loop Gain Frequency (kHz) 16 14 12 10 8 6 4 2 0 VDD = 5.5V G = +1 V/V RL = 10 k Phase Margin Unity Loop Gain Frequency FIGURE 2-29: Gain Bandwidth Product, Phase Margin vs. Temperature with VDD = 1.4 V, Unity Gain. 40 Output Short Circuit Current (mA) 35 30 25 20 15 10 5 0 -40 -20 0 20 40 Temperature (C) 60 80 | ISC- | @ VDD=1.4V ISC+ @ VDD=1.4V | ISC- | @ VDD=5.5V ISC+ @ VDD=5.5V 90 80 70 60 50 40 30 20 10 100 Load Capacitance (pF) 0 1000 Phase Margin () 10 FIGURE 2-27: Unity Loop Gain Frequency, Phase Margin vs. Load Capacitance. FIGURE 2-30: Output Short Circuit Current vs. Temperature vs. Power Supply Voltage. DS21669B-page 8 2002 Microchip Technology Inc. MCP6041/2/3/4 Note: Unless otherwise indicated, VDD = +5 V, VSS = GND, TA = 25C, VCM = VDD/2, RL = 1 M to VDD/2, CL = 60 pF, and V OUT ~ VDD/2. 10 VDD = 5.0V 6 Output Voltage Swing (Vp-p) 5 High-to-Low Transition VDD = 5.5V Slew Rate (V/ms) 4 3 2 1 0 -40 -20 0 20 40 Temperature (C) 60 80 Low-to-High Transition 1 VDD = 1.4V 0.1 1.E +01 1.E +02 1.E +03 1.E +04 10 100 1k Frequency (Hz) 10k FIGURE 2-31: Slew Rate vs. Temperature. FIGURE 2-34: Output Voltage Swing vs. Frequency vs. Power Supply Voltage. 5 Output Voltage Headroom, VDD - VOH or V OL - VSS (mV) 100 VOL-VSS @ VDD = 5.5V VDD-VOH @ VDD = 5.5V Output Voltage Headroom, VDD-VOH or VOL-VSS (mV) VDD = 5.5V RL = 50 k VOL - VSS 4 3 10 VDD-VOH @ VDD = 1.4V VOL-VSS @ VDD = 1.4V 2 VDD - VOH 1 1 0 1.E+03 1.E+04 1.E+05 1k 10k Load Resistance ( ) 100k -40 -20 0 20 40 Temperature (C) 60 80 FIGURE 2-32: Output Voltage Headroom vs. Load Resistance vs. Power Supply Voltage. 3.E-02 FIGURE 2-35: vs. Temperature. 0.025 Output Voltage Headroom 2.E-02 Output Voltage (5mV/div) 2.E-02 VDD = 5.0V G = +1 V/V RL = 50 k 0.020 0.015 VDD = 5.0V G = -1 V/V RL = 50 k 1.E-02 Voltage (5 mV/div) 1.E-04 2.E-04 3.E-04 4.E-04 5.E-04 6.E-04 7.E-04 8.E-04 9.E-04 1.E-03 0.010 5.E-03 0.005 0.E+00 0.000 -5. E-03 -0. 005 -1. E-02 -0. 010 -2. E-02 -0. 015 -2. E-02 -0. 020 -3. E-02 0.E+00 -0. 025 Time (100 s/div) 0.0E+00 1.0E-04 2.0E-04 3.0E-04 4.0E-04 5.0E-04 6.0E-04 7.0E-04 8.0E-04 9.0E-04 1.0E-03 Time (100 s/div) FIGURE 2-33: Pulse Response. Small Signal Non-Inverting FIGURE 2-36: Response. Small Signal Inverting Pulse 2002 Microchip Technology Inc. DS21669B-page 9 MCP6041/2/3/4 Note: Unless otherwise indicated, VDD = +5 V, VSS = GND, TA = 25C, VCM = VDD/2, RL = 1 M to VDD/2, CL = 60 pF, and V OUT ~ VDD/2. 5.0 VDD = 5.0V G = +1 V/V RL = 50 k 5.0 4.5 4.0 Output Voltage (V) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.E+00 1.E-03 2.E-03 3.E-03 4.E-03 5.E-03 6.E-03 7.E-03 8.E-03 9.E-03 1.E-02 4.5 4.0 Output Voltage (V) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.E+00 1.E-03 2.E-03 3.E-03 4.E-03 5.E-03 6.E-03 7.E-03 VDD = 5.0V G = -1 V/V RL = 50 k 8.E-03 9.E-03 1.E-02 Time (1 ms/div) Time (1 ms/div) FIGURE 2-37: Pulse Response. 7.5 5.0 2.5 0.0 -2.5 -5.0 -7.5 CS Large Signal Non-Inverting FIGURE 2-40: Response. 3.0 Internal CS Switch Output (V) 2.5 2.0 1.5 1.0 0.5 CS Input High to Low Large Signal Inverting Pulse Chip Select (CS) Voltage (V) 4.5 4.0 3.5 3.0 VOUT VDD = 5.0V Amplifier Output-Active (driven) VDD = 5.0V 2.0 1.5 1.0 0.5 0.0 Output Hi-Z 6.E-03 7.E-03 8.E-03 9.E-03 1.E-02 -10.0 -12.5 -15.0 -17.5 0.E+00 Output Voltage (V) 2.5 Hysteresis CS Input Low to High Amplifier Output-Hi-Z 0.0 -0.5 0 1 2 3 4 5 CS Input Voltage (V) Output Hi-Z 1.E-03 2.E-03 Output Driven -0.5 -1.0 3.E-03 4.E-03 Time (1 ms/div) FIGURE 2-38: Chip Select (CS) to Amplifier Output Response Time (MCP6043 only). 6 5 VOUT 5.E-03 -20.0 FIGURE 2-41: (MCP6043 only). Chip Select (CS) Hysteresis VIN Output Voltage (V) 4 3 2 1 0 -1 0.00E+00 VDD = 5.0V G = +2 V/V 5.00E-03 1.00E-02 1.50E-02 2.00E-02 2.50E-02 Time (5 ms/div) FIGURE 2-39: The MCP6041/2/3/4 family shows no phase reversal (for information only- the Maximum Absolute Input Voltage is still VSS-0.3 V and VDD+0.3 V). DS21669B-page 10 2002 Microchip Technology Inc. MCP6041/2/3/4 3.0 APPLICATIONS INFORMATION The MCP6041/2/3/4 family of operational amplifiers are fabricated on Microchip's state-of-the-art CMOS process. They are unity gain stable and suitable for a wide range of applications requiring very low power consumption. With these op amps, the power supply pin needs to be by-passed with a 0.1 F capacitor. The second specification, Linear Region Output Voltage Swing, details the output voltage range that supports the specified Open Loop Gain (AOL 95 dB with RL = 50 k). 3.4 Input Voltage and Phase Reversal 3.1 Rail to Rail Input The input stage of the family of devices uses two differential input stages in parallel; one operates at low VCM (common mode input voltage) and the other at high VCM. With this topology, the MCP6041/2/3/4 family operates with VCM up to 300 mV past either supply rail. The Input Offset Voltage is measured at both VCM = VSS - 0.3 V and VDD + 0.3 V to ensure proper operation. The MCP6041/2/3/4 op amp family uses CMOS transistors at the input. It is designed to not exhibit phase inversion when the input pins exceed the supply voltages. Figure 2-39 shows an input voltage exceeding both supplies with no resulting phase inversion. The maximum operating VCM (common mode input voltage) that can be applied to the inputs is VSS -0.3 V and VDD +0.3 V. Voltage on the input that exceed this absolute maximum rating can cause excessive current to flow in or out of the input pins. Current beyond 2 mA can cause possible reliability problems. Applications that exceed this rating must be externally limited with an input resistor as shown in Figure 3-1. 3.2 Output Loads and Battery Life The MCP6041/2/3/4 op amp family has outstanding quiescent current, which supports battery-powered applications. There is minimal quiescent current glitching when chip select (CS) is raised or lowered. This prevents excessive current draw and reduced battery life, when the part is turned off or on. Heavy resistive loads at the output can cause excessive battery drain. Driving a DC voltage of 2.5 V across a 100 k load resistor will cause the supply current to increase by 25 A, depleting the battery 43 times as fast as IQ (0.6 A typ) alone. High frequency signals (fast edge rate) across capacitive loads will also significantly increase supply current. For instance, a 0.1 F capacitor at the output presents an AC impedance of 15.9 k (1/2fC) to a 100 Hz sinewave. It can be shown that the average power drawn from the battery by a 5.0 Vp-p sinewave (1.77 Vrms), under these conditions, is: RIN VIN MCP604X VOUT ( Maximum expected V IN ) - V DD R IN -----------------------------------------------------------------------------2 mA V SS - ( Minimum expected V IN ) R IN --------------------------------------------------------------------------2 mA FIGURE 3-1: An input resistor, RIN, should be used to limit excessive input current if the inputs exceed the Absolute Maximum specification. 3.5 Capacitive Load and Stability EQUATION P SUPPLY = ( V DD - V SS ) ( I Q + V L ( p - p ) fC L ) = ( 5V ) ( 0.6A + 5.0V p - p * 100Hz * 0.1F ) = 3.0W + 50W This will drain the battery 18 times as fast as IQ alone. 3.3 Rail to Rail Output Driving capacitive loads can cause stability problems with voltage feedback op amps. A buffer configuration (G = +1) is the most sensitive to capacitive loads. Figure 2-27 shows how increasing the load capacitance will decrease the phase margin. While a phase margin above 60 is ideal, 45 is sufficient. As can be seen, up to CL = 150 pF can be placed on the MCP6041/2/3/4 op amp outputs without any problems, while 250 pF is usable with a 45 phase margin. When the op amp is required to drive large capacitive loads (CL >150 pF), a small series resistor (RISO in Figure 3-2) at the output of the amplifier improves the phase margin. This resistor makes the output load resistive at higher frequencies, which improves the phase margin. The bandwidth reduction caused by the capacitive load, however, is not changed. To select RISO, start with 1 k, then use the MCP6041 SPICE The output voltage range of the MCP6041/2/3/4 family is specified two ways. The first specification, Maximum Output Voltage Swing, defines the maximum swing possible under a particular output load. According to the spec table, the output can reach 10 mV of either supply rail when RL = 50 k. See Figure 2-32 for information on Maximum Output Voltage Swing vs. load resistance. 2002 Microchip Technology Inc. DS21669B-page 11 MCP6041/2/3/4 macro model and bench testing to adjust RISO until the frequency response peaking is reasonable. Use the smallest reasonable value. Surface leakage is caused by a difference in voltage between traces, combined with high humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012. A 5 V difference would cause 5 pA of current to flow; this is greater than the input current of the MCP6041/2/3/4 family at 25C (1 pA, typ). The simplest technique to reduce surface leakage is using a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin or trace. Figure 3-4 shows an example of a typical layout. ININ+ VSS RISO MCP604X VIN CL VOUT FIGURE 3-2: capacitive loads. Amplifier circuit for heavy 3.6 The MCP6043 Chip Select (CS) Option The MCP6043 is a single amplifier with a chip select (CS) option. When CS is pulled high, the supply current drops to 20 pA (typ) and goes through the CS pin to VSS. When this happens, the amplifier is put into a high impedance state. By pulling CS low, the amplifier is enabled. If the CS pin is left floating, the amplifier will not operate properly. Figure 3-3 shows the output voltage and supply current response to a CS pulse. CS VIL tON VOUT Hi-Z 0.6 A, typ IVDD 5 pA, typ 0.6 A, typ IVSS 20 pA, typ 5 pA, typ 20 pA, typ 5 pA, typ VIH tOFF Hi-Z Guard Ring FIGURE 3-4: layout. Example of Guard Ring Circuit schematics for different guard ring implementations are shown in Figure 3-5. Figure 3-5A biases the guard ring to the input common mode voltage, which is most effective for non-inverting gains, including unity gain. Figure 3-5B biases the guard ring to a reference voltage (VREF, which can be ground). This is useful for inverting gains and precision photo sensing circuits. Figure 3-5A VDD MCP604X ICS 5 pA, typ VREF Figure 3-5B FIGURE 3-3: Timing Diagram for the CS function on the MCP6043 op amp. 3.7 Layout Considerations VDD MCP604X VREF Good PC board layout techniques will help you achieve the performance shown in the specs and Typical Performance Curves. It will also assist in minimizing Electro-Magnetic Compatibility (EMC) issues. 3.7.1 SURFACE LEAKAGE In applications where low input bias current is critical, PC board surface leakage effects and signal coupling from trace to trace need to be considered. FIGURE 3-5: Two possible guard ring connection strategies to reduce surface leakage effects. DS21669B-page 12 2002 Microchip Technology Inc. MCP6041/2/3/4 3.7.2 COMPONENT PLACEMENT 3.8 3.8.1 Typical Applications BATTERY CURRENT SENSING Separate digital from analog and low speed from high speed. This helps prevent crosstalk. Keep sensitive traces short and straight. Separate them from interfering components and traces. This is especially important for high frequency (low rise time) signals. Use a 0.1 F supply bypass capacitor within 0.1" (2.5 mm) of the V DD pin. It must connect directly to the ground plane. The MCP6041/2/3/4 op amps' Common Mode Input Range, which goes 300 mV beyond both supply rails, supports their use in high side and low side battery current sensing applications. The very low quiescent current (0.6 A, typ) help prolong battery life while the rail-to-rail output allows you to detect low currents. Figure 3-7 shows a high side battery current sensor circuit. The 10 resistors are sized to minimize power losses. The battery current (IDD) through the 10 resistor causes its top terminal to be more negative than the bottom terminal. This keeps the common mode input voltage of the op amp VDD, which is within its allowed range. The output of the op amp can reach VDD - 0.1 mV (see Figure 2-32), which is a smaller error than the offset voltage. VDD VDD IDD 100 k 3.7.3 SIGNAL COUPLING The input pins of the MCP6041/2/3/4 family of op amps are high impedance, which allows noise injection. This noise can be capacitively or magnetically coupled. In either case, using a ground plane helps reduce noise injection. When noise is coupled capacitively, the ground plane provides shunt capacitance to ground for high frequency signals. Figure 3-6 shows the equivalent circuit. The coupled current, IM, produces a lower voltage (VTRACE 2) on the victim trace when the trace to ground plane capacitance (C SH2) is large and the terminating resistor (RT2) is small. Increasing the distance between traces, and using wider traces, also helps. CM VTRACE 1 CSH1 CSH2 IM VTRACE 2 10 +2.5 V to 5.5 V MCP604X VSS 1 M R T2 FIGURE 3-7: Sensor. 3.8.2 High Side Battery Current INSTRUMENTATION AMPLIFIER FIGURE 3-6: Equivalent circuit for capacitive coupling between traces on a PC board (with ground plane). When noise is coupled magnetically, ground plane reduces the mutual inductance between traces. This occurs because the ground return current at high frequencies will follow a path directly beneath the signal trace. Increasing the separation between traces makes a significant difference. Changing the direction of one of the traces can also reduce magnetic coupling. If these techniques are not enough, it may help to place guard traces next to the victim trace. They should be on both sides of the victim trace and be as close as possible. Connect the guard traces to ground plane at both ends, and in the middle, for long traces. The MCP6041/2/3/4 op amp is well suited for conditioning sensor signals in battery-powered applications. Figure 3-8 shows a two op amp instrumentation amplifier, using the MCP6042, that works well for applications requiring rejection of common mode noise at higher gains. The reference voltage (VREF) is supplied by a low impedance source. In single supply applications, VREF is typically VDD/2. RG VREF R1 R1 R1 R1 VOUT V2 V1 1/2 MCP6042 1/2 MCP6042 R 1 2R 1 V O UT = ( V 1 - V 2 ) 1 + ----- + -------- + V REF R 2 RG FIGURE 3-8: Two Op Amp Instrumentation Amplifier. 2002 Microchip Technology Inc. DS21669B-page 13 MCP6041/2/3/4 4.0 SPICE MACRO MODEL The Spice macro model for the MCP6041, MCP6042, MCP6043 and MCP6044 simulates the typical amplifier performance of: offset voltage, DC power supply rejection, input capacitance, DC common mode rejection, open loop gain over frequency, phase margin, output swing, DC power supply current, power supply current change with supply voltage, input common mode range, output voltage range vs. load and input voltage noise. The characteristics of the MCP6041, MCP6042, MCP6043 and MCP6044 amplifiers are similar in terms of performance and behavior. This single op amp macro model supports all four devices with the exception of the chip select function of the MCP6043, which is not modeled. The listing for this macro model is shown on the next page. The most recent revision of the model can be downloaded from Microchip's web site at www.microchip.com. DS21669B-page 14 2002 Microchip Technology Inc. MCP6041/2/3/4 Software License Agreement The software supplied herewith by Microchip Technology Incorporated (the "Company") is intended and supplied to you, the Company's customer, for use solely and exclusively on Microchip products. The software is owned by the Company and/or its supplier, and is protected under applicable copyright laws. All rights are reserved. Any use in violation of the foregoing restrictions may subject the user to criminal sanctions under applicable laws, as well as to civil liability for the breach of the terms and conditions of this license. THIS SOFTWARE IS PROVIDED IN AN "AS IS" CONDITION. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. THE COMPANY SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. .SUBCKT MCP6041 1 2 3 4 5 * ||||| * | | | | Output * | | | Negative Supply * | | Positive Supply * | Inverting Input * Non-inverting Input * * Macromodel for the MCP6041/2/3/4 op amp family: * MCP6041 (single) * MCP6042 (dual) * MCP6043 (single w/ CS; chip select is not modeled) * MCP6044 (quad) * * Revision History: * REV A: 7-9-01 created KEB * * Recommendations: * Use PSPICE (other simulators may require translation) * For a quick, effective design, use a combination of: data sheet * specs, bench testing, and simulations with this macromodel * For high impedance circuits, set GMIN=100F in the.OPTIONS * statement * * Supported: * Typical performance at room temperature (25 degrees C) * DC, AC, Transient, and Noise analyses. * Most specs, including: offsets, PSRR, CMRR, input impedance, * open loop gain, voltage ranges, supply current,..., etc. * * Not Supported: * Chip Select (MCP6043) * Variation in specs vs. Power Supply Voltage * Distortion (detailed non-linear behavior) * Temperature analysis * Process variation * Behavior outside normal operating region * * Input Stage V10 3 10 -0.3 R10 10 11 78K R11 10 12 78K C11 11 12 4.9P C12 1 0 6P E12 1 14 POLY(4) 20 0 21 0 26 0 27 0 11 G12 14 0 POLY(2) 22 0 23 0 1.5P 1U M12 11 14 15 15 NMI C13 14 2 3P M14 12 2 15 15 NMI G14 2 0 POLY(2) 24 0 25 0 0.5P 1U C14 2 0 6P I15 15 4 500N V16 16 4 0.18 D16 16 15 DL V13 3 13 0.00 D13 14 13 DL * * Noise Sources I20 21 20 17.2N D20 20 0 DN1 D21 0 21 DN1 I22 23 22 588U D22 22 0 DN23 D23 0 23 DN23 I24 25 24 588U D24 24 0 DN23 D25 0 25 DN23 * * PSRR and CMRR G26 0 26 POLY(1) 3 4 110U -20U R26 26 0 1 G27 0 27 POLY(2) 1 3 2 4 -275U 50U R27 27 0 1 * * Open Loop Gain, Slew Rate G30 0 30 POLY(1) 12 11 0 1MEG R30 30 0 1 C30 30 0 11.4 G31 0 31 POLY(1) 30 0 01 R31 31 0 1 C31 31 0 775N * * Output Stage G40 0 40 POLY(1) 45 5 0 22.7M D41 40 41 DL R41 41 0 1K D42 42 40 DL R42 42 0 1K G43 3 0 POLY(1) 41 0 100N 1M G47 0 4 POLY(1) 42 0 100N -1M E43 43 0 POLY(1) 3 0 01 1M 1 1 1U 1U 50U 2002 Microchip Technology Inc. DS21669B-page 15 MCP6041/2/3/4 E47 47 0 POLY(1) 4 0 01 V44 43 44 1M D44 45 44 DLS D46 46 45 DLS V46 46 47 1M G45 47 45 POLY(2) 31 0 3 4 0 8U 4U R45 45 47 125K R48 45 5 44 C48 5 0 2P * * Models .MODEL NMI NMOS L=2 W=42 .MODEL DL D N=1 IS=1F .MODEL DLS D N=1M IS=1F .MODEL DN1 D IS=1F KF=1.13E-18 AF=1 .MODEL DN23 D IS=1F KF=3E-20 AF=1 * .ENDS MCP6041 DS21669B-page 16 2002 Microchip Technology Inc. MCP6041/2/3/4 5.0 5.1 PACKAGING INFORMATION Package Marking Information 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW Example: MCP6041 I/PNNN YYWW 8-Lead SOIC (150 mil) Example: MCP6041 I/SNYYWW NNN XXXXXXXX XXXXYYWW NNN 8-Lead MSOP XXXXXX YWWNNN Example: 6041 YWWNNN 5-Lead SOT-23 (MCP6041 only) 5 4 Example: 5 4 XXNN 1 2 3 1 SBNN 2 3 Legend: XX...X YY WW NNN Customer specific information* Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * Standard marking consists of Microchip part number, year code, week code, traceability code (facility code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. 2002 Microchip Technology Inc. DS21669B-page 17 MCP6041/2/3/4 5.1 Package Marking Information (Continued) 14-Lead PDIP (300 mil) (MCP6044) Example: XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN MCP6044-I/P XXXXXXXXXXXXXX YYWWNNN 14-Lead SOIC (150 mil) (MCP6044) Example: XXXXXXXXXX XXXXXXXXXX YYWWNNN MCP6044ISL XXXXXXXXXX YYWWNNN 14-Lead TSSOP (MCP6044) Example: XXXXXX YYWW NNN 6044ST YYWW NNN Legend: XX...X YY WW NNN Customer specific information* Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * Standard marking consists of Microchip part number, year code, week code, traceability code (facility code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. DS21669B-page 18 2002 Microchip Technology Inc. MCP6041/2/3/4 8-Lead Plastic Dual In-line (P) - 300 mil (PDIP) E1 D 2 n 1 E A A2 c L A1 eB B1 p B Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic Units Dimension Limits n p A A2 A1 E E1 D L c B1 B eB MIN INCHES* NOM 8 .100 .155 .130 .313 .250 .373 .130 .012 .058 .018 .370 10 10 MAX MIN .140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 5 5 .170 .145 .325 .260 .385 .135 .015 .070 .022 .430 15 15 MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10 MAX 4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 2002 Microchip Technology Inc. DS21669B-page 19 MCP6041/2/3/4 8-Lead Plastic Small Outline (SN) - Narrow, 150 mil (SOIC) E E1 p D 2 B n 1 h 45 c A A2 L A1 Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic Units Dimension Limits n p A A2 A1 E E1 D h L c B MIN .053 .052 .004 .228 .146 .189 .010 .019 0 .008 .013 0 0 INCHES* NOM 8 .050 .061 .056 .007 .237 .154 .193 .015 .025 4 .009 .017 12 12 MAX MIN .069 .061 .010 .244 .157 .197 .020 .030 8 .010 .020 15 15 MILLIMETERS NOM 8 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0 4 0.20 0.23 0.33 0.42 0 12 0 12 MAX 1.75 1.55 0.25 6.20 3.99 5.00 0.51 0.76 8 0.25 0.51 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057 DS21669B-page 20 2002 Microchip Technology Inc. MCP6041/2/3/4 8-Lead Plastic Micro Small Outline Package (MS) (MSOP) p E E1 D 2 B n 1 A c A1 A2 (F) L Units Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Footprint (Reference) Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom *Controlling Parameter Significant Characteristic Notes: Dimension Limits n p A A2 A1 E E1 D L F c B .030 .002 .184 .114 .114 .016 .035 0 .004 .010 MIN INCHES NOM 8 .026 .044 .034 .193 .118 .118 .022 .037 .006 .012 7 7 .038 .006 .200 .122 .122 .028 .039 6 .008 .016 MAX MIN MILLIMETERS* NOM 0.65 1.18 0.76 0.05 4.67 2.90 2.90 0.40 0.90 0 0.10 0.25 0.15 0.30 7 7 4.90 3.00 3.00 0.55 0.95 0.86 0.97 0.15 .5.08 3.10 3.10 0.70 1.00 6 0.20 0.40 MAX 8 Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. Drawing No. C04-111 2002 Microchip Technology Inc. DS21669B-page 21 MCP6041/2/3/4 5-Lead Plastic Small Outline Transistor (OT) (SOT23) E E1 p B p1 D n 1 c A A2 L A1 Number of Pins Pitch Outside lead pitch (basic) Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic Units Dimension Limits n p p1 A A2 A1 E E1 D L c B MIN INCHES* NOM 5 .038 .075 .046 .043 .003 .110 .064 .116 .018 5 .006 .017 5 5 MAX MIN .035 .035 .000 .102 .059 .110 .014 0 .004 .014 0 0 .057 .051 .006 .118 .069 .122 .022 10 .008 .020 10 10 MILLIMETERS NOM 5 0.95 1.90 0.90 1.18 0.90 1.10 0.00 0.08 2.60 2.80 1.50 1.63 2.80 2.95 0.35 0.45 0 5 0.09 0.15 0.35 0.43 0 5 0 5 MAX 1.45 1.30 0.15 3.00 1.75 3.10 0.55 10 0.20 0.50 10 10 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MO-178 Drawing No. C04-091 DS21669B-page 22 2002 Microchip Technology Inc. MCP6041/2/3/4 14-Lead Plastic Dual In-line (P) - 300 mil (PDIP) E1 D 2 n 1 E A A2 c eB A1 B1 B p L Number of Pins Pitch Top to Seating Plane A .140 .170 Molded Package Thickness A2 .115 .145 Base to Seating Plane A1 .015 Shoulder to Shoulder Width E .300 .313 .325 Molded Package Width E1 .240 .250 .260 Overall Length D .740 .750 .760 Tip to Seating Plane L .125 .130 .135 c Lead Thickness .008 .012 .015 Upper Lead Width B1 .045 .058 .070 Lower Lead Width B .014 .018 .022 Overall Row Spacing eB .310 .370 .430 Mold Draft Angle Top 5 10 15 Mold Draft Angle Bottom 5 10 15 * Controlling Parameter Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-005 Units Dimension Limits n p MIN INCHES* NOM 14 .100 .155 .130 MAX MIN MILLIMETERS NOM 14 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 18.80 19.05 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10 MAX 4.32 3.68 8.26 6.60 19.30 3.43 0.38 1.78 0.56 10.92 15 15 2002 Microchip Technology Inc. DS21669B-page 23 MCP6041/2/3/4 14-Lead Plastic Small Outline (SL) - Narrow, 150 mil (SOIC) E E1 p D 2 B n 1 h 45 c A A2 L Units Dimension Limits n p A A2 A1 E E1 D h L c B INCHES* NOM 14 .050 .061 .056 .007 .236 .154 .342 .015 .033 4 .009 .017 12 12 MILLIMETERS NOM 14 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 5.99 3.81 3.90 8.56 8.69 0.25 0.38 0.41 0.84 0 4 0.20 0.23 0.36 0.42 0 12 0 12 A1 MIN MAX MIN MAX Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic .053 .052 .004 .228 .150 .337 .010 .016 0 .008 .014 0 0 .069 .061 .010 .244 .157 .347 .020 .050 8 .010 .020 15 15 1.75 1.55 0.25 6.20 3.99 8.81 0.51 1.27 8 0.25 0.51 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-065 DS21669B-page 24 2002 Microchip Technology Inc. MCP6041/2/3/4 14-Lead Plastic Thin Shrink Small Outline (ST) - 4.4 mm (TSSOP) E E1 p D 2 n B 1 A c L A1 A2 Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic Units Dimension Limits n p A A2 A1 E E1 D L c B1 MIN INCHES NOM 14 .026 .035 .004 .251 .173 .197 .024 4 .006 .010 5 5 MAX MIN .033 .002 .246 .169 .193 .020 0 .004 .007 0 0 .043 .037 .006 .256 .177 .201 .028 8 .008 .012 10 10 MILLIMETERS* NOM MAX 14 0.65 1.10 0.85 0.90 0.95 0.05 0.10 0.15 6.25 6.38 6.50 4.30 4.40 4.50 4.90 5.00 5.10 0.50 0.60 0.70 0 4 8 0.09 0.15 0.20 0.19 0.25 0.30 0 5 10 0 5 10 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. JEDEC Equivalent: MO-153 Drawing No. C04-087 2002 Microchip Technology Inc. DS21669B-page 25 MCP6041/2/3/4 NOTES: DS21669B-page 26 2002 Microchip Technology Inc. MCP6041/2/3/4 ON-LINE SUPPORT Microchip provides on-line support on the Microchip World Wide Web (WWW) site. The web site is used by Microchip as a means to make files and information easily available to customers. To view the site, the user must have access to the Internet and a web browser, such as Netscape or Microsoft Explorer. Files are also available for FTP download from our FTP site. Systems Information and Upgrade Hot Line The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products. Plus, this line provides information on how customers can receive any currently available upgrade kits.The Hot Line Numbers are: 1-800-755-2345 for U.S. and most of Canada, and 1-480-792-7302 for the rest of the world. 013001 Connecting to the Microchip Internet Web Site The Microchip web site is available by using your favorite Internet browser to attach to: www.microchip.com The file transfer site is available by using an FTP service to connect to: ftp://ftp.microchip.com The web site and file transfer site provide a variety of services. Users may download files for the latest Development Tools, Data Sheets, Application Notes, User's Guides, Articles and Sample Programs. A variety of Microchip specific business information is also available, including listings of Microchip sales offices, distributors and factory representatives. Other data available for consideration is: * Latest Microchip Press Releases * Technical Support Section with Frequently Asked Questions * Design Tips * Device Errata * Job Postings * Microchip Consultant Program Member Listing * Links to other useful web sites related to Microchip Products * Conferences for products, Development Systems, technical information and more * Listing of seminars and events 2002 Microchip Technology Inc. DS21669B-page 27 MCP6041/2/3/4 READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this Data Sheet. To: RE: Technical Publications Manager Reader Response Total Pages Sent From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Device: MCP6041/2/3/4 Questions: 1. What are the best features of this document? Y N Literature Number: DS21669B FAX: (______) _________ - _________ 2. How does this document meet your hardware and software development needs? 3. Do you find the organization of this data sheet easy to follow? If not, why? 4. What additions to the data sheet do you think would enhance the structure and subject? 5. What deletions from the data sheet could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? 8. How would you improve our software, systems, and silicon products? DS21669B-page 28 2002 Microchip Technology Inc. MCP6041/2/3/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range /XX Package Examples: a) b) Device: MCP6041: CMOS Single Op Amp MCP6041T: CMOS Single Op Amp (Tape and Reel for SOT-23, SOIC, MSOP) MCP6042: CMOS Dual Op Amp MCP6042T: CMOS Dual Op Amp (Tape and Reel for SOIC and TSSOP) MCP6043: CMOS Single Op Amp w/CS Function MCP6043T: CMOS Single Op Amp w/CS Function (Tape and Reel for SOIC and MSOP) MCP6044: CMOS Quad Op Amp MCP6044T: CMOS Quad Op Amp (Tape and Reel for SOIC and TSSOP) I MS P SN OT SL ST = = = = = = = -40C to +85C Plastic MSOP, 8-lead Plastic DIP (300 mil Body), 8-lead, 14-lead Plastic SOIC (150 mil Body), 8-lead Plastic Small Outline Transistor (SOT-23), 5-lead (Tape and Reel - MCP6041 only) Plastic SOIC (150 mil Body), 14-lead Plastic TSSOP (4.4mm Body), 14-lead MCP6041-I/P: PDIP package. Industrial temperature, MCP6041T-I/OT: Tape and Reel, Industrial temperature, SOT-23 package. MCP6042-I/SN: SOIC package. MCP6043-I/MS: MSOP package. MCP6044-I/SL: SIOC package. Industrial temperature, Industrial temperature, Industrial temperature, c) d) e) f) MCP6044-I/ST: Industrial temperature, TSSOP package. Temperature Range: Package: Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. 2002 Microchip Technology Inc. DS21669B-page 29 MCP6041/2/3/4 NOTES: DS21669B-page 30 2002 Microchip Technology Inc. Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, FilterLab, KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, MXLAB, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company's quality system processes and procedures are QS-9000 compliant for its PICmicro (R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001 certified. 2002 Microchip Technology Inc. DS21669B - page 31 M WORLDWIDE SALES AND SERVICE AMERICAS Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: 480-792-7627 Web Address: http://www.microchip.com ASIA/PACIFIC Australia Microchip Technology Australia Pty Ltd Suite 22, 41 Rawson Street Epping 2121, NSW Australia Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 Japan Microchip Technology Japan K.K. Benex S-1 6F 3-18-20, Shinyokohama Kohoku-Ku, Yokohama-shi Kanagawa, 222-0033, Japan Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Rocky Mountain 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7966 Fax: 480-792-4338 China - Beijing Microchip Technology Consulting (Shanghai) Co., Ltd., Beijing Liaison Office Unit 915 Bei Hai Wan Tai Bldg. No. 6 Chaoyangmen Beidajie Beijing, 100027, No. China Tel: 86-10-85282100 Fax: 86-10-85282104 Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5934 Atlanta 500 Sugar Mill Road, Suite 200B Atlanta, GA 30350 Tel: 770-640-0034 Fax: 770-640-0307 Singapore Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-6334-8870 Fax: 65-6334-8850 Boston 2 Lan Drive, Suite 120 Westford, MA 01886 Tel: 978-692-3848 Fax: 978-692-3821 China - Chengdu Microchip Technology Consulting (Shanghai) Co., Ltd., Chengdu Liaison Office Rm. 2401, 24th Floor, Ming Xing Financial Tower No. 88 TIDU Street Chengdu 610016, China Tel: 86-28-86766200 Fax: 86-28-86766599 Taiwan Microchip Technology (Barbados) Inc., Taiwan Branch 11F-3, No. 207 Tung Hua North Road Taipei, 105, Taiwan Tel: 886-2-2717-7175 Fax: 886-2-2545-0139 Chicago 333 Pierce Road, Suite 180 Itasca, IL 60143 Tel: 630-285-0071 Fax: 630-285-0075 Dallas 4570 Westgrove Drive, Suite 160 Addison, TX 75001 Tel: 972-818-7423 Fax: 972-818-2924 China - Fuzhou Microchip Technology Consulting (Shanghai) Co., Ltd., Fuzhou Liaison Office Unit 28F, World Trade Plaza No. 71 Wusi Road Fuzhou 350001, China Tel: 86-591-7503506 Fax: 86-591-7503521 Detroit Tri-Atria Office Building 32255 Northwestern Highway, Suite 190 Farmington Hills, MI 48334 Tel: 248-538-2250 Fax: 248-538-2260 EUROPE Denmark Microchip Technology Nordic ApS Regus Business Centre Lautrup hoj 1-3 Ballerup DK-2750 Denmark Tel: 45 4420 9895 Fax: 45 4420 9910 China - Shanghai Microchip Technology Consulting (Shanghai) Co., Ltd. Room 701, Bldg. B Far East International Plaza No. 317 Xian Xia Road Shanghai, 200051 Tel: 86-21-6275-5700 Fax: 86-21-6275-5060 Kokomo 2767 S. Albright Road Kokomo, Indiana 46902 Tel: 765-864-8360 Fax: 765-864-8387 France Microchip Technology SARL Parc d'Activite du Moulin de Massy 43 Rue du Saule Trapu Batiment A - ler Etage 91300 Massy, France Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Los Angeles 18201 Von Karman, Suite 1090 Irvine, CA 92612 Tel: 949-263-1888 Fax: 949-263-1338 China - Shenzhen Microchip Technology Consulting (Shanghai) Co., Ltd., Shenzhen Liaison Office Rm. 1315, 13/F, Shenzhen Kerry Centre, Renminnan Lu Shenzhen 518001, China Tel: 86-755-2350361 Fax: 86-755-2366086 New York 150 Motor Parkway, Suite 202 Hauppauge, NY 11788 Tel: 631-273-5305 Fax: 631-273-5335 Germany Microchip Technology GmbH Gustav-Heinemann Ring 125 D-81739 Munich, Germany Tel: 49-89-627-144 0 Fax: 49-89-627-144-44 San Jose Microchip Technology Inc. 2107 North First Street, Suite 590 San Jose, CA 95131 Tel: 408-436-7950 Fax: 408-436-7955 China - Hong Kong SAR Microchip Technology Hongkong Ltd. Unit 901-6, Tower 2, Metroplaza 223 Hing Fong Road Kwai Fong, N.T., Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Italy Microchip Technology SRL Centro Direzionale Colleoni Palazzo Taurus 1 V. Le Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883 Toronto 6285 Northam Drive, Suite 108 Mississauga, Ontario L4V 1X5, Canada Tel: 905-673-0699 Fax: 905-673-6509 India Microchip Technology Inc. India Liaison Office Divyasree Chambers 1 Floor, Wing A (A3/A4) No. 11, O'Shaugnessey Road Bangalore, 560 025, India Tel: 91-80-2290061 Fax: 91-80-2290062 United Kingdom Microchip Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44 118 921 5869 Fax: 44-118 921-5820 Austria Microchip Technology Austria GmbH Durisolstrasse 2 A-4600 Wels Austria Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 05/16/02 DS21669B-page 32 2002 Microchip Technology Inc. |
Price & Availability of MCP6041
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |