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UC1856 UC2856 UC3856
Improved Current Mode PWM Controller
FEATURES
* * Pin-for-Pin Compatible With the UC3846 65ns Typical Delay From Shutdown to Outputs, and 50ns Typical Delay From Sync to Outputs Improved Current Sense Amplifier With Reduced Noise Sensitivity Differential Current Sense with 3V Common Mode Range Trimmed Oscillator Discharge Current for Accurate Deadband Control Accurate 1V Shutdown Threshold High Current Dual Totem Pole Outputs (1.5A peak) TTL Compatible Oscillator SYNC Pin Thresholds 4kV ESD Protection
DESCRIPTION
The UC3856 is a high performance version of the popular UC3846 series of current mode controllers, and is intended for both design upgrades and new applications where speed and accuracy are important. All input to output delays have been minimized, and the current sense output is slew rate limited to reduce noise sensitivity. Fast 1.5A peak output stages have been added to allow rapid switching of power FETs. A low impedance TTL compatible sync output has been implemented with a tri-state function when used as a sync input. Internal chip grounding has been improved to minimize internal "noise" caused when driving large capacitive loads. This, in conjunction with the improved differential current sense amplifier results in enhanced noise immunity. Other features include a trimmed oscillator current (8%) for accurate frequency and dead time control; a 1V, 5% shutdown threshold; and 4kV minimum ESD protection on all pins.
* * * * * * *
BLOCK DIAGRAM
UDG-96176
9/96
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UC1856 UC2856 UC3856 ABSOLUTE MAXIMUM RATINGS
Supply Voltage ....................................................................+40V Collector Supply Voltage .....................................................+40V Output Current, Source or Sink DC...................................................................................0.5A Pulse (0.5s)...................................................................2.0A Error Amp Inputs....................................................-0.3V to +VIN Shutdown Input.....................................................-0.3V to +10V Current Sense Inputs..............................................-0.3V to +3V SYNC Output Current ......................................................10mA Error Amplifier Output Current ...........................................-5mA Soft Start Sink Current.......................................................50mA Oscillator Charging Current .................................................5mA Power Dissipation at TA = 25C (Note 2).......................1000mW Power Dissipation at TC = 25C (Note 2) ......................2000mW Junction Temperature .......................................-55C to +150C Storage Temperature Range ............................-65C to +150C Lead Temperature (Soldering, 10 sec.) ...........................+300C All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Consult packaging section of databook for thermal limitations and considerations of package. PLCC-28 (Top View) QP PACKAGE
CONNECTION DIAGRAMS
DIL-16, SOIC-16 (Top View) J or N, DW PACKAGE
PLCC-20 (Top View) Q PACKAGE
ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = -55C to +125C for UC1856; - 40C to +85C for the UC2856; and 0C to +70C for the UC3856, VIN = 15V, RT = 10k, CT = 1nF, TA = TJ.
PARAMETER Reference Section Output Voltage Line Regulation Load Regulation Total Output Variation Output Noise Voltage Long Term Stability Short Circuit Current Oscillator Section Initial Accuracy TEST CONDITIONS TJ = 25C, Io = 1mA VIN = 8V to 40V Io = -1mA to -10mA Line, Load, and Temperature 10Hz < f < 10kHz, TJ = 25C TJ = 125C, 1000 Hrs (Note 2) VREF = 0V TJ = 25C Over Operating Range UC1856/UC2856 MIN TYP MAX 5.05 5.10 5.15 20 15 5.20 25 -65 220 230 MIN 5.00 UC3856 TYP MAX UNITS 5.10 5.20 20 15 5.25 25 -65 220 230 V mV mV V V mV mA kHz kHz
5.00 50 5 -45 200
4.95 50 5 -45 200
-25 180 170
-25 180 170
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UC1856 UC2856 UC3856 ELECTRICAL CHARACTERISTICS (cont.) Unless otherwise stated, these specifications apply for TA = -55C to
UC1856/UC2856 MIN TYP MAX 2 8.8 8.8 0.4 2.0 0.8 10 100 +125C for UC1856; - 40C to +85C for the UC2856; and 0C to +70C for the UC3856, VIN = 15V, RT = 10k, CT = 1nF, TA = TJ. PARAMETER Oscillator Section (cont.) Voltage Stability Discharge Current Sync Output High Level Sync Output Low Level Sync Input High Level Sync Input Low Level Sync Input Current Sync Delay to Outputs Error Amplifier Section Input Offset Voltage Input Bias Current Input Offset Current Common Mode Range Open Loop Gain Unity Gain Bandwidth CMRR PSRR Output Sink Current Output Source Current Output High Level Output Low Level Current Sense Amplifier Section Amplifier Gain Maximum Differential Input Signal (VCS+ - Vcs-) Input Offset Voltage CMRR PSRR Input Bias Current Input Offset Current Input Common Mode Range Delay to Outputs Current Limit Adjust Section Current Limit Offset Input Bias Current Shutdown Terminal Section Threshold Voltage Input Voltage Range TEST CONDITIONS VIN = 8V to 40V TJ = 25C, VCT = 2V VCT = 2V Io = -1mA Io = +1mA CT = 0V, RT = VREF CT = 0V, RT = VREF CT = 0V, RT = VREF VSYNC = 5V CT = 0V, RT = VREF VSYNC = 0.8V to 2V VCM = 2V MIN UC3856 TYP MAX UNITS 2 8.8 8.8 0.4 % mA mA V V V 0.8 10 100 V A ns
7.5 6.7 2.4 2.0
8.0 8.0 3.6 0.2 1.5 1.5 1 50
7.5 6.7 2.4
8.0 8.0 3.6 0.2 1.5 1.5 1 50
VIN = 8V to 40V Vo = 1.2V to 3V TJ = 25C VCM = 0V to 38V, VIN = 40V VIN = 8V to 40V VID = -15mV, VcOMP = 1.2V VID = 15mV, VCOMP = 2.5V VID = 50mV, RL (COMP) = 15k VID = -50mV, RL (COMP) = 15k VCS- = 0V, CL SS Open (Notes 3,4) CL SS Open (Note 3) RL (COMP) = 15k VCL SS = 0.5V COMP Open (Note 3) VCM = 0V to 3V VIN = 8V to 40V VCL SS = 0.5V, COMP Open (Note 3) VCL SS = 0.5V, COMP Open (Note 3) VEA+ = VREF, EA- = 0V CS+ - CS- = 0V to 1.5V VCS- = 0V VCS+ = 0V, COMP = Open (Note 3) VEA+ = VREF, VEA- = 0V
0 80 1 75 80 5 -0.4 4.3
5 -1 500 VIN - 2 100 1.5 100 100 10 -0.5 4.6 0.7 2.75 1.2 5 35
4.9 1 3.0
0 80 1 75 80 5 -0.4 4.3
10 -1 500 VIN - 2 100 1.5 100 100 10 -0.5 4.6 0.7 2.75 1.2 5 35
4.9 1 3.0
mV A nA V dB MHz dB dB mA mA V V V/V V mV dB dB A mA V ns
2.5 1.1
2.5 1.1
60 60 -1 1 3 250
60 60 -3 0
-1
0 120
120
-3 1 3 250
0.43
0.5 -10
0.57 -30 1.05 5
0.43
0.5 -10
0.57 -30 1.05 5
V A V V
0.95 0
1.00
0.95 0
1.00
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UC1856 UC2856 UC3856 ELECTRICAL CHARACTERISTICS (cont.) Unless otherwise stated, these specifications apply for TA = -55C to +125C for UC1856; - 40C to +85C for the UC2856; and 0C to +70C for the UC3856, VIN = 15V, RT = 10k, CT = 1nF, TA = TJ.
PARAMETER TEST CONDITIONS Shutdown Terminal Section (cont.) Minimum Latching (Note 5) Current (ICL SS) Maximum Non-Latching Current (ICL SS) Delay to Outputs Output Section Collector-Emitter Voltage Off-State Bias Current Output Low Level Output High Level VC = 40V IOUT = 20mA IOUT = 200mA IOUT = -20mA IOUT = -200mA C1 = 1nF C1 = 1nF VIN = 0V, IOUT = 20mA 40 0.1 0.5 13.2 13.1 40 40 0.8 250 0.5 2.6 12.5 12 40 0.1 0.5 13.2 13.1 40 40 0.8 250 0.5 2.6 V A V V V V ns ns V % % V V mA (Note 6) VSHUTDOWN = 0 to 1.3V UC1856/UC2856 MIN TYP MAX 3 1.5 1.5 65 0.8 110 MIN 3 UC3856 TYP MAX UNITS 1.5 1.5 65 0.8 110 mA mA ns
12.5 12
Rise Time 80 80 Fall Time 80 80 UVLO Low Saturation 1.5 1.5 PWM Section Maximum Duty Cycle 45 47 50 45 47 50 Minimum Duty Cycle 0 0 Undervoltage Lockout Section Startup Threshold 7.7 8.0 7.7 8.0 Threshold Hysterisis 0.7 0.7 Total Standby Current Supply Current 18 23 18 23 Note 1: All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal. Note 2: This parameter, although guaranteed over the recommended operating conditions is not 100% tested in production. Note 3: Parameter measured at trip point of latch with VEA+ = VREF, VEA- = 0V. Note 4: Amplifier gain defined as: VCOMP G= ; VCS- = 0V to 1.0V VCS+ Note 5: Current into CL SS guaranteed to latch circuit into shutdown state. Note 6: Current into CL SS guaranteed not to latch circuit into shutdown state.
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UC1856 UC2856 UC3856 APPLICATIONS INFORMATION
Oscillator Circuit
2CT Output deadtime is determined by size of the external capacitor, CT, according to the formula: Td = 3.6 8mA -........ For large values of RT: Td = 250CT RT 2 Oscillator frequency is approximated by the formula: fT = RT CT
UDG-96177
Error Amplifier Output Configuration
Error Amplifier Gain and Phase vs Frequency
OPEN-LOOP VOLTAGE GAIN (dB) 80 60 40 20 0
VIN=20V o TJ =25
100
1k
10k
100k
1M
-180
OPEN-LOOP PHASE 0o -90o
o
Error Amplifier can source up to 0.5mA.
UDG-96178
FREQUENCY (Hz)
UDG-96179
Error Amplifier Open-Loop D.C. Gain vs Load Resistance
OPEN-LOOP VOLTAGE GAIN (dB) 110 VIN=20V o TJ =25 100
90
80
70 0 10 20 30 40 50 60 70 80 90 100
UDG-96180
OUTPUT LOAD RESISTANCE RL (k-OHMS)
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UC1856 UC2856 UC3856 APPLICATIONS INFORMATION (cont.)
Parallel Operation
Slaving allows parallel operation of two or more units with equal current sharing.
UDG-96181
Pulse by Pulse Current Limiting
Peak current (IS) is determined by the formula: IS =
R2 ( R1 VREF )-0.5 + R2 3RS
UDG-96182
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UC1856 UC2856 UC3856 APPLICATIONS DATA (cont.)
UDG-96183
UDG-96184
VREF < 0.8mA, the shutdown latch will commutate R1 when ISS = 0.8mA and a restart cycle will be initiated. If
VREF < 3mA, the device will latch off until power is R1 recycled. If
Current Sense Amplifier Connections
A small RC filter may be required in some applications to reduce switch transients. Differential input allows remote, noise sensing.
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UDG-96185
7
UC1856 UC2856 UC3856 APPLICATIONS INFORMATION (cont.)
UC1856 Open Loop Test Circuit
- BYPASS CAPS SHOULD BE LOW ESR & ESL TYPE - SHORT E/A- & COMP FOR UNITY GAIN TESTING THE USE OF A GROUND PLANE IS HIGHLY RECOMMENDED
UDG-96186
UNITRODE INTEGRATED CIRCUITS 7 CONTINENTAL BLVD. * MERRIMACK, NH 03054 TEL. 603-424-2410 * FAX 603-424-3460
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IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 1999, Texas Instruments Incorporated
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