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LR38581
LR38581
DESCRIPTION
Timing Generator IC for 270 k/320 k-pixel Color CCDs with Dual-power-supply Operation
PIN CONNECTIONS
48-PIN QFP
GND FH2B FH2 FH1 VDD5 GND FH1B FR TVMD PLCH TST4
The LR38581 is a CMOS timing generator IC which generates timing pulses for driving 270 k/320 kpixel color CCD area sensors with a dual-powersupply operation and processing pulses for color video signals.
TOP VIEW
TST3 36 SAD2 35 SAD1 34 HP 33 VD 32 ADCK 31 GND 30 VDD3 29 CDCK 28 SGCK 27 GND 26 CKO 25 CKI
48 47 46 45 44 43 42 41 40 39 38 37 OBCP 1 CLP 2 PBLK 3 FS 4 FCDS 5 RS 6 GND 7 VDD3 8 ED0 9 ED1 10 ED2 11 MIR 12 13 14 15 16 17 18 19 20 21 22 23 24 TST1 TST2 VDD5 V1 V2 V3 V4 NC GND VTG VDD12 OFD
FEATURES
* Designed for 270 k/320 k-pixel color CCD area sensors with a dual-power-supply-operation * Switchable between NTSC and PAL modes * Switchable between normal and mirror images * Level shifter for readout and shutter pulses included * +3.3 V, +5 V and +12.5 V power supplies * Package : 48-pin QFP (QFP048-P-0707) 0.5 mm pin-pitch
(QFP048-P-0707)
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
1
LR38581
BLOCK DIAGRAM
SGCK CDCK ADCK SAD2 SAD1 GND GND CKO VDD3 CKI 25 HP VD 33
36
35
34
32
31
30
29
28
27
26
TST3 37 TST4 38 PLCH 39 TVMD 40 FR 41 H COUNTER FH1B 42 GND 43 VDD5 44 SHUTTER CONTROL FH1 45 FH2 46 FH2B 47 GND 48 V COUNTER DECODER & LATCH RESET 1/4 PRESET 1/2
OSC
24 OFD 23 VDD12 22 VTG 21 GND 20 NC 19 V4 18 V3 17 V2 16 V1 15 VDD5
LEVEL SHIFTER (12.5 V)
LEVEL SHIFTER
LEVEL SHIFTER
MIX
1/3 14 TST2 13 TST1
1 OBCP
2 CLP
3 PBLK
4 FS
5 FCDS
6 RS
7 GND
8 VDD3
9 ED0
10 ED1
11 ED2
12 MIR
2
LR38581
PIN DESCRIPTION
PIN NO. SYMBOL 1 OBCP I/O O4MA3 POLARITY PIN NAME Optical black clamp pulse output AD input signal clamp pulse output Pre-blanking pulse output CDS pulse output 1 DESCRIPTION A pulse to clamp the optical black signal. This pulse stays low during the absence of effective pixels within the vertical blanking. The polarity can be changed by PLCH (pin 39). A pulse to clamp the AD input signal. The polarity can be changed by PLCH (pin 39). A pulse that corresponds to the cease period of the horizontal transfer pulse. A pulse to sample-hold the signal from CCD. 4 FS O4MA32 The polarity can be changed by PLCH (pin 39). The output phase of FS is selected by serial data. A pulse to clamp the feed-through level from CCD. The polarity can be changed by PLCH (pin 39). The output phase of FCDS is selected by serial data. 6 7 8 9 RS GND VDD3 ED0 O4MA32 - - ICSU3 - - - S/H pulse output Ground Power supply Shift register clock input Shift register data input Strobe pulse input A pulse to sample-hold the signal from CDS circuit. The polarity can be changed by PLCH (pin 39). The output phase of RS is selected by serial data. A grounding pin. Supply of +3.3 V power. An input pin for the clock of the shift register, to control the functions of LR38581. For details, see "Serial Data Control." An input pin for the data of the shift register, to control the functions of LR38581. For details, see "Serial Data Control." An input pin for the strobe pulse, to control the functions of LR38581. For details, see "Serial Data Control." An input pin to select mirror or normal image mode Mirror mode selection L level H level or open MIR FH1B FH2B 13 14 15 16 17 18 TST1 TST2 VDD5 V1 V2 V3 ICD5 ICD5 - O4MA52 O4MA52 O4MA52 - - - Test pin 1 Test pin 2 Power supply Vertical transfer pulse output 1 Vertical transfer pulse output 2 Vertical transfer pulse output 3 : Normal image mode : Mirror image mode FH1 FH2 FH2 FH1
2 3
CLP PBLK
O4MA3 O4MA3
5
FCDS
O4MA32
CDS pulse output 2
10
ED1
ICSU3
-
11
ED2
ICSU3
-
12
MIR
ICU3
-
L (Normal mode) H or open (Mirror mode)
A test pin. Set open or to L level in the normal mode. A test pin. Set open or to L level in the normal mode. Supply of +5 V power. A pulse to drive vertical CCD shift register. Connect to OV1 pin of CCD. A pulse to drive vertical CCD shift register. Connect to OV2 pin of CCD. A pulse to drive vertical CCD shift register. Connect to OV3 pin of CCD.
3
LR38581
PIN NO. SYMBOL 19 20 21 22 23 24 V4 NC GND VTG VDD12 OFD I/O O4MA52 - - O12MHV - O12MHV - - - POLARITY PIN NAME Vertical transfer pulse output 4 No connection Ground Readout pulse output Power supply OFD pulse output DESCRIPTION A pulse to drive vertical CCD shift register. Connect to OV4 pin of CCD. No connection A grounding pin. A pulse that transfers the charge of the photo-diode to the vertical shift register. Connect to VTG pin of CCD. Supply of +12.5 V power. A pulse that sweeps the charge of the photo-diode for electronic shutter. Connect to OFD pin of CCD. Held at L level at normal mode. An input pin for reference clock oscillation. Connect to CKO (pin 26) with R. The frequencies are as follows : 25 CKI OSCI3 - Clock input TVMD L H Frequency 28.63636 MHz (1820 fH) 28.37500 MHz (1816 fH) fH = Horizontal frequency 26 27 CKO GND OSCO3 - - - Clock output Ground An output pin for reference clock oscillation. The output is the inverse of CKI (pin 25). A grounding pin. An output pin to generate HP and VD pulses. The frequencies are as follows : 28 SGCK O4MA32 SSG clock output TVMD L H Frequency 14.31818 MHz (910 fH) 14.18750 MHz (908 fH)
An output pin for DSP IC. The frequencies are as follows : 29 CDCK O4MA32 DSP clock output TVMD L H 30 31 VDD3 GND - - - - Power supply Ground Frequency 9.5035 MHz (1820/3 fH) 9.4375 MHz (1816/3 fH)
Supply of +3.3 V power. A grounding pin. An output pin for AD converter. The frequencies are as follows : TVMD L H and SAD2 (pin 36). Frequency 9.5035 MHz (1820/3 fH) 9.4375 MHz (1816/3 fH)
32
ADCK
O4MA32
AD clock output
The output phase of ADCK is selected by SAD1 (pin 35)
4
LR38581
PIN NO. SYMBOL 33 34 35 36 37 38 39 VD HP SAD1 SAD2 TST3 TST4 PLCH I/O IC3 IC3 ICU3 ICU3 ICD5 ICD5 ICU5 - - - - - POLARITY PIN NAME Vertical reference pulse input DESCRIPTION An input pin for reference of vertical pulse. Connect to VD pin of DSP IC.
Horizontal reference An input pin for reference of horizontal pulse. pulse input Connect to HD pin of DSP IC. ADCK phase control An input pin to select the phase of ADCK. L H or open L H or open SAD1 input 1 ADCK phase control input 2 Test pin 3 Test pin 4 Polarity selection input TV mode selection input SAD2 Phase L 0 L H or open H or open 60 delay 180 delay 240 delay
A test pin. Set open or to L level in the normal mode. A test pin. Set open or to L level in the normal mode. An input pin to select the polarity of OBCP (pin 1), CLP (pin 2), FS (pin 4), FCDS (pin 5) and RS (pin 6). An input pin to select TV standards. L level H level or open : NTSC mode : PAL mode
40
TVMD
ICU5
-
A pulse to reset the charge of output circuit. 41 FR O4MA53 Reset pulse output Horizontal transfer pulse output 1B - - Ground Power supply Horizontal transfer pulse output 1 Horizontal transfer pulse output 2 Horizontal transfer pulse output 2B - Ground Connect to OR pin of CCD through the DC offset circuit. The output phase of FR is selected by serial data. A pulse to drive horizontal CCD shift register. Connect to OH1B pin of CCD. A grounding pin. Supply of +5 V power. A pulse to drive horizontal CCD shift register. Connect to OH1 pin of CCD. A pulse to drive horizontal CCD shift register. Connect to OH2 pin of CCD. A pulse to drive horizontal CCD shift register. Connect to OH2B pin of CCD. A grounding pin.
O4MA32 O4MA52 O4MA53 O12MHV OSCI3 OSCO3 : : : : : : Output pin (VDD = 3.3 V) Output pin (VDD = 5 V) Output pin (VDD = 5 V) Output pin (VDD = 12.5 V) Input pin for oscillation Output pin for oscillation
42 43 44 45 46 47 48
IC3 ICU3 ICSU3
FH1B GND VDD5 FH1 FH2 FH2B GND
O4MA52 - - O4MA53 O4MA53 O4MA52 -
ICU5 ICD5 O4MA3
: Input pin (CMOS level) : Input pin (CMOS level with pull-up resistor) : Input pin (CMOS schmitt-trigger level with pull-up resistor) : Input pin (CMOS level with pull-up resistor) : Input pin (CMOS level with pull-up resistor) : Output pin (VDD = 3.3 V)
5
LR38581
Serial Data Control
SERIAL DATA INPUT TIMING
ED0 ED1 D00 D01 D02 D03 D04 D05 D06 D07 D08 D09 D10 D11 D12 D13 D14 D15 D16 D17 D18 ED2
The serial data ED1 is shifted by ED0 and is latched at the rising edge of ED2. The shutter mode data SMD1 and SMD2 of serial data are latched at the rising edge of the horizontal SERIAL DATA INPUTS
DATA D00 D01 D02 D03 D04 D05 D06 D07 D08 NAME SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 Electronic shutter speed control FUNCTIONS
line in which VTG is active, the shutter speed data SD0 to SD8 are latched at the rising edge of the next horizontal line in which VTG is active.
DATA D09 D10 D11 D12 D13 D14 D15 D16 D17 D18
NAME SMD1 SMD2 MR1 MR2 MC1 MC2 MS1 MS2 MF1 MF2
FUNCTIONS Electronic shutter mode control
Phase control
ABSOLUTE MAXIMUM RATINGS
PARAMETER Supply voltage Input voltage SYMBOL VDD3, VDD5 VDD12 VI3 VI5 VO3 Output voltage Operating temperature Storage temperature VO5 VO12 TOPR TSTG RATING -0.3 to +6.0 -0.3 to +15.0 -0.3 to VDD3 + 0.3 -0.3 to VDD5 + 0.3 -0.3 to VDD3 + 0.3 -0.3 to VDD5 + 0.3 -0.3 to VDD12 + 0.3 -20 to +70 -55 to +150 UNIT V V V V V V V C C
6
LR38581
ELECTRICAL CHARACTERISTICS DC Characteristics
PARAMETER Input "Low" voltage Input "High" voltage Input "Low" voltage Input "High" voltage Input "Low" voltage Input "High" voltage Hysteresis voltage Input "Low" current Input "High" current Input "Low" current Input "High" current Input "Low" current Input "High" current Input "Low" current Input "High" current Output "Low" voltage Output "High" voltage Output "Low" voltage Output "High" voltage Output "Low" voltage Output "High" voltage Output "Low" voltage Output "High" voltage Output "Low" voltage Output "High" voltage Output "Low" voltage Output "High" voltage
(VDD3 = 3.30.33 V, VDD5 = 5.00.5 V, VDD12 = 12.50.5 V, TOPR = -20 to +70 C)
SYMBOL VIL3 VIH3 VIL5 VIH5 VT+ VT- VT+ - VT- |IIL3-1| |IIH3-1| |IIL3-2| |IIH3-2| |IIL5-1| |IIH5-1| |IIL5-2| |IIH5-2| VOL3-1 VOH3-1 VOL3-2 VOH3-2 VOL3-3 VOH3-3 VOL5-1 VOH5-1 VOL5-2 VOH5-2 VOL12 VOH12 VI = 0 V VI = VDD3 VI = 0 V VI = VDD3 VI = 0 V VI = VDD5 VI = 0 V VI = VDD5 IOL = 1.5 mA IOH = -1.5 mA IOL = 2 mA IOH = -1.5 mA IOL = 4 mA IOH = -3 mA IOL = 9 mA IOH = -6 mA IOL = 12 mA IOH = -9 mA IOL = 12 mA IOH = -12 mA
7. 8. 9. 10. 11. Applied Applied Applied Applied Applied to to to to to
CONDITIONS
MIN. 0.7VDD3
TYP.
MAX. UNIT 0.3VDD3 V 1.5 V V V V V 1.0 V A A A A A A A A V V V V V V 0.4 V V V V V V
NOTE 1, 2 4, 5
3.5 0.75VDD3 0.02VDD3 0.045VDD3 1.0 30 2.0 8.0 60 2.0 2.0 60 0.4 VDD3 - 0.5 0.4 VDD3 - 0.5 0.4 VDD3 - 0.5 VDD5 - 0.5 0.4 VDD5 - 0.5 0.4 VDD12 - 0.5
output output output output output (O4MA3). (O4MA32). (O4MA52). (O4MA53). (O12MHV).
3
1 2, 3 4 5 6 7 8 9 10 11
3.0
8.0
NOTES :
1. 2. 3. 4. 5. 6. Applied to inputs (IC3, OSCI3). Applied to input (ICU3). Applied to input (ICSU3). Applied to input (ICU5). Applied to input (ICD5). Applied to output (OSCO3). (Output (OSCO3) measures on condition that input (OSCI3) level is 0 V or VDD3.)
7
PACKAGES FOR CCD AND CMOS DEVICES
PACKAGE
48 QFP (QFP048-P-0707)
(Unit : mm)
0.5TYP. 36 M 37 0.08
0.20.08 (1.0) 25 24 7.00.2 9.00.3
0.150.05
1 (1.0)
7.00.2 9.00.3
12 (1.0)
(1.0)
48
13
0.650.2 1.450.2 0.10.1
8
Package base plane
8.00.2
0.1

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