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TPS79501, TPS79516 TPS79518, TPS79525 TPS79530, TPS79533
SLVS350B - OCTOBER 2002 - REVISED OCTOBER 2004
ULTRALOW-NOISE, HIGH PSRR, FAST RF 500-mA LOW-DROPOUT LINEAR REGULATORS
FEATURES
* * * * * * * * * * * * * * 500-mA Low-Dropout Regulator With Enable Available in 1.6-V, 1.8-V, 2.5-V, 3-V, 3.3-V, and Adjustable (1.2-V to 5.5-V) High PSRR (50 dB at 10 kHz) Ultralow Noise (33 VRMS, TPS79530) Fast Start-Up Time (50 s) Stable With a 1-F Ceramic Capacitor Excellent Load/Line Transient Response Very Low Dropout Voltage (110 mV at Full Load, TPS79530) 6-Pin SOT223-6 Package
DESCRIPTION
The TPS795xx family of low-dropout (LDO) low-power linear voltage regulators features high power-supply rejection ratio (PSRR), ultralow noise, fast start-up, and excellent line and load transient responses in a small outline, SOT223-6, package. Each device in the family is stable with a small 1-F ceramic capacitor on the output. The family uses an advanced, proprietary BiCMOS fabrication process to yield extremely low dropout voltages (for example, 110 mV at 500 mA). Each device achieves fast start-up times (approximately 50 s with a 0.001-F bypass capacitor) while consuming very low quiescent current (265 A typical). Moreover, when the device is placed in standby mode, the supply current is reduced to less than 1 A. The TPS79530 exhibits approximately 33 VRMS of output voltage noise at 3.0 V output with a 0.1-F bypass capacitor. Applications with analog components that are noise sensitive, such as portable RF electronics, benefit from the high PSRR and low noise features, as well as the fast response time.
TPS79530
APPLICATIONS
RF: VCOs, Receivers, ADCs Audio BluetoothTM, Wireless LAN Cellular and Cordless Telephones Handheld Organizers, PDAs
TPS79530
RIPPLE REJECTION vs FREQUENCY
80 Output Spectral Noise Density - V//Hz
OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY
0.5 VIN = 5.5 V COUT = 2.2 F CNR = 0.1 F
Ripple Rejection - dB
DCQ PACKAGE SOT223-6 (TOP VIEW) EN IN GND OUT NR/FB
1 2 3 4 5
70 60 50 40 30 20 10 0 1
VIN = 4 V COUT = 10 F CNR = 0.01 F
IOUT = 1 mA
0.4
0.3
IOUT = 1 mA
6 GND
IOUT = 500 mA
0.2 IOUT = 0.5 A
0.1
10
100 1 k 10 k 100 k 1 M Frequency (Hz)
10 M
0 100
1k 10 k Frequency (Hz)
100 k
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Bluetooth is a trademark of Bluetooth SIG, Inc. All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 2002-2004, Texas Instruments Incorporated
TPS79501, TPS79516 TPS79518, TPS79525 TPS79530, TPS79533
SLVS350B - OCTOBER 2002 - REVISED OCTOBER 2004
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. AVAILABLE OPTIONS
PRODUCT TPS79501 TPS79516 TPS79518 TPS79525 TPS79530 TPS79533 VOLTAGE 1.2 to 5.5 V 1.6 V 1.8 V SOT223-6 2.5 V 3V 3.3 V -40C to 125C PS79525 PS79530 PS79533 PACKAGE TJ SYMBOL PS79501 PS79516 PS79518 PART NUMBER TPS79501DCQ TPS79501DCQR TPS79516DCQ TPS79516DCQR TPS79518DCQ TPS79518DCQR TPS79525DCQ TPS79525DCQR TPS79530DCQ TPS79530DCQR TPS79533DCQ TPS79533DCQR TRANSPORT MEDIA, QUANTITY Tube, 78 Tape and Reel, 2500 Tube, 78 Tape and Reel, 2500 Tube, 78 Tape and Reel, 2500 Tube, 78 Tape and Reel, 2500 Tube, 78 Tape and Reel, 2500 Tube, 78 Tape and Reel, 2500
ABSOLUTE MAXIMUM RATINGS
over operating temperature (unless otherwise noted) (1)
UNIT VIN range VEN range VOUT range Peak output current ESD rating, HBM ESD rating, CDM Continuous total power dissipation Junction temperature range, TJ Storage temperature range, Tstg (1) -0.3 V to 6 V -0.3 V to VIN + 0.3 V 6V Internally limited 2 kV 500 V See Dissipation Rating Table -40C to 150C -65C to 150C
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied.
DISSIPATION RATING TABLE
PACKAGE SOT223 (1) BOARD Low K (1) RJC 15C/W RJA 53C/W
The JEDEC low-K (1s) board design used to derive this data was a 3-inch x 3-inch (7.5 cm x 7.5cm), two-layer board with 2-ounce copper traces on top of the board.
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ELECTRICAL CHARACTERISTICS
Over recommended operating temperature range (TJ = -40C to 125C), VEN = VIN, VIN = VOUT(nom) + 1 V, IOUT = 1mA, COUT = 10F, CNR = 0.01 F, unless otherwise noted. Typical values are at 25C.
PARAMETER Input voltage, VIN (1) Continuous output current, IOUT TPS79516 TPS79518 Output voltage TPS79525 TPS79530 TPS79533 Output voltage line regulation (VOUT%/VIN) (1) Load regulation (VOUT%/IOUT) Dropout voltage (2) VIN = VOUT(nom) - 0.1 V Output current limit Ground pin current Shutdown current (3) FB pin current TPS79530 TPS79533 0 A< IOUT < 500 mA, 0 A< IOUT < 500 mA, 0 A< IOUT < 500 mA, 0 A< IOUT < 500 mA, 0 A< IOUT < 500 mA, VOUT + 1 V < VIN 5.5 V 0 A < IOUT < 500 mA, IOUT = 500 mA IOUT = 500 mA VOUT = 0 V 0 A< IOUT < 500 mA VEN = 0 V, VFB = 1.8 V f = 100 Hz, Power supply ripple rejection TPS79530 f = 100 Hz, f = 10 kHz, f = 100 kHz, IOUT = 10 mA IOUT = 500 mA IOUT = 500 mA IOUT = 500 mA CNR = 0.001 F Output noise voltage (TPS79530) BW = 100 Hz to 100 kHz, IOUT = 500 mA CNR = 0.0047 F CNR = 0.01 F CNR = 0.1 F CNR = 0.001 F Time, start-up (TPS79530) High-level enable input voltage Low-level enable input voltage EN pin current UVLO threshold UVLO hysteresis (1) (2) (3) Minimum VIN is 2.7 V or VOUT + VDO, whichever is greater. Dropout is not measured for the TPS79501 and TPS79525 since minimum VIN = 2.7 V. For adjustable version, this applies only after VIN is applied; then VEN transitions high to low. RL = 6 , COUT = 1 F 2.7 V < VIN < 5.5 V 2.7 V < VIN < 5.5 V VEN = 0 V VCC rising 1 2.25 100 CNR = 0.0047 F CNR = 0.01 F 1.7 59 58 50 39 46 41 35 33 50 75 110 VIN 0.7 1 2.65 V V A V mV s VRMS dB 2.7 V < VIN < 5.5 V 2.4 TJ = 25C 2.6 V < VIN < 5.5 V 2.8 V < VIN < 5.5 V 3.5 V < VIN < 5.5 V 4 V < VIN < 5.5 V 4.3 V < VIN < 5.5 V TEST CONDITIONS MIN 2.7 0 1.568 1.764 2.45 2.94 3.234 1.6 1.8 2.5 3.0 3.3 0.05 3 110 105 2.8 265 0.07 170 160 4.2 385 1 1 TYP MAX 5.5 500 1.632 1.836 2.55 3.06 3.366 0.12 %/V mV mV A A A A V UNIT V mA
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SLVS350B - OCTOBER 2002 - REVISED OCTOBER 2004
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FUNCTIONAL BLOCK DIAGRAM--ADJUSTABLE VERSION
IN UVLO Current Sense ILIM GND EN Thermal Shutdown Bandgap Reference 1.225 V UVLO R2 Quickstart 250 k VREF External to the Device _ SHUTDOWN + FB R1 OUT
VIN
FUNCTIONAL BLOCK DIAGRAM--FIXED VERSION
IN UVLO GND EN Thermal Shutdown Quickstart Bandgap Reference 1.225 V R2 = 40k 250 k VREF NR Current Sense ILIM _ UVLO R2 SHUTDOWN + R1 OUT
VIN
Table 1. Terminal Functions
TERMINAL NAME NR EN FB GND IN OUT ADJ N/A 1 5 3, TAB 2 4 FIXED 5 1 N/A 3, TAB 2 4 DESCRIPTION Connecting an external capacitor to this pin bypasses noise generated by the internal bandgap. This improves power-supply rejection and reduces output noise. Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown mode. EN can be connected to IN if not used. This terminal is the feedback input voltage for the adjustable device. Regulator ground Unregulated input to the device. Output of the regulator.
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TYPICAL CHARACTERISTICS
TPS79530 OUTPUT VOLTAGE vs OUTPUT CURRENT
3.02 3.005 3 3.01 2.995 2.99 3 VOUT (V) 2.985 2.98 2.975 2.98 0 0.1 0.2 0.3 IOUT (mA) 0.4 0.5 2.97 -40 -25 -10 5 20 35 50 65 80 95 110 125 TJ (C) IOUT = 0.5 A VIN = 4 V COUT = 10 F IOUT = 1 mA IGND (A)
TPS79530 OUTPUT VOLTAGE vs JUNCTION TEMPERATURE
276 274 272 270
TPS79530 GROUND CURRENT vs JUNCTION TEMPERATURE
VIN = 4 V COUT = 10 F
IOUT = 1 mA
VOUT (V)
268 266 264 262 260 -40 -25 -10 5 20 35 50 65 80 95 110 125 TJ (C) IOUT = 0.5 A
2.99
Figure 1. TPS79530 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY
0.5 Output Spectral Noise Density - V//Hz Output Spectral Noise Density - V//Hz VIN = 5.5 V COUT = 2.2 F CNR = 0.1 F 0.6
Figure 2. TPS79530 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY
2.5 VIN = 5.5 V COUT = 10 F CNR = 0.1 F IOUT = 1 mA Output Spectral Noise Density - V//Hz
Figure 3. TPS79530 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY
VIN = 5.5 V IOUT = 500 mA COUT= 10 F
0.4
0.5 0.4 0.3
2
CNR = 0.001 F
0.3
IOUT = 1 mA
1.5
CNR = 0.0047 F CNR = 0.01 F
0.2 IOUT = 0.5 A
1
0.2 IOUT = 0.5 A 0.1 0 100
CNR = 0.1 F
0.1
0.5
0 100
1k 10 k Frequency (Hz)
100 k
1k
10 k
100 k
0 100
1k
10 k
100 k
Frequency (Hz)
Frequency (Hz)
Figure 4. TPS79530 ROOT MEAN SQUARED OUTPUT NOISE vs CNR
RMS - Root Mean Squared Output Noise - VRMS 50 IOUT = 500 mA COUT= 10 F 40
Figure 5.
Figure 6. TPS79530 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE
175 150 125 VDO (mV) VIN = 2.9 V COUT = 10 F IOUT = 500 mA
30
100 75 50
20
10 25 BW = 100 Hz to 100 kHz 0 0.001 0.01 0.0047 CNR (F) 0.1 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TJ (C)
Figure 7.
Figure 8. 5
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SLVS350B - OCTOBER 2002 - REVISED OCTOBER 2004
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TYPICAL CHARACTERISTICS (continued)
TPS79530 RIPPLE REJECTION vs FREQUENCY
80 70 Ripple Rejection - dB 60 50 40 30 20 10 0 1 10 100 1 k 10 k 100 k 1 M Frequency (Hz) 10 M IOUT = 500 mA VIN = 4 V COUT = 10 F CNR = 0.1 F 80 70 Ripple Rejection - dB IOUT = 1 mA 60 50 40 30 20 10 0 1 10 100 1 k 10 k 100 k 1 M Frequency (Hz) 10 M IOUT = 500 mA VIN = 4 V COUT = 10 F CNR = 0.01 F
TPS79530 RIPPLE REJECTION vs FREQUENCY
80 70 Ripple Rejection - dB IOUT = 1 mA 60 50 40 30
TPS79530 RIPPLE REJECTION vs FREQUENCY
VIN = 4 V COUT = 2.2 F CNR = 0.01 F IOUT = 1 mA
IOUT = 500 mA 20 10 0 1 10 100 1 k 10 k 100 k 1 M Frequency (Hz) 10 M
Figure 9. TPS79530 RIPPLE REJECTION vs FREQUENCY
80 70 Ripple Rejection - dB 60 50 VIN (V) 40 30 IOUT = 500 mA 20 10 0 1 10 100 1 k 10 k 100 k 1 M 10 M Frequency (Hz) VIN = 4 V COUT = 2.2 F CNR = 0.1 F IOUT = 1 mA 3 2.75 2.50 2.25 2 1.75 1.50 1.25 1
Figure 10.
Figure 11.
TPS79530 START-UP TIME
CNR = 0.001 F CNR = 0.0047 F CNR = 0.01 F Enable VOUT (mV) 20 10 0
TPS79518 LINE TRANSIENT RESPONSE
-10 -20 4 COUT = 10 F, CNR = 0.01 F, IOUT = 0.5 A, dv/dt = 1 V/s
0.50 0.25 0 0 100 200 300 t (s)
VIN = 4 V COUT = 10 F IOUT = 0.5 A 400 500 600
VIN (V)
0.75
3 2 0 50 100 t (s) 150 200
Figure 12. TPS79530 LINE TRANSIENT RESPONSE
30 WVOUT (mV) 20 VOUT (mV) 10 0 -10 -40 -20 5 4 3 0 50 100 t (s) 150 200 COUT = 10 F, CNR = 0.01 F, IOUT = 0.5 A, dv/dt = 1 V/s -60 IOUT (A) 0.5 0 -0.5 0 200 60 40 20 0
Figure 13. TPS79530 LOAD TRANSIENT RESPONSE
4.5 4 3.5 3 500 mV/Div 2.5 2 1.5 1 0.5 0 -0.5 400 t (s) 600 800 1000 0 1 2 3
Figure 14. TPS79525 POWER UP/POWER DOWN
VOUT = 2.5 V, RL = 10 VIN
-20
COUT = 10 F, CNR = 0.01 F, VL = 3.8 V, dv/dt = 0.5 A/s
VOUT
VIN (V)
4
5
6
7
8
9
10
200 s/Div
Figure 15.
Figure 16.
Figure 17.
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SLVS350B - OCTOBER 2002 - REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS (continued)
TPS79530 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT
100 COUT = 10 F, CNR = 0.01 F, IOUT = 50 mA TJ = 125C TJ = 25C VDO (mV) 100 VDO (mV) 100 80 60 40 20 0 0 100 200 300 IOUT (mA) 400 500 0 2.5 3 3.5 4 VIN (V) 4.5 5 0.01 0 100 200 300 IOUT (mA) 400 500 TJ = -40C TJ = 25C 150 TJ = 125C ESR (W) 1 10 COUT = 1 F
TPS79530 DROPOUT VOLTAGE vs OUTPUT CURRENT
180 160 140 120 200
TPS79501 DROPOUT VOLTAGE vs INPUT VOLTAGE
50
TJ = -40C
0.1
Figure 18.
Figure 19.
Figure 20.
TPS79530 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT
100 COUT = 2.2 F
TPS79530 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT
100 COUT = 10 F
10 ESR (W) ESR (W)
10
1
1
0.1
0.1
0.01 1 10 IOUT (mA) 100 1000
0.01 0 100 200 300 400 500 IOUT (A)
Figure 21.
Figure 22.
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SLVS350B - OCTOBER 2002 - REVISED OCTOBER 2004
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APPLICATION INFORMATION
The TPS795xx family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive equipment. The device features extremely low dropout voltages, high PSRR, ultralow output noise, low quiescent current (265 A typically), and enable input to reduce supply currents to less than 1 A when the regulator is turned off. A typical application circuit is shown in Figure 23.
VIN 1 F IN EN GND OUT TPS795xx NR 0.01F 2.2F VOUT
because any leakage current creates an IR drop across the internal resistor thus creating an output error. Therefore, the bypass capacitor must have minimal leakage current. The bypass capacitor should be no more than 0.1-F in order to ensure that it is fully charged during the quickstart time provided by the internal switch shown in the functional block diagram. For example, the TPS79530 exhibits only 33 VRMS of output voltage noise using a 0.1-F ceramic bypass capacitor and a 10-F ceramic output capacitor. Note that the output starts up slower as the bypass capacitance increases due to the RC time constant at the bypass pin that is created by the internal 250-k resistor and external capacitor.
Figure 23. Typical Application Circuit
Board Layout Recommendation to Improve PSRR and Noise Performance External Capacitor Requirements
A 1-F or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS795xx, is required for stability and improves transient response, noise rejection, and ripple rejection. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source. Like most low dropout regulators, the TPS795xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance is 1 F. Any 1 F or larger ceramic capacitor is suitable. The internal voltage reference is a key source of noise in an LDO regulator. The TPS795xx has an NR pin which is connected to the voltage reference through a 250-k internal resistor. The 250-k internal resistor, in conjunction with an external bypass capacitor connected to the NR pin, creates a low pass filter to reduce the voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator to operate properly, the current flow out of the NR pin must be at a minimum, To improve ac measurements like PSRR, output noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the ground pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the ground pin of the device.
Regulator Mounting
The tab of the SOT223-6 package is electrically connected to ground. For best thermal performance, the tab of the surface-mount version should be soldered directly to a circuit-board copper area. Increasing the copper area improves heat dissipation. Solder pad footprint recommendations for the devices are presented in an application bulletin Solder Pad Recommendations for Surface-Mount Devices, literature number AB-132, available from the TI web site (www.ti.com).
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Programming the TPS79501 Adjustable LDO Regulator
The output voltage of the TPS79501 adjustable regulator is programmed using an external resistor divider as shown in Figure 24. The output voltage is calculated using Equation 1:
V OUT VREF 1 * R1 R2
(1)
C1 *
(3 x 10 -7) x (R1 (R1 x R2)
R2)
(3)
The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is not used (such as in a unity-gain configuration) then the minimum recommended output capacitor is 2.2 F instead of 1 F.
where: * VREF = 1.2246 V typ (the internal reference voltage) Resistors R1 and R2 should be chosen for approximately 40-A divider current. Lower value resistors can be used for improved noise performance, but the device wastes more power. Higher values should be avoided, as leakage current at FB increases the output voltage error. The recommended design procedure is to choose R2 = 30.1 k to set the divider current at 40 A, C1 = 15 pF for stability, and then calculate R1 using Equation 2: V OUT R1 *1 R2 V REF
Regulator Protection
The TPS795xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. The TPS795xx features internal current limiting and thermal protection. During normal operation, the TPS795xx limits output current to approximately 2.8 A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds approximately 165C, thermal-protection circuitry shuts it down. Once the device has cooled down to below approximately 140C, regulator operation resumes.
OUTPUT VOLTAGE PROGRAMMING GUIDE OUTPUT VOLTAGE 1.8 V 3.6V R1 14.0 k 61.9 k R2 30.1 k 30.1 k C1 22 pF 15 pF
(2)
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be placed between OUT and FB. The approximate value of this capacitor can be calculated as Equation 3:
VIN 1 F IN EN NR 0.01 F GND FB R2 OUT TPS79501
VOUT R1 C1 1 F
Figure 24. TPS79501 Adjustable LDO Regulator Programming
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THERMAL INFORMATION
The amount of heat that an LDO linear regulator generates is directly proportional to the amount of power it dissipates during operation. All integrated circuits have a maximum allowable junction temperature (TJ(max)) above which normal operation is not assured. A system designer must design the operating environment so that the operating junction temperature (TJ) does not exceed the maximum junction temperature (TJ(max)). The two main environmental variables that a designer can use to improve thermal performance are air flow and external heatsinks. The purpose of this information is to aid the designer in determining the proper operating environment for a linear regulator that is operating at a specific power level. In general, the maximum expected power (PD(max)) consumed by a linear regulator is computed as Equation 4:
P D max VIN(avg) VOUT(avg) I OUT(avg) * V I(avg) I (Q)
(4)
A CIRCUIT BOARD COPPER AREA C B A RJC B RCS C RSA TC TJ
SOT223 Package (a)
TA
Figure 25. Thermal Resistances Equation 5 summarizes the computation: TJ T A * PD max RJC * RCS * RSA
(5)
where: * VIN(avg) is the average input voltage * VOUT(avg) is the average output voltage * IOUT(avg) is the average output current * I(Q) is the quiescent current For most TI LDO regulators, the quiescent current is insignificant compared to the average output current; therefore, the term VIN(avg) x I(Q) can be neglected. The operating junction temperature is computed by adding the ambient temperature (TA) and the increase in temperature due to the regulator's power dissipation. The temperature rise is computed by multiplying the maximum expected power dissipation by the sum of the thermal resistances between the junction and the case (RJC), the case to heatsink (RCS), and the heatsink to ambient (RSA). Thermal resistances are measures of how effectively an object dissipates heat. Typically, the larger the device, the more surface area available for power dissipation and the lower the object's thermal resistance. Figure 25 illustrates these thermal resistances for (a) a SOT223 package mounted in a JEDEC low-K board.
The RJC is specific to each regulator as determined by its package, lead frame, and die size provided in the regulator's data sheet. The RSA is a function of the type and size of heatsink. For example, black body radiator type heatsinks can have RCS values ranging from 5C/W for very large heatsinks to 50C/W for very small heatsinks. The RCS is a function of how the package is attached to the heatsink. For example, if a thermal compound is used to attach a heatsink to a SOT223 package, RCS of 1C/W is reasonable. Even if no external black body radiator type heatsink is attached to the package, the board on which the regulator is mounted provides some heatsinking through the pin solder connections. Some packages, like the DDPAK and SOT223 packages, use a copper plane underneath the package or the circuit board's ground plane for additional heatsinking to improve their thermal performance. Computer aided thermal modeling can be used to compute very accurate approximations of an integrated circuit's thermal performance in different operating environments (e.g., different types of circuit boards, different types and sizes of heatsinks, and different air flows, etc.). Using these models, the three thermal resistances can be combined into one thermal resistance between junction and ambient (RJA). This RJA is valid only for the specific operating environment used in the computer model.
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Equation 5 simplifies into Equation 6: TJ T A * PD max RJA Rearranging Equation 6 gives Equation 7: TA T R JA * J PD max
180
(6)
C/W
160 140 120 100 80 60 40 20 0 0.1
No Air Flow
(7)
Using Equation 6 and the computer model generated curves shown in Figure 26, a designer can quickly compute the required heatsink thermal resistance/board area for a given ambient temperature, power dissipation, and operating environment.
SOT223 Power Dissipation
The SOT223 package provides an effective means of managing power dissipation in surface mount applications. The SOT223 package dimensions are provided in the Mechanical Data section at the end of the data sheet. The addition of a copper plane directly underneath the SOT223 package enhances the thermal performance of the package. To illustrate, the TPS79525 in a SOT223 package was chosen. For this example, the average input voltage is 3.3 V, the output voltage is 2.5 V, the average output current is 1 A, the ambient temperature 55C, no air flow is present, and the operating environment is the same as documented below. Neglecting the quiescent current, the maximum average power is Equation 8: (3.3 * 2.5)V P D max 1A 800mW (8) Substituting TJmax for TJ into Equation 4 gives Equation 9: R JA max * (125 55)C 800mW * 87.5C W
(9)
R JA - Thermal Resistance -
1 PCB Copper Area - in2
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Figure 26. SOT223 Thermal Resistance vs PCB Copper Area From the data in Figure 26 and rearranging equation 6, the maximum power dissipation for a different ground plane area and a specific ambient temperature can be computed (see Figure 27).
6 TA = 25C 5
4 4 in2 PCB Area PD (W) 3 0.5 in2 PCB Area
From Figure 26, RJA vs PCB Copper Area, the ground plane needs to be 0.55 in2 for the part to dissipate 800 mW. The operating environment used to construct Figure 26 consisted of a board with 1 oz. copper planes. The package is soldered to a 1 oz. copper pad on the top of the board. The pad is tied through thermal vias to the 1 oz. ground plane.
2
1
0 0 25 50 75 TA (C) 100 125 150
Figure 27. SOT223 Maximum Power Dissipation vs Ambient Temperature
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