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BUF11702 BUF07702
SLOS359F - MARCH 2001 - REVISED MAY 2004
MULTI CHANNEL LCD GAMMA CORRECTION BUFFER
FEATURES D Gamma Correction Channels: 10, 6 D Integrated VCOM Buffer D Excellent Output Current Drive:
- Gamma Channels: > 30mA at 0.5V Swing to Rails(1) - VCOM: > 150mA at 5V Swing to Rails(1) Large Capacitive Load Drive Capability Rail-to-Rail Output PowerPAD Package Low-Power/Channel: < 340A Wide Supply Range: 4.5V to 16V Specified for 0C to 85C High ESD Rating: 4kV
DESCRIPTION
The BUFxx702 are a series of multi-channel buffers targeted towards gamma correction in high-resolution LCD panels. The number of gamma correction channels required depends on a variety of factors and differs greatly from design to design. Therefore, various channel options are offered. For additional space and cost savings, a VCOM channel with higher current drive capability is integrated in the BUF11702 and BUF07702. The various buffers within the BUFxx702 are carefully matched to the voltage I/O requirements for the gamma correction application. Each buffer is capable of driving heavy capacitive loads and offers fast load current switching. The VCOM channel has increased output drive of > 100mA and can handle even larger capacitive loads. The BUF07702 and BUF11702 is available in the TSSOP-PowerPAD package for dramatically increased power dissipation capability. This way, a large number of channels can be handled safely in one package. A flow-through pinout has been adopted to allow simple PCB routing and maintain the cost-effectiveness of this solution. All inputs and outputs of the BUFxx702 incorporate internal ESD protection circuits that prevent functional failures at voltages up to 4kV (HBM) as tested under MIL-STD-883C Method 3015.
D D D D D D D
(1) See typical characteristic curves for detail.
MODEL BUF11702 BUF07702(1)
GAMMA CHANNELS 10 6
VCOM CHANNELS 1
1 (1) The BUF07702 is not recommended for new designs. Information is provided for reference only. For new designs, the pin-compatible BUF07703 is recommended; more information can be found at www.ti.com.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments Incorporated. All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2001-2004, Texas Instruments Incorporated
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BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1) PARAMETERS Supply, VDD(2) Input Voltage Range, VI Continuous Total Power Dissipation Operating Free-Air Temperature Range, TA Maximum Junction Temperature, TJ Storage Temperature Range, TSTG BUFXX702 16.5 VDD See Dissipation Rating Table 0 to 85 150 -65 to 150 UNIT V V
C C C
Lead Temperature 1.6mm (1/16 inch) from case for 10s 260 C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to GND.
ORDERING INFORMATION
PRODUCT BUF11702 BUF11702 BUF07702(2) PACKAGE-LEAD TSSOP-28 TSSOP-28 PACKAGE DESIGNATOR(1) PWP PWP SPECIFIED TEMPERATURE RANGE 0C to +85C 0C to +85C ORDERING NUMBER BUF11702PWP BUF11702PWPR TRANSPORT MEDIA, QUANTITY Tube, 50 Reels, 2000
TSSOP-20 PWP 0C to +85C BUF07702PWP Tube, 70 BUF07702(2) TSSOP-20 PWP 0C to +85C BUF07702PWPR Reels, 2000 (1) For the most current specification and package information, refer to the Package Option Addendum at the end of this data sheet. (2) The BUF07702 is not recommended for new designs. For new designs, the pin-compatible BUF07703 is recommended.
DISSIPATION RATING TABLE
PACKAGE TYPE TSSOP-28 TSSOP-20(3) PACKAGE DESIGNATOR PWP (28) PWP (20) qJC (C/W) 0.72 1.40 qJA(1) (C/W) 27.9 26.1 TA 25C(2) POWER RATING 3.5 W 3.8 W
(1) With 2oz trace and PowerPAD soldered to copper landing pad. (2) TJ = 125C. (3) The BUF07702 is not recommended for new designs. For new designs, the pin-compatible BUF07703 is recommended.
RECOMMENDED OPERATING CONDITIONS
MIN Supply Voltage, VDD Operating Free-Air Temperature, TA 4.5 0 NOM MAX 16 85 UNIT V C
2
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
EQUIVALENT SCHEMATICS OF INPUTS AND OUTPUTS
INPUT STAGE OF BUFFERS
BUF11702: 1 to 5 and VCOM BUF07702: 1 to 3 and VCOM VS Next Stage Buffer Input Buffer Output Internal to BUF11702 GND Internal to BUF11702 VS Buffer Input Buffer Output Next Stage
INPUT STAGE OF BUFFERS
BUF11702: 6 to 10 BUF07702: 4 to 6
OUTPUT STAGE OF ALL BUFFERS
VS Previous Stage Inverting Input Previous Stage GND Buffer Output
GND
ELECTRICAL CHARACTERISTICS
Over operating free-air temperature range, VDD = 4.5V to 16V, TA = 25C, unless otherwise noted. PARAMETER VIO Input offset voltage TEST CONDITIONS VI = VDD/2, RS = 50 TA 25C Full Range(1) 25C IIB Input bias current VI = VDD/2 Full Range(1) 25C kSVR Supply voltage rejection ratio (VDD/VIO) Buffer gain BW_3dB SR 3dB bandwidth Slew rate Gamma buffers VCOM buffer Gamma buffers VCOM buffer VDD = 4.5 V to 16 V VI = 5 V CL = 100 pF, RL = 2 k CL = 100 pF, RL = 2 k VIN = 2V to 8V IO = 0 to 5 mA, VO = 5 V CL = 100 pF tT = 0.1 s See Figure 2 IO = 0 to -5 mA VO = 5 V CL = 100 pF RL = 2 k IO = 0 to +5 mA VO = 5 V CL = 100 pF RL = 2 k VI = 4.5 V to 5.5 V 0.1% VI = 5.5 V to 4.5 V 0.1% VI = 4.5 V to 5.5 V 0.1% VI = 5.5 V to 4.5 V 0.1% VI = 5 V f = 1 kHz VIP-P = 6 V, f = 1 kHz Full Range(1) 25C 25C 25C 25C 25C Full Range(1) Full Range(1) 62 60 0.9995 1 0.6 1 0.7 900 160 1 2 6 4.6 5.8 5.6 45 40 85 1 200 80 dB V/V MHz V/s mV mV s s s s nV/Hz dB pA MIN TYP 1.5 MAX 12 15 mV UNIT
Transient load regulation Transient load response tS (I-sink) tS (I-src) Settling time-current Settling time-current Gamma buffers VCOM buffer Gamma buffers VCOM buffer
tS
Settling timevoltage
25C
Vn
Noise voltage
25C 25C
Crosstalk (1) Full Range is 0C to 85C.
3
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
ELECTRICAL CHARACTERISTICS: BUF11702
Over operating free-air temperature range, VDD = 4.5V to 16V, TA = 25C, unless otherwise noted. PARAMETER IDD Supply current ALL Buffers 1-5 Common-mode input range Buffers 6-10 VCOM buffer VCOM buffer sinking VCOM buffer sourcing Load regulation Buffers 1-10 sinking Buffers 1-10 sourcing VOSH1 VOSL10 VOH1 VOH2/3/4/5 VOH6/7/8/9 VOH10 VOHCOM VOL1 VOL2/3/4/5 VOL6/7/8/9 VOL10 VOLCOM (1) Full Range is 0C to 85C. Low-level output voltage High-level output voltage High-level saturated output voltage Low-level saturated output voltage Buffer 1 VDD = 10 V, IO = 1 mA to 30 mA VDD = 10 V, IO = -1 mA to -30 mA VDD = 10 V, IO = 1 mA to 10 mA VDD = 10 V, IO = -1 mA to -10 mA VDD = 16V, VI = 16V VDD = 16 V, VI = 0 V VDD = 10 V, VI = 9.8 V VDD = 10 V, VI = 9.5 V VDD = 10 V, VI = 8 V VDD = 10 V, VI = 8 V VDD = 10 V, VI = 8 V VDD = 10 V, VI = 2 V VDD = 10 V, VI = 2 V VDD = 10 V, VI = 0.5 V VDD = 10 V, VI = 0.2 V VDD = 10 V, VI = 2 V IO = -5mA, IO = 5 mA, IO = -10 mA, IO = -10 mA, IO = -10 mA, IO = -10 mA, IO = -30 mA, IO = 10 mA, IO = 10 mA, IO = 10 mA, IO = 10 mA, IO = 30 mA, 25C Full Range 25C Full Range 25C Full Range 25C Full Range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 2 0.2 0.5 2 9.75 9.7 9.45 9.4 7.95 7.9 7.95 7.9 7.95 7.9 2 2.05 2.1 2.05 2.1 0.55 0.6 0.25 0.3 2.05 2.1 V 8 8 8 9.5 9.8 15.85 15.8 0.1 0.15 0.2 V V V V V V V V V V 15.9 V 0.85 0.85 1 25 C 25C TEST CONDITIONS VO = VDD/2, VI = VDD/2, VDD = 10 V TA(1) 25C Full Range 1 0 1 1 MIN TYP 2.5 MAX 3.7 5.5 VDD VDD-1 VDD 1.2 2.5 1.2 2.5 1 1.5 1 1.5 mV/mA UNIT mA
V
Buffer 10 Buffer 1 Buffer 2/3/4/5 Buffer 6/7/8/9 Buffer 10 VCOM buffer Buffer 1 Buffer 2/3/4/5 Buffer 6/7/8/9 Buffer 10 VCOM buffer
4
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
ELECTRICAL CHARACTERISTICS: BUF07702
Over operating free-air temperature range, VDD = 4.5V to 16V, TA = 25C, unless otherwise noted. PARAMETER IDD Supply current ALL Buffers 1-3 Common-mode input range Buffers 4-6 VCOM buffer VCOM buffer sinking VCOM buffer sourcing Load regulation Buffers 1-6 sinking Buffers 1-6 sourcing VOSH1 VOSL6 VOH1 VOH2/3 VOH4/5 VOH6 VOHCOM VOL1 VOL2/3 VOL4/5 VOL6 VOLCOM (1) Full Range is 0C to 85C. Low-level output voltage High-level output voltage High-level saturated output voltage Low-level saturated output voltage Buffer 1 VDD = 10 V, IO = 1 mA to 30 mA VDD = 10 V, IO = -1 mA to -30 mA VDD = 10 V, IO = 1 mA to 10 mA VDD = 10 V, IO = -1 mA to -10 mA VDD = 16 V, VI = 16 V VDD = 16 V, VI = 0 V VDD = 10 V, VI = 9.8 V VDD = 10 V, VI = 9.5 V VDD = 10 V, VI = 8 V VDD = 10 V, VI = 8 V VDD = 10 V, VI = 8 V VDD = 10 V, VI = 2 V VDD = 10 V, VI = 2 V VDD = 10 V, VI = 0.5 V VDD = 10 V, VI = 0.2 V VDD = 10 V, VI = 2 V IO = -5 mA, IO = 5 mA, IO = -10 mA, IO = -10 mA, IO = -10 mA, IO = -10 mA, IO = -30 mA, IO = 10 mA, IO = 10 mA, IO = 10 mA, IO = 10 mA, IO = 30 mA, 25C Full Range 25C Full Range 25C Full Range 25C Full Range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 25C Full range 2 0.2 0.5 2 9.75 9.7 9.45 9.4 7.95 7.9 7.95 7.9 7.95 7.9 2 2.05 2.1 2.05 2.1 0.55 0.6 0.25 0.3 2.05 2.1 V 8 8 8 9.5 9.8 15.85 15.8 0.1 0.15 0.2 V V V V V V V V V V 15.9 V 0.85 0.85 1 25 C 25C TEST CONDITIONS VO = VDD/2, VI = VDD/2 VDD= 10V TA(1) 25C Full Range 1 0 1 1 MIN TYP 2.5 MAX 3.7 5.5 VDD VDD-1 VDD 1.2 2.5 1.2 2.5 1 1.5 1 1.5 mV/mA UNIT mA mA V
Buffer 6 Buffer 1 Buffer 2/3 Buffer 4/5 Buffer 6 VCOM buffer Buffer 1 Buffer 2/3 Buffer 4/5 Buffer 6 VCOM buffer
5
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
BUF11702 Pin Configuration
BUF07702 Pin Configuration
\
6
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
PARAMETER MEASUREMENT INFORMATION
Buffer RNULL CL
RL
Figure 1. Bandwidth and Phase Shift Test Circuit
Buffer VO 5V RL RS CS 5V LCD Driver CL Equivalent Load tT VTL
V1 Test Source Sink Ch1-Ch10 Ch1-Ch10 V1 0V 10 V VTL 2V 2V tT 0.1 s 0.1 s CS 100 pF 100 pF RS 100 100 CL 100 pF 100 pF RL 1 k 1 k
Figure 2. Transient Load Response Test Circuit
Buffer VO 5V RNULL RL CL VTL VTL
tT 10 V 5V 0V
Figure 3. Transient Load Regulation Test Circuit
7
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
TYPICAL CHARACTERISTICS DC CURVES
INPUT OFFSET VOLTAGE vs INPUT VOLTAGE
20 15 V IO - Input Offset Voltage - mV 10 5 0 -5 -10 -15 -20 0 1 2 34 567 VI - Input Voltage - V 8 9 10 BUF11702 VDD = 10 V Channels 1 to 5 BUF07702 VDD = 10 V Channels 1 to 3 20 15 V IO - Input Offset Voltage - mV 10 5 0 -5 -10 -15 -20 0 2 4 6 VI - Input Voltage - V 8 10 BUF11702 VDD = 10 V Channels 6 to 10 BUF07702 VDD = 10 V Channels 4 to 6
INPUT OFFSET VOLTAGE vs INPUT VOLTAGE
20 V IO - Input Offset Voltage - mV 15 10 5 0 -5 -10 -15 -20 0
INPUT OFFSET VOLTAGE vs INPUT VOLTAGE
VDD = 10 V VCOM Buffer
2
4 6 VI - Input Voltage - V
8
10
Figure 4 INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE
250 VDD = 10 V 200 V OH - High-Level Output Voltage - V I IB - Input Bias Current - pA 10
Figure 5 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
10 V OH - High-Level Output Voltage - V VDD = 10 V Channel 1 TA = 0C 9.9 9.8 9.7 9.6 9.5 9.4 9.3 9.2 9.1 9 0 50 100 150 200 250 IOH - High-Level Output Current - mA 0
Figure 6 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
VDD = 10 V Channel 1 TA = 0C TA = +25C
9
150
8
TA = +25C TA = +85C
100
7
TA = +85C
50
6
0 0 10 20 30 40 50 60 70 TA - Free-Air Temperature - C 80 85
5
5 10 15 20 25 30 35 40 45 50 IOH - High-Level Output Current - mA
Figure 7 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
10 V OH - High-Level Output Voltage - V 9.5 9 8.5 8 7.5 7 6.5 6 5.5 5 0 25 50 75 100 125 150 IOH - High-Level Output Current - mA BUF07702 VDD = 10 V Channels 2 to 3 TA = 0C TA = +25C V OH - High-Level Output Voltage - V BUF11702 VDD = 10 V Channels 2 to 5
Figure 8 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
10 9 8 7 6 5 4 3 2 1 0 0 25 50 75 100 125 150 IOH - High-Level Output Current - mA BUF07702 VDD = 10 V Channels 4 to 6 V OH - High-Level Output Voltage - V BUF11702 VDD = 10 V Channels 6 to 10 TA = 0C TA = +25C TA = +85C 10 9 8 7 6 5 4 3 2 1 0 0
Figure 9 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
VDD = 10 V VCOM Buffer TA = 0C
TA = +85C
TA = +25C
TA = +85C
50 100 150 200 250 IOH - High-Level Output Current - mA
Figure 10 8
Figure 11
Figure 12
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
TYPICAL CHARACTERISTICS
DC CURVES (CONTINUED)
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
10 V OL - Low-Level Output Voltage - V V OL- Low-Level Output Voltage - V 9 8 7 6 5 4 3 2 1 0 0 125 25 50 75 100 150 IOL - Low-Level Output Current - mA TA = +25C TA = +85C TA = 0C BUF11702 VDD = 10 V Channels 1 to 5 BUF07702 VDD = 10 V Channels 1 to 3 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 25 75 125 50 100 150 IOL - Low-Level Output Current - mA TA = +85C
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
V OL- Low-Level Output Voltage - V BUF11702 VDD = 10 V Channels 6 to 9 BUF07702 VDD = 10 V Channels 4 to 5 TA = 0C TA = +25C 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
BUF11702 VDD = 10 V Channel 10 TA = 0C TA = +25C TA = +85C
BUF07702 VDD = 10 V Channel 6 0 50 100 150 200 250 IOL - Low-Level Output Current - mA
Figure 13 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
1 V OL - Low-Level Output Voltage - V 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 10 15 20 25 30 35 40 45 50 IOL - Low-Level Output Current - mA 5 TA = 0C TA = +25C TA = +85C V OL- Low-Level Output Voltage - V BUF11702 VDD = 10 V Channel 10 BUF07702 VDD = 10 V Channel 6 10 9 8 7 6 5 4 3 2 1 0 0
Figure 14 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
4 VDD = 10 V VCOM Buffer 3.5 I DD - Supply Current - mA 3 2.5 2 1.5 1 0.5 0 50 100 150 200 IOL - Low-Level Output Current - mA 250
Figure 15 SUPPLY CURRENT vs SUPPLY VOLTAGE
TA = 0C TA = +25C TA = +70C
TA = +85C
TA = +25C
TA = +85C TA = 0C
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 VDD - Supply Voltage - V
Figure 16
Figure 17 SUPPLY CURRENT vs FREE-AIR TEMPERATURE
4 3.5 I DD - Supply Current - mA 3 2.5 2 1.5 1 0.5 0 0 10 20 30 40 50 60 70 80 TA - Free-Air Temperature - C 15 V 10 V 5V
Figure 18
Figure 19 9
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
TYPICAL CHARACTERISTICS
AC CURVES
-3 dB BANDWIDTH vs SUPPLY VOLTAGE
1.25 BW - -3 dB Bandwidth - MHz BUF11702 Channel 9 1 BUF07702 Channel 5 0.75 VCOM Buffer 0.5 1.2 Gamma Channels 10, 15 V 0.8 VCOM Buffer 5, 10, 15 V 0.4 0.2 0 0 2 4 6 8 10 12 VDD - Supply Voltage - V 14 16 0 10 20 30 40 50 60 70 TA - Free-Air Temperature - C 80 BW - -3 dB Bandwidth - MHz 1 5V
-3 dB BANDWIDTH vs FREE-AIR TEMPERATURE
3.5 3 2.5 2 1.5 1 0.5 0 0
-3 dB BANDWIDTH vs LOAD CAPACITANCE
RL = 2 k Channel 1
BW - -3 dB Bandwidth - MHz
10 V 15 V
0.6
0.25
RL = 2 k CL = 100 pF TA = +25C
RL = 2 k CL = 100 pF
0
200 400 600 800 CL - Load Capacitance - pF
1000
Figure 20 -3 dB BANDWIDTH vs LOAD CAPACITANCE
1.1 1 BW - -3 dB Bandwidth - MHz 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 200 400 600 800 CL - Load Capacitance - pF 1000 RL = 2 k VCOM Buffer 10 V 15 V 3.5 3 2.5 2 1.5 1 0.5 0 0
Figure 21 -3 dB BANDWIDTH vs LOAD CAPACITANCE
140 RNULL = 0 VDD = 10 V RL = 2 k Channel 1 120 Input-Output Phase Shift 100 80
Figure 22 INPUT-OUTPUT PHASE SHIFT vs LOAD CAPACITANCE
RL = 2 k Channel 1 f = -3 dB BW
BW - -3 dB Bandwidth - MHz
5V 10 V
15 V 60 40 20 0
RNULL = 50
200 400 600 800 CL - Load Capacitance - pF
1000
0 100 200 300 400 500 600 700 800 900 1000 CL - Load Capacitance - pF
Figure 23 INPUT-OUTPUT PHASE SHIFT vs LOAD CAPACITANCE
140 120 Input-Output Phase Shift 100 80 60 RNULL = 50 40 20 0 0 100 200 300 400 500 600 700 800 900 1000 CL - Load Capacitance - pF VDD = 10 V RL = 2 k Channel 1 f = -3 dB BW RNULL = 0 Input-Output Phase Shift 60 55 50 45 40 35 30 25 20 15 10 5 0 0
Figure 24 INPUT-OUTPUT PHASE SHIFT vs LOAD CAPACITANCE
PSRR - Power Supply Rejection Ratio - dB RL = 2 k VCOM Buffer f = -3 dB BW VDD = 5 V
Figure 25 POWER SUPPLY REJECTION RATIO vs FREQUENCY
80 70 60 50 40 30 20 10 0 10 VCOM Buffer VDD = 10 V RL = 2 k CL = 100 pF Gamma Channels
VDD = 10 V VDD = 15 V
100 200 300 400 500 600 700 800 900 1000 CL - Load Capacitance - pF
100
1k 10 k 100 k f - Frequency - Hz
1M
10 M
Figure 26 10
Figure 27
Figure 28
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
TYPICAL CHARACTERISTICS
AC CURVES (CONTINUED)
CROSSTALK vs FREQUENCY
0 -10 -20 -30 Crosstalk - dB -40 -50 -60 -70 -80 -90 -100 -110 -120 10 1k 10 k 100 f - Frequency - Hz 100 k 10 V 15 V 5V RL = 1 k CL = 100 pF VI = 60% VDD Adjacent Channels Hz 120 100 80 60
NOISE VOLTAGE vs FREQUENCY
1000
OUTPUT IMPEDANCE vs FREQUENCY
Zo - Output Impedance -
100 VCOM Buffer 10
V n - Noise Voltage - nV/
VCOM Buffer
1 Gamma Channels 0.1
40 Gamma Channels 20 0 10 100 1k 10 k f - Frequency - Hz 100 k
0.01 0.1 k
1k
10 k
100 k
1M
10 M
f - Frequency - Hz
Figure 29
Figure 30
Figure 31
11
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
TYPICAL CHARACTERISTICS
TRANSIENT CURVES
SUPPLY VOLTAGE, OUTPUT VOLTAGE AND SUPPLY CURRENT
20 16 VDD 12 8 VO - All Channels 4 0 3 2 1 0 -1 0 5 10 15 20 25 IDD VDD = 0 to 15 V RL = 2 k CL = 100 pF VI = VDD/2 TA = +25C 30 35 40 45 50 VO - Output Voltage - V VDD - Supply Voltage - V
LARGE SIGNAL VOLTAGE FOLLOWER
5 4 VI VDD = 5 V VI = 3 V RL = 2 k CL = 100 pF TA = +25C 3 2 1 0 V I - Input Voltage - V VI - Input Voltage - V
IDD - Supply Current - mA
5 VO - Output Voltage - V 4 3 2 1 0 0 2 Gamma Channels VCOM Buffer
4
t - Time - s
6 8 10 12 t - Time - s
14
16 18
Figure 32
LARGE SIGNAL VOLTAGE FOLLOWER
10 VDD = 10 V VI = 6 V RL = 2 k CL = 100 pF TA = +25C 8 6 4 2 VO - Output Voltage - V 10 8 6 4 2 0 0 5 10 15 20 t - Time - s 25 30 VCOM Buffer Gamma Channels 0 VI - Input Voltage - V
Figure 33
LARGE SIGNAL VOLTAGE FOLLOWER
15 VDD = 15 V VI = 9 V RL = 2 k CL = 100 pF TA = +25C 12 9 6 3 VO - Output Voltage - V 15 12 9 6 3 0 0 4 8 VCOM Buffer Gamma Channels 12 16 20 t - Time - s 24 28 32 36 0
VI
VI
Figure 34
Figure 35
12
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
TYPICAL CHARACTERISTICS
TRANSIENT CURVES (CONTINUED)
SMALL SIGNAL VOLTAGE FOLLOWER
V I - Input Voltage - V VI - Input Voltage - V 2.60 VDD = 5 V VI = 100 mV RL = 2 k CL = 100 pF TA = +25C 2.55 2.50 2.45 2.40 VO - Output Voltage - V 2.60 2.55 VCOM Buffer 2.50 2.45 2.40 0 0.5 1 1.5 2 2.5 3 3.5 t - Time - s 4 4.5 5 0 0.50 1 1.50 2 2.50 3 t - Time - s 3.50 4 Gamma Channels 5.10 VI 5.05 5 4.95 VDD = 10 V VI = 100 mV RL = 2 k CL = 100 pF TA = +25C
SMALL SIGNAL PULSE RESPONSE
VI
Gamma Channels 5.05 VCOM Buffer 5 4.95 4.90 4.50
Figure 36
SMALL SIGNAL VOLTAGE FOLLOWER
VLT - Input Voltage - V 7.60 VI VDD = 15 V VI = 100 mV RL = 2 k CL = 100 pF TA = +25C 7.60 7.55 7.50 7.45 7.40 VCOM Buffer 7.55 7.50 7.45 7.40 VI - Input Voltage - V
Figure 37
TRANSIENT LOAD RESPONSE - SOURCING
7 6 5 4 3 2 1 0 Transient Load Pulse Channel 1 VDD = 10 V, VI = 5 V, CS = 100 pF, RS = 100 , CL = 100 pF, RL = 1 k, tT = 0.1 s, TA = +25C
5.15 5.1 5.05 5 4.95 VO - Output Voltage - V 13
VO - Output Voltage - V
Output Voltage Gamma Channels 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
4.9 4.85
0
0.1
0.2
t - Time - s
0.3 0.4 0.5 0.6 t - Time - s
0.7
0.8
0.9
4.8 1
Figure 38
Figure 39
VO - Output Voltage - V
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
TYPICAL CHARACTERISTICS
TRANSIENT CURVES (CONTINUED)
TRANSIENT LOAD RESPONSE - SINKING
VLT - Input Voltage - V IL- Load Current - mA 7 6 5 4 3 2 1 0 6 5 4 3 2 1 0
TRANSIENT LOAD REGULATION - SINKING
Channel 1 VDD = 10 V, VI = 5 V, CS = 100 pF, RS = 100 , CL = 100 pF, RL = 1 k, tT = 0.1 s, TA = +25C
Channel 1 VDD = 10 V, VI = 5 V, RL = 1 k, tT = 0.1 s, TA = +25C CL = 100 pF CL = 1000 pF 5.8 5.6 5.4 5.2 5 CL = 10 nF RNULL = 100 0 1 2 3 4 5 t - Time - s 6 7 8 4.8 4.6 VO - Output Voltage - V VO - Output Voltage - V
5.1 5.05 5 4.95 4.9 4.85 VO - Output Voltage - V
0
0.1 0.2 0.3 0.4 0.5
0.6
0.7 0.8 0.9
1
4.8
t - Time - s
Figure 40
TRANSIENT LOAD REGULATION - SOURCING
IL- Load Current - mA IL- Load Current - mA 6 5 4 3 2 1 0 Channel 1 VDD = 10 V, VI = 5 V, RL = 1 k, tT = 0.1 s, TA = +25C
Figure 41
TRANSIENT LOAD REGULATION - VCOM BUFFER
12 6 0 -6 Sinking VCOM Buffer VDD = 10 V, VI = 5 V, RL = 500 , tT = 0.1 s, TA = +25C CL = 500 pF and 1000 pF CL = 10 nF Sourcing 6 VO - Output Voltage - V 5.5 5 CL = 100 nF RNULL = 20 4.5 4 0 1 2 3 4 5 3.5 6 7 8 9 10 11 12 13 14 15 t - Time - s
CL = 100 pF CL = 1000 pF 5.4 5.2 5 CL = 10 nF RNULL = 100 4.8 4.6 4.4 0 1 2 3 4 5 6 7 8 t - Time - s
-12
Figure 42
Figure 43
14
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
APPLICATION INFORMATION
The requirements on the number of gamma correction channels vary greatly from panel to panel. Therefore, the BUFxx702 series of gamma correction buffers offers different channel combinations. The BUF11702 offers 10 gamma channels plus one VCOM channel, whereas the BUF07702 provides six gamma channels plus one VCOM. The VCOM channel on both models can be used to drive the VCOM node on the LCD panel.
Gamma correction voltages are often generated using a simple resistor ladder, as shown in Figure 44. The BUFxx702 buffers the various nodes on the gamma correction resistor ladder. The low output impedance of the BUFxx702 forces the external gamma correction voltage on the respective reference node of the LCD source driver. Figure 44 shows an example of the BUFxx702 in a typical block diagram driving an LCD source driver with 10- or 6-channel gamma correction reference inputs.
Figure 44. LCD Source Driver Typical Block Diagram
15
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
INPUT VOLTAGE RANGE GAMMA BUFFERS
Figure 45 shows a typical gamma correction curve with 10 gamma correction reference points (GMA1 through GMA10). As can be seen from this curve, the voltage requirements for each buffer vary greatly. The swing capability of the input stages of the various buffers is carefully matched to the application. Using the example of the BUF11702 with 10 gamma correction channels, buffers 1 to 5 have input stages that include VDD, but will only swing within 1V to GND. Buffers 1 through 5 have only a single NMOS input stage. Buffers 6 through 10 have only a single PMOS input stage. The input range of the PMOS input stage includes GND.
VDD1 GMA1
COMMON BUFFER (VCOM)
The common buffer output of the BUF11702 has a greater output drive capability than buffers 1 through 10, to meet the heavier current demands of driving the common node of the LCD panel. It was also designed to drive heavier capacitive loads and still remain stable, as shown in Figure 46.
45 40 Phase Shift - Deg 35 30 25 20 15 10 5 0 10 100 CL - Load Capacitance - pF 1000 VDD = 10 V RL = 2 k VCOM
GMA2 GMA3 GMA4 GMA5 GMA6 GMA7 GMA8 GMA9
Figure 46. Phase Shift vs Load Capacitance
CAPACITIVE LOAD DRIVE
The BUF11702 has been designed to be able to sink/source dc currents in excess of 10mA. Its output stage has been designed to deliver output current transients with little disturbance of the output voltage. However, there are times when very fast current pulses are required. Therefore, in LCD source driver buffer applications, it is quite normal for capacitors to be placed at the outputs of the reference buffers. These capacitors improve the transient load regulation and will typically vary from 100pF and more. The BUF11702 gamma buffers were designed to drive capacitances in excess of 100pF and retain effective phase margins above 50, as shown in Figure 47.
140
BUF11702: Channels 1 to 10
GMA10 VSS1 0
10
20 Input Data HEX0
30
40
Figure 45. Gamma Correction Curve
OUTPUT VOLTAGE SWING GAMMA BUFFERS
The output stages have been designed to match the characteristic of the input stage. Once again, using the example of the BUF11702, this means that the output stage of buffer 1 swings very close to VDD, typically VCC - 100mV at 5mA; its ability to swing to GND is limited. Buffers 2 through 5 have smaller output stages with slightly larger output resistance, as they will not have to swing as close to the positive rail as buffer 1. Buffers 6 through 10 swing closer to GND than VDD. Buffer 10 is designed to swing very close to GND; typically, GND + 100mV at a 5mA load current. See the Typical Characteristics for more details. This approach significantly reduces the silicon area and cost of the whole solution. However, due to this architecture, the correct buffer needs to be connected to the correct gamma correction voltage. Connect buffer 1 to the gamma voltage closest to VDD, and buffers 2 through 5 to the following voltages. Buffer 10 should be connected to the gamma correction voltage closest to GND (or the negative rail), and buffers 9 through 6 to the following higher voltages.
16
120 Phase Shift - Deg 100 80 60 40 20 0
BUF07702: Channels 1 to 6 VDD = 10 V RL = 2 k
10
100 CL - Load Capacitance - pF
1000
Figure 47. Phase Shift Between Output and Input vs Load Capacitance for the Gamma Buffers
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
APPLICATIONS WITH >10 GAMMA CHANNELS
When a greater number of gamma correction channels are required, two or more BUFxx702 devices can be used in parallel, as shown in Figure 48. This capability provides a cost-effective way of creating more reference voltages over the use of quad-channel op amps or buffers. The suggested configuration in Figure 48 simplifies layout. The various different channel versions provide a high degree of flexibility and also minimize total cost and space.
Figure 48. Creating > 10 Gamma Voltage Channels
MULTIPLE VCOM CHANNELS
In some LCD panels, more than one VCOM driver is required for best panel performance. Figure 49 uses three BUF07702s to create a total of 18 gamma-correction and three VCOM channels. This solution saves considerable space and cost over the more conventional approach of using five or six quad-channel buffers or op amps. Figure 49. 18-Channel Application with Three Integrated VCOM Channels
17
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
COMPLETE LCD SOLUTION FROM TI
In addition to the BUFxx702 line of gamma correction buffers, TI offers a complete set of ICs for the LCD panel market, including source and gate drivers, various power-supply solutions, and audio power solutions. Figure 50 shows the total IC solution from TI.
GENERAL POWERPAD DESIGN CONSIDERATIONS
The BUF11702 is available in the thermally enhanced PowerPAD family of packages. These packages are constructed using a downset leadframe upon which the die is mounted; see Figures 51(a) and (b). This arrangement results in the lead frame being exposed as a thermal pad on the underside of the package; see Figure 51(c). Due to this thermal pad having direct thermal contact with the die, excellent thermal performance is achieved by providing a good thermal path away from the thermal pad. The PowerPAD package allows for both assembly and thermal management in one manufacturing operation. During the surface-mount solder operation (when the leads are being soldered), the thermal pad can also be soldered to a copper area underneath the package. Through the use of thermal paths within this copper area, heat can be conducted away from the package into either a ground plane or other heat-dissipating device. Soldering the PowerPAD to the PCB is always required, even with applications that have low power dissipation. This provides the necessary thermal and mechanical connection between the lead frame die pad and the PCB. The PowerPAD must be connected to the device's most negative supply voltage.
AUDIO POWER AMPLIFIER FOR TV SPEAKERS
The TPA3002D2 is a 7W (per channel) stereo audio amplifier specifically targeted towards LCD monitors and TVs. It offers highly efficient, filter-free Class-D operation for driving bridge-tied stereo speakers. The TPA3002D2 is designed to drive stereo speakers as low as 8 without an output filter. The high efficiency of the TPA3002D2 eliminates the need for external heatsinks when playing music. Stereo speaker volume is controlled with a dc voltage applied to the volume control terminal offering a range of gain from -40dB to +36dB. Line outputs, for driving external headphone amplifier inputs, are also dc voltage-controlled with a range of gain from -56dB to +20dB. An integrated +5V regulated supply is provided for powering an external headphone amplifier. The TPA3002D2 was released to market in 2002. Texas Instruments offers a full line of linear and switch-mode audio power amplifiers. For more information, visit www.ti.com. For excellent audio performance, TI recommends the OPA364 or OPA353 as headphone drivers.
Figure 50. TI LCD Solution
18
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
DIE
Side View (a)
Thermal Pad
DIE
End View (b) NOTE A:
Bottom View (c)
The thermal pad is electrically isolated from all terminals in the package.
Figure 51. Views of Thermally Enhanced DGN Package
PowerPAD ASSEMBLY PROCESS
1. Prepare the PCB with a top-side etch pattern (see Pin Configurations). There should be etching for the leads as well as etch for the thermal pad. 2. Place 18 holes in the area of the thermal pad. These holes should be 13mils in diameter. Keep them small, so that solder wicking through the holes is not a problem during reflow. 3. Additional vias may be placed anywhere along the thermal plane outside of the thermal pad area. This helps dissipate the heat generated by the BUFxx702 IC. These additional vias may be larger than the 13mil diameter vias directly under the thermal pad. They can be larger because they are not in the thermal pad area to be soldered, thus, wicking is not a problem. 4. Connect all holes to the internal ground plane. 5. When connecting these holes to the ground plane, do not use the typical web or spoke via connection methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat transfer during soldering operations. This makes the soldering of vias that have plane connections easier. In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore, the holes under the BUFxx702 PowerPAD package should make their connection to the internal ground plane with a complete connection around the entire circumference of the plated-through hole. 6. The top-side solder mask should leave the terminals of the package and the thermal pad area with its five holes (dual) or nine holes (quad) exposed. The bottom-side solder mask should cover the five or nine holes of the thermal pad area. This prevents solder from being pulled away from the thermal pad area during the reflow process. 7. Apply solder paste to the exposed thermal pad area and all of the IC terminals.
8. With these preparatory steps in place, the BUFxx702 IC is simply placed in position and run through the solder reflow operation as any standard surface-mount component. This preparation results in a properly installed part. For a given qJA, the maximum power dissipation is shown in Figure 52, and is calculated by the following formula: PD + T MAX * T A q JA
Where: PD = maximum power dissipation (W)
TMAX = absolute maximum junction temperature (150C)
TA = free-ambient air temperature (C) qJA = qJC + qCA qJC = thermal coefficient from junction to case (C/W)
8 7 Maximum Power Dissipation - W 6 5 4 3 2 1 0 -40 BUF11702 JA = 27.9C/W 2 oz. Trace and Copper Pad With Solder TJ = 125C
qCA = thermal coefficient from case-to-ambient air (C/W)
-20
0
20
40
60
80
100
TA - Free-Air Temperature - C
Figure 52. Maximum Power Dissipation vs Free-Air Temperature This lower thermal resistance enables the BUFxx702 to deliver maximum output currents even at high ambient temperatures.
19
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
APPLICATION INFORMATION BUF11702 Demonstration Board (Contact Factory)
The BUF11702 has an demonstration board that can be mounted along with reference resistors and load capacitors. This enables the BUF11702 to be used in its own daughterboard in existing designs for easy evaluation. The schematic of the BUF11702 demo board is shown in Figure 53. Note that the demo board has been configured for single-supply use. As such, all
J2 JP3 VREF INCOM R11 CH10 R10 CH9 R9 CH8 R8 CH7 R7 CH6 R6 CH5 R5 CH4 R4 CH3 R3 CH2 R2 CH1 R1 NC VDD IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 IN9 IN10 GND INCOM
decoupling capacitors are connected to the ground plane of the demo board, as are the ground terminals of the BUF11702. In populated versions of the demo board, capacitors C1 to C4 have been included. Capacitors C1 and C2 are bulk decoupling capacitors of 6.8F, whereas capacitors C3 and C4 are 100nF ceramic high-frequency decoupling capacitors. Resistors R1 to R32 and capacitors C5 to C16 have not been included and are application-specific.
J3 GND GND R22 OUTCOM R21 OUT10 OUT9 OUT8 OUT7 BUF11702 OUT6 R16 OUT5 OUT4 OUT3 R13 OUT2 R12 OUT1 C6 NC VDD C4 GND C2 VDD2 J1 C1 JP1 C7 R32 CH1 GND VDD C8 R31 CH2 R15 R14 C10 C9 R29 CH4 R30 CH3 C11 R28 CH5 R18 R17 C13 C12 R26 CH7 R27 CH6 R20 R19 C15 C14 R24 CH9 R25 CH8 C16 R23 CH10 OUTCOM
JP2 C3
VDD
Figure 53. BUF11702 Demonstration Board Schematic
20
BUF11702 BUF07702
www.ti.com SLOS359F - MARCH 2001 - REVISED MAY 2004
REFERENCE VOLTAGES
The reference voltages can be supplied externally via the connector J2 (not included) or generated onboard via resistors R1 to R11. An external low side reference has been provided on the board so that the negative references can be referred to a voltage other than ground. The reference ladder can be referred to either VDD (master supply voltage) or a secondary voltage, VDD2. This allows a low noise or absolute reference voltage to be used for the LCD source driver's DACs other than the system voltage. If the secondary voltage is used, then jumper JP1 should be left open and jumper JP2 shorted. If a ratiometric reference (proportional to the master supply voltage) is to be used, then jumpers JP1 and JP2 should both be shorted, feeding VDD through to the reference ladder. OUTPUT The outputs of the BUF11702 are fed to connector J3 (not mounted). This enables the output voltages to be monitored directly on the demonstration board or fed off-board for evaluation in a real system.
Onboard load resistors, R23 to R32, connected to ground can also be mounted. These can be used to simulate resistive loading of the LCD source driver. Transient improving capacitors are frequently used in LCD panel applications. Therefore, pads to mount these transient improving capacitors, C6 to C16, have been included. Due to the possible magnitude of these capacitors, pads have been placed between the output of the BUF11702 and these capacitors to mount nulling resistors, R12 to R22. If the nulling resistors are not required, shorts could be placed instead of resistors. The pads for R1 to R32 and capacitors C3 to C16 have been laid out to support 0805 or 1206 size components. PowerPAD The BUF11702 demonstration board has been laid out to support the PowerPAD feature of the BUF11702. An area is provided on the demo board, under the BUF11702, for the exposed leadframe connection. Eighteen vias are connected to the ground plane of the demo board to significantly reduce the thermal case to ambient resistance, qCA. See the Applications section on general PowerPAD design considerations.
21
PACKAGE OPTION ADDENDUM
www.ti.com
21-Feb-2005
PACKAGING INFORMATION
Orderable Device BUF07702PWP BUF07702PWPR BUF11702PWP BUF11702PWPR BUF11702PWPRG4
(1)
Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Package Type HTSSOP HTSSOP HTSSOP HTSSOP HTSSOP
Package Drawing PWP PWP PWP PWP PWP
Pins Package Eco Plan (2) Qty 20 20 28 28 28 70 2000 50 2000 Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS) Pb-Free (RoHS)
Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI
MSL Peak Temp (3) Level-2-250C-1 YEAR Level-2-250C-1 YEAR Level-2-250C-1 YEAR Level-2-250C-1 YEAR Level-2-260C-1 YEAR
2000 Green (RoHS & no Sb/Br)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Amplifiers Data Converters DSP Interface Logic Power Mgmt Microcontrollers amplifier.ti.com dataconverter.ti.com dsp.ti.com interface.ti.com logic.ti.com power.ti.com microcontroller.ti.com Applications Audio Automotive Broadband Digital Control Military Optical Networking Security Telephony Video & Imaging Wireless Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2005, Texas Instruments Incorporated www.ti.com/audio www.ti.com/automotive www.ti.com/broadband www.ti.com/digitalcontrol www.ti.com/military www.ti.com/opticalnetwork www.ti.com/security www.ti.com/telephony www.ti.com/video www.ti.com/wireless

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