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1/4 to 1/11 Duty VFD Controller
Features
* * * * * *
HT16512
Logic voltage: 5V High-voltage output: VDD-30V max. Multiple display (11-segment & 11-digit to 16-segment & 4-digit) 64 matrix key scanning 8 steps dimmer circuit 4 LED output ports
* * *
4-bit general purpose input port No external resistors necessary for driver output (provides PMOS open-drain and pull-low resistor output) Serial interface with MCU (CLK, CS, DI, DO)
Applications
* *
Consumer products panel function control Industrial measuring instrument panel function control
*
Other similar application panel function control
General Description
HT16512 is a VFD (Vacuum Fluorescent Display) controller/driver that is driven on a 1/4 to 1/11 duty factor. It consists of 11 segment output lines, 6 grid output lines, 5 segment/grid output drive lines, 4 LED output ports, a control circuit, a display memory, and a key scan circuit. Serial data inputs to the HT16512 through a three-line serial interface. This VFD controller/driver is ideal as a peripheral device for an MCU.
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HT16512
Block Diagram
DI DO CLK CS S e r ia l I/F
C om m and D ecoder
6 D is p la y R A M 1 6 - B it 1 1 W o r d s 1 6 - B it O u tp u t L a tc h 16 5 11 Segm ent D r iv e r 5
S 0 /K 0 ~ S 5 /K 5 S6~S10
OSC
OSC
T im in g G e n e r a to r K ey S can 5 1 1 - B it S h ift R e g is te r 11
D a ta S e le c to r
5
M u ltip le x e d D r iv e r
5
S 1 1 /G 1 0 ~ S 1 5 /G 6
K e y D a ta R A M K0~K3 4 - B it L a tc h 4 - B it L a tc h
(4 6 )
6
G r id D r iv e r
6
G 0~G 5
SW 0~SW 3
D im m in g C ir c u it
LED0~LED3
VDD
VSS
VEE
Pin Assignment
L G G G G VD ED ED ED ED VS OS D C SW 0 SW 1 SW 2 SW 3 DO DI VSS CLK CS K0 K1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34
L S 0 1
0 6$# " " 3 . 2
L 2 0
33 32 31 30 29 28 27 26 25 24 23
L 3 1 G5 S1 S1 S1 S1 VE S1 S1 S9 S8 0 G4 5 /G 4 /G 3 /G 2 /G E 1 /G 7 8 9 10 6 S7 S6 S5 S4 S3 S2 S1 S0 VD K3 K2 /K 5 /K 4 /K 3 /K 2 /K 1 /K 0 D 2 3
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Pin Description
Pin No. 1~4 5 6 7, 43 8 Pin Name SW0~SW3 DO DI VSS CLK I/O I O I 3/4 I Description 4-bit general purpose input port Output serial data at the falling edge of the shift clock, starting from low order bit. This is an NMOS open-drain output pin. Input serial data at the rising edge of the shift clock, starting from the low order bit. Power supply, ground Reads serial data at the rising edge, and outputs data at the falling edge. Initializes serial interface at the rising or falling edge of the HT16512. Then it waits to receive a command. Data input after CS has fallen is processed as a command. While command data is processed, current processing is stopped, and the serial interface is initialized. While CS is high, CLK is ignored. Keying data input to these pins is latched at the end of the display cycle. Posistive power supply Segment or key source output pins (dual function). This is PMOS open-drain and pull-low resistor output. Segment driver output pins (segment only). This is PMOS open-drain and pull-low resistor output. Segment or Grid driver output pins. These pins are selectable for segment or grid driving. This is PMOS open-drain and pull-low resistor output. VFD power supply Grid driver output pins (Grid only). This is PMOS open-drain and pull-low resistor output. LED driver output ports. This is a CMOS output pin. Connected to an external resistor or an RC oscillator circuit.
9
CS
I
10~13 14, 38 15~20 21~25 26, 28~31 27 37~32 42~39 44
K0~K3 VDD S0/K0~S5/K5 S6~S10 S11/G10~S15/G6 VEE G0~G5 LED0~LED3 OSC
I 3/4 O O O 3/4 O O I
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Approximate internal connections
NMOS OUT
PMOS OUT
V
DD
CMOS OUT
V
DD
V
EE
Absolute Maximum Ratings
Supply Voltage..............................-0.3V to 5.5V Input Voltage .................VSS-0.3V to VDD+0.3V Operating Temperature ..............-25C to 75C Storage Temperature.................-50C to 125C
Note: These are stress ratings only. Stresses exceeding the range specified under Absolute Maximum Ratings may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
D.C. Characteristics
Symbol VDD VEE fOSC RPL IDD IOL IOL1 IOH1 IOH21 Parameter Logic Supply Voltage VFD Supply Voltage Oscillation Frequency Output Pull-low Resistor Operating Current Driver Leakage Current LED Sink Current LED Source Current Segment/Key Source Current Test Conditions VDD 3/4 3/4 5V 5V 5V 5V 5V 5V 5V Conditions 3/4 3/4 ROSC=51kW Driver output No load, VFD display off VO=VDD-30V VFD driver off VOL=1V LED0~LED3 VOH=0.9VDD LED0~LED3 VOH=VDD-2V S0/K0~S5/K5, S6~S10 Min. 4.5 0 350 50 3/4 3/4 20 -1 -3 Typ. 5 3/4 500 100 3/4 3/4 3/4 3/4 3/4
Ta=25C Max. 5.5 VDD-30 650 150 5 -10 3/4 3/4 3/4 Unit V V kHz kW mA mA mA mA mA
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Symbol Parameter Test Conditions VDD 5V 5V 3/4 3/4 5V 5V 5V Conditions VOH=VDD-2V G0~G5, S11/G10~S15/G6 VOL=0.4V 3/4 3/4 LED0~LED3, IOH1=-1mA LED0~LED3, IOL1=20mA DO, IOL2=4mA Min. Typ. Max. Unit
IOH22 IOL3 VIH VIL VOH1 VOL1 VOL2
Segment/Grid Source Current DO Sink Current H Input Voltage L Input Voltage High-level Output Voltage Low-level Output Voltage Low-level Output Voltage
-15 4 0.7VDD 0 0.9VDD 0 0
3/4 3/4 3/4 3/4 3/4 3/4 3/4
3/4 3/4 VDD 0.3VDD VDD 1 0.4
mA mA V V V V V Ta=25C
A.C. Characteristics
Symbol tPHL tPLH tr1 Rise Time tr2 tf tmax Ci tCW tSW tSU th tCS tW Fall Time Input Capacitance Clock Pulse Width Strobe Pulse Width Data Setup Time Data Hold Time Clock-Strobe Time Wait Time Parameter Propagation Delay Time Test Conditions VDD Conditions 5V CLK(R)DO 5V CL=15pF, RL=10kW 5V CL=300pF, S0~S10 Min. 3/4 3/4 3/4 3/4 3/4 1 3/4 400 1 100 100 1 1
Typ. Max. Unit 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 300 100 2 0.5 120 3/4 15 3/4 3/4 3/4 3/4 3/4 3/4 ns ns ms ms ms MHz pF ns us ns ns ms ms
CL=300pF, 5V G0~G5, S11/G10~S15/G6 5V CL=300pF, Sn, Gn 5V 5V 5V 5V 5V 5V 5V 3/4 3/4 3/4 3/4 3/4 CLK rising edge to CS rising edge CLK rising edge to CLK falling edge
Maximum Clock Frequency 5V Duty=50%
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Functional Description
Display RAM and display mode The static display RAM is organized into 228 bits and stores the data transmitted from an external device to the HT16512 through a serial interface. The contents of the RAM are directly mapped to the contents of the VFD driver. Data in the RAM can be accessed through the data setting, address setting and display control commands. It is assigned addresses in 8-bit unit as follows:
S0 ~ S3 0H 2H 4H 6H 8H AH CH EH 0H 2H 4H S4 ~ S7 S8 ~ A d d re s s : 0 0 0 0 0 0 0 0 1 1 1 S11 0 0 0 0 0 0 0 0 1 1 1 D F 1 3 5 1 3 5 7 9 B S12 H H H H H H H H H H H ~ S15 D ig D ig D ig D ig D ig D ig D ig D ig D ig D ig D ig it0 it1 it2 it3 it4 it5 it6 it7 it8 it9 it1 0
K0~K3 are sampled by strobe signal S0/K0~S5/K5 and latched into the register. The key matrix is made up of a 64 matrix, as shown below.
S 0 /K 0 K0 K1 K2 K3 D e ta il S 1 /K 1 S 2 /K 2 S 3 /K 3 S 4 /K 4 S 5 /K 5
K e y m a tr ix
The data of each key is stored as illustrated below, and is read with the read command, starting from the least significant bit.
K0~K3 S 0 /K 0 S 2 /K 2 S 4 /K 4 K0~K3 S 1 /K 1 S 3 /K 3 S 5 /K 5 R e a d in g la s t R e a d in g fir s t
b0 b1 b2 b3 b4 b5 b6 b7
b0 b1 b2 b3 b4 b5 b6 b7
Dimming control HT16512 porvides 8-step dimmer function on display by controlling the 3-bit binary command code. The full pulse width of grid signal is divides into 16 uniform sections by PWM (pulse width modulation) technology. The 16 uniform sections available form 8 steps dimmer via 3-bit binary code. The 8-step dimmer includes 1/16, 2/16, 4/16, 10/16, 11/16, 12/16, 13/16 and 14/16. The 1/16 pulse width indicates minimum lightness. The 14/16 pulse width represents maximum lightness. (Refer to the display control command). Key matrix and key-input data storage RAM The key matrix scans the series key states at e a c h l ev el of t he key s tr ob e s i g n a l (S0/K0~S5/K5) output of the HT16512. The key strobe signal outputs are time-multiplexed signals from S0/K0~S5/K5. The states of inputs
b0 b1 b2 b3 b4 b5 b6 b7
LED port The LED port belongs to the CMOS output configuration. Data is written to the LED port with the write command, starting from the least ports least significant bit. In our application (see application circuits), the user adopts an internal NMOS device to a driver LED component by connecting VDD. When a bit of this port is 0, the corresponding LED lights; when the bit is 1, the LED turns off. The data of bits 5 through 8 are ignored.
MSB b3 b2 b1 LSB b0 LED LED LED LED 1 2 3 0
D o n 't c a r e
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SW data HT16512 provides an extra 4-bit general input port. The SW data is provided with available binary code. The SW data is read with the read command, starting from the least significant bit. Bits 5 through 8 of the SW data are 0.
MSB 0 0 0 0 b3 b2 b1 LSB b0 SW 0 SW 1 SW 2 SW 3
Commands Commands set the display mode and status of the VFD driver. The first 1 byte input to the HT16512 through the DI pin after the CS pin has fallen, is regarded as a command. If CS is set high while commands/data are transmitted, serial communication is initialized, and the commands/data being transmitted are not valid (however, the commands/data previously transmitted remains valid).
* Display mode setting commands
These commands initialize the HT16512 and select the number of segments and the number of grids (1/4~1/11 duty, 11 segments to 16 segments). When these commands are executed, the display is forcibly turned off, and key scanning is also stopped. To resume display, the display command ON must be executed. If the same mode is selected, nothing happens.
MSB 0 0 b2 b1 LSB b0 D is 000 001 010 011 100 101 110 111 p la :4 :5 :6 :7 :8 :9 :1 :1 ym d ig d ig d ig d ig d ig d ig 0d 1d ode its , its , its , its , its , its , ig its ig its s e ttin 16 seg 16 seg 16 seg 15 seg 14 seg 13 seg ,12 se ,11 se gs me me me me me me gm gm
D o n 't c a r e
n ts n ts n ts n ts n ts n ts e n ts e n ts
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* Data setting commands
These commands set the data write and data read modes.
MSB 0 1 D o n 't c a r e b3 b2 b1 LSB b0 Da 00 01 10 11 ta w :W r :W r :R e :R e r ite ite ite ad ad a n d r e a d m o d e s e ttin g s d a ta to d is p la y m e m o r y d a ta to L E D p o rt k e y d a ta S W d a ta
A d d r e s s in c r e m e n t m o d e s e ttin g s ( d is p la y m e m o r y ) 0 : In c r e m e n ts a d d r e s s a fte r d a ta h a s b e e n w r itte n 1 : F ix e s a d d r e s s T e s t m o d e s e ttin g s 0 : N o rm a l m o d e 1 : T e s t m o d e , u s e r d o n 't u s e
* Address setting commands
These commands set the address of the display memory.
MSB 1 1 b4 D o n 't c a r e b3 b2 b1 LSB b0 A d d re s s (0 0 H ~ 1 5 H )
If address 16H or higher is set, data is ignored until a valid address is set.
* Display control commands
MSB 1 0 D o n 't c a r e b3 b2 b1 LSB b0 D im 000 001 010 011 100 101 110 111 m in :Se :Se :Se :Se :Se :Se :Se :Se gq tp tp tp tp tp tp tp tp ua u ls u ls u ls u ls u ls u ls u ls u ls n tity e w id e w id e w id e w id e w id e w id e w id e w id se th th th th th th th th ttin to to to to to to to to gs 1 /1 6 2 /1 6 4 /1 6 1 0 /1 1 1 /1 1 2 /1 1 3 /1 1 4 /1 6 6 6 6 6
T u r n s o n /o ff d is p la y 0 : D is p la y o ff ( k e y s c a n c o n tin u e s ) 1 : D is p la y o n
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Timing Diagrams
tf 90% S n /G n 10% tS
W
tr1 ( tr2 )
CS tC
W
tC
W
tC
S
CLK tS
U
th
DI tP DO
HL
tP
LH
Key scanning and display timing
K e y s c a n d a ta S n /K n o u tp u t D ig it 0 D ig it 1 D ig it 2 D ig it n 1 2 3 4 5 6 D ig it 0
G 0 o u tp u t
G 1 o u tp u t
t
t
G 2 o u tp u t
G n o u tp u t
T @ 500 ms
1 fra m e = T (n + 1 )
N o te : n = 0 ~ t= 1 /1 T:pu O ne
6T ls e w id th o f s e g m e n t s ig n a l is d e c id e d b y o s c illa to r fr e q u e n c y c y c le o f k e y s c a n n in g c o n s is ts o f o n e fr a m e .
5
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Serial communication format
* Reception (command/data write)
CS
CLK 1
2
3
7
8
DI
b0
b1
b2
b6
b7
* Transmission (data read)
CS
CLK
1
2
3
4
5
6
7
8
tW b7
1
2
3
4
5
6
DI
b0
b1
b2
b3
b4
b5
b6
DO A d a ta r e a d c o m m a n d is s e t
b0
b1
b2
b3
b4
b5
D a ta is r e a d
DO
m u s t b e s u r e to c o n n e c t a n e x te r n a l p u ll- h ig h r e s is to r to th is p in ( 1 k W N o te : W h e n d a ta is r e a d , a w a it tim e " tW " o f 1 m s is n e c e s s a r y .
* Updating display memory by incrementing address
CS
to 1 0 k W ).
CLK
DI
Com m and 1
Com m and 2
Com m and 3
D a ta 1
D a ta n
Com m and 4
Com Com Com D a ta Com
m an m an m an 1 to m an
d 1:s d 2:s d 3:s n : tra d 4:c
e ts d is p la y m o d e e ts d a ta e ts a d d re s s n s fe r s d is p la y d a ta ( 2 2 b y te s m a x .) o n tr o ls d ip la y
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* Updating specific addresses
CS
CLK
DI
Com m and 1
Com m and 2
D a ta
Com m and 2
D a ta
C o m m a n d 1 : s e ts d a ta C o m m a n d 2 : s e ts a d d re s s D a ta : d is p la y d a ta
Application Circuits
R6 R7 R8 R9
D1
D2
D3
D4
D5
D6
S0 S1 S2 S3
V
DD
S4 S5 VDD K0 K1 K2 K3 S 0 /K 0 S 1 /K 1 S 2 /K 2 S 3 /K 3 S 4 /K 4 S 5 /K 5 5 S e g m e n ts 5 G r id s /S e g m e n ts 6 G r id s VFD Ef
R
OSC
OSC CS CLK MCU R1 V
DD
S6~S10
DI
06$#
S 1 1 /G 1 0 ~ S 1 5 /G 6 G 0~G 5 VEE
-2 5 V
DO
LED0 R2 R3
LED1 R4
LED2 R5
LED3
SW 0
SW 1
SW 2
SW 3
VSS
V
DD
Note: ROSC=51kW for oscillator resistor R1=1~10kW for external pull-high resistor R2~R5=750W~1.2kW R6~R9=10kW for external pull-low resistor D1~D6=1N4001 Ef=Filament voltage for VFD
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Holtek Semiconductor Inc. (Headquarters) No.3 Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan, R.O.C. Tel: 886-3-563-1999 Fax: 886-3-563-1189 Holtek Semiconductor Inc. (Taipei Office) 5F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan, R.O.C. Tel: 886-2-2782-9635 Fax: 886-2-2782-9636 Fax: 886-2-2782-7128 (International sales hotline) Holtek Semiconductor (Hong Kong) Ltd. RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong Tel: 852-2-745-8288 Fax: 852-2-742-8657 Copyright a 1999 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw.
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