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Advanced Power MOSFET
FEATURES
Avalanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating Area Lower Leakage Current : 10 A (Max.) @ VDS = -250V Low RDS(ON) : 3.5 (Typ.)
1
SFW/I9614
BVDSS = -250 V RDS(on) = 4.0 ID = -1.6 A
D2-PAK
2
I2-PAK
1 3 2 3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol VDSS ID IDM VGS EAS IAR EAR dv/dt PD Characteristic Drain-to-Source Voltage Continuous Drain Current (TC=25 C) Continuous Drain Current (TC=100 C) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt
o Total Power Dissipation (TA=25 C) * o o
Value -250 -1.6 -1.0
1 O
Units V A A V mJ A mJ V/ns W W W/ C
o
-6.5 + 30 _ 112 -1.6 2.0 -4.8 3.1 20 0.16 - 55 to +150
O 1 O 1 O 3 O
2
Total Power Dissipation (TC=25 C) Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8" from case for 5-seconds
o
TJ , TSTG TL
o
C
300
Thermal Resistance
Symbol RJC RJA RJA Characteristic Junction-to-Case Junction-to-Ambient * Junction-to-Ambient Typ. ---Max. 6.25 40 62.5
o
Units C/W
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B1
2001 Fairchild Semiconductor Corporation
SFW/I9614
Symbol BVDSS BV/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Characteristic Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse Drain-to-Source Leakage Current Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain( "Miller" ) Charge Min. Typ. Max. Units -250 --2.0 ------------------0.21 ------1.0 225 35 13 10 18 24 11 9 2.0 4.6 ---4.0 -100 100 -10 -100 4.0 -295 55 20 30 45 60 30 11 --nC ns pF A S V
o
P-CHANNEL POWER MOSFET
Electrical Characteristics (TC=25oC unless otherwise specified)
Test Condition VGS=0V,ID=-250A See Fig 7 VDS=-5V,ID=-250A VGS=-30V VGS=30V VDS=-250V VDS=-200V,TC=125 C VGS=-10V,ID=0.8A VDS=-40V,ID=-0.8A
4 O 4 O
o
V/ C ID=-250A V nA
VGS=0V,VDS=-25V,f =1MHz See Fig 5 VDD=-125V,ID=-1.6A, RG=24 See Fig 13
45 OO
VDS=-200V,VGS=-10V, ID=-1.6A See Fig 6 & Fig 12
45 OO
Source-Drain Diode Ratings and Characteristics
Symbol IS ISM VSD trr Qrr Characteristic Continuous Source Current Pulsed-Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge
1 O 4 O
Min. Typ. Max. Units --------130 0.61 -1.6 -6.5 -4.0 --A V ns C
Test Condition Integral reverse pn-diode in the MOSFET TJ=25 C,IS=-1.6A,VGS=0V TJ=25 C,IF=-1.6A diF/dt=100A/s
4 O
o o
1 O 2 O 3 O 4 O 5 O
Notes ; Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature L=70mH, IAS=-1.6A, VDD=-50V, RG=27*, Starting TJ =25oC _ ISD< -1.6A, di/dt < 250A/s, VDD< BVDSS , Starting TJ =25oC _ _ _ Pulse Test : Pulse Width = 250s, Duty Cycle< 2% Essentially Independent of Operating Temperature
P-CHANNEL POWER MOSFET
Fig 1. Output Characteristics
VGS -15 V -10 V -8.0 V -7.0 V -6.0 V -5.5 V -5.0 V Bottom : -4.5 V Top :
SFW/I9614
Fig 2. Transfer Characteristics
[A]
[A] -I D , Drain Current
10
0
-I D , Drain Current
10
0
150 C 10
-1
o
10
-1
25 C - 55 C
o
o
@ Notes : 1. 250 s Pulse Test 2. TC = 25 C
-2 o
@ Notes : 1. VGS = 0 V 2. VDS = -40 V 3. 250 s Pulse Test 8 10
10
10
-1
-2
10
10
0
10
1
2
4
6
-VDS , Drain-Source Voltage
[V]
-VGS , Gate-Source Voltage
[V]
12
RDS(on) , [ ] Drain-Source On-Resistance
10
-I DR , Reverse Drain Current
[A]
Fig 3. On-Resistance vs. Drain Current
Fig 4. Source-Drain Diode Forward Voltage
8
10
0
VGS = -10 V
6
150 C 10
-1
o
4 VGS = -20 V @ Note : TJ = 25 C 0 0 1 2 3 4 5 6
o
25 C @ Notes : 1. VGS = 0 V 2. 250 s Pulse Test
o
2
10
-2
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
-ID , Drain Current
[A]
-VSD , Source-Drain Voltage
[V]
Fig 5. Capacitance vs. Drain-Source Voltage
40 0 C =C +C (C =sotd) iss gs gd ds h r e C =C +C oss ds gd C =C rss gd
12
Fig 6. Gate Charge vs. Gate-Source Voltage
VDS = -50 V 10 VDS = -125 V VDS = -200 V 8
30 0
C iss
Capacitance [pF]
20 0
C oss @Nts: oe 1 V =0V . GS 2 f=1Mz . H
-V GS , Gate-Source Voltage
[V]
6
10 0
C rss
4
2 @ Notes : ID = -1.6 A 0 0 2 4 6 8 10
00 1 0
11 0
-VDS , Drain-Source Voltage [V]
QG , Total Gate Charge
[nC]
SFW/I9614
Fig 7. Breakdown Voltage vs. Temperature
-BV DSS , (Normalized) Drain-Source Breakdown Voltage
1.2
2.5
P-CHANNEL POWER MOSFET
Fig 8. On-Resistance vs. Temperature
RDS(on) , (Normalized) Drain-Source On-Resistance
2.0
1.1
1.5
1.0
1.0 @ Notes : 1. VGS = -10 V 2. ID = -0.8 A
0.9
@ Notes : 1. VGS = 0 V 2. ID = -250 A
0.5
0.8 -75
-50
-25
0
25
50
75
100
125
150
175
0.0 -75
-50
-25
0
25
50
75
100
125
150
175
TJ , Junction Temperature
[ C]
o
TJ , Junction Temperature
[ C]
o
Fig 9. Max. Safe Operating Area
-ID , Drain Current [A]
Oeaini Ti Ae prto n hs ra i L m t d b R DS(on) s iie y 1 0
1
Fig 10. Max. Drain Current vs. Case Temperature
20 .
-ID , Drain Current [A]
16 .
01m .s 1m s 10 0 D C @Nts: oe 1 T = 2 oC .C 5 2 T = 1 0 oC .J 5 3 Snl Ple . ige us 1m 0s
12 .
08 .
1 -1 0
04 .
1 -2 0 0 1 0
11 0
12 0
00 . 2 5
5 0
7 5
10 0
15 2
10 5
-VDS , Drain-Source Voltage [V]
Tc , Case Temperature [oC]
Fig 11. Thermal Response
Thermal Response
D=0.5 @ Notes : 1. Z J C (t)=6.25 o C/W Max. 2. Duty Factor, D=t1 /t2 3. TJ M -TC =PD M *Z J C (t)
P. DM t1. t2.
0.2 100 0.1 0.05
Z (t) ,
0.02 0.01 10
-1
JC
single pulse
10- 5
10- 4
10- 3
10- 2
10- 1
100
101
t 1 , Square Wave Pulse Duration
[sec]
P-CHANNEL POWER MOSFET
Fig 12. Gate Charge Test Circuit & Waveform
SFW/I9614
" Current Regulator "
50K 12V 200nF 300nF
Same Type as DUT
VGS Qg
-10V
VDS VGS DUT
-3mA
Qgs
Qgd
R1
Current Sampling (IG) Resistor
R2
Current Sampling (ID) Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
RL Vout Vin RG DUT -10V Vout
90%
t on
t off tr td(off) tf
VDD
( 0.5 rated VDS )
td(on)
Vin
10%
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
LL VDS
Vary tp to obtain required peak ID
BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD
tp
ID VDD
Time VDS (t)
RG DUT -10V
tp
C
VDD IAS BVDSS
ID (t)
SFW/I9614
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
P-CHANNEL POWER MOSFET
+ VDS DUT -IS L Driver RG VGS
Compliment of DUT (N-Channel)
VGS
VDD
* dv/dt controlled by "RG" * IS controlled by Duty Factor "D"
VGS ( Driver )
Gate Pulse Width D = -------------------------Gate Pulse Period
10V
Body Diode Reverse Current
IS ( DUT )
IRM
di/dt IFM , Body Diode Forward Current
Vf VDS ( DUT )
Body Diode Forward Voltage Drop Body Diode Recovery dv/dt
VDD
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM
DISCLAIMER
FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM
OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R)
SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R)
VCXTM
STAR*POWER is used under license
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H4

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