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NJU8713
PRELIMINARY
2V Operation Switching Driver for Class D Amplifier
! GENERAL DESCRIPTION
The NJU8713 is a Switching Driver for a class D Amplifier including Separated Power Source terminals between Input and Output, BEEP and BPZ (Bipolar Zero) output circuits. It converts 1bit digital signal input, such as PWM or PDM signal, to an analog signal output through a simple external LC low-pass filter. The NJU8713 realizes very high power-efficiency because of the class D operation. Therefore, it is suitable for portable audio set and others.
! PACKAGE OUTLINE
NJU8713V
! FEATURES
# # # # # # # # 2-channel 1bit Audio Signal Input Standby(Hi-Z), BPZ Control Internal BPZ Charger Beep Function Operating Voltage : 1.7V to 2.7V Driving Voltage : 1.7V to VDD CMOS Technology Package Outline : SSOP14
! PIN CONFIGURATION
MCK VSS IN1 EN1 VSSO OUT1 VDDO 1 2 3 4 5 6 7 14 13 12 11 10 9 8 BEEP VDD IN2 EN2 VSSO OUT2 VDDO
! BLOCK DIAGRAM
VDD VSS
BPZ Output
VDDO
VSSO
IN1
OUT1
BEEP
IN2
Output Control BPZ Output
OUT2
MCK
EN1
EN2
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NJU8713
! TERMINAL DESCRIPTION
No. 13 2 7 8 5 10 1 4 11 3 12 14 SYMBOL VDD VSS VDDO VSSO MCK EN1 EN2 IN1 IN2 BEEP I/O Function Operation Power Supply, VDD=2V Operation Power GND, VSS=0V Driving Power Supply, VDDO=2V Terminal No.7 and No.8 should be connected to the same electric potential. Driving Power GND, VSSO=0V Terminal No.5 and No.10 should be connected to the same electric potential. Master Clock Input Terminal
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I I I I
The condition of the data input terminal is fetched with the rising edge of this signal.
Output Control Terminal Output circuit is selected by the condition of this terminal. Audio Signal Input Terminal 1-bit Audio Signal inputs into this terminal. Beep Signal Input Terminal Beep signal inputs into this terminal. Output Terminal * When Output Terminal selects Audio Signal, IN1 terminal input data outputs from OUT1 terminal and IN2 terminal input data outputs from OUT2 terminal. * When Output Terminal selects Beep Signal, BEEP terminal input data outputs from OUT1 and OUT2 terminals.
6 9
OUT1 OUT2
O
! INPUT TERMINAL STRUCTURE
VDD
Input Terminal
Inside Circuit
VSS
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NJU8713 NJU3555
! FUNCTIONAL DESCRIPTION
(1) Signal Output PWM signals of L channel and R output from OUT1 and OUT2 terminals respectively. These signals are converted to analog signal by external 2nd-order or over LC filter. The output driver power supplied from VDDO and VSSO are required high response power supply against voltage fluctuation like as switching regulator because Output T.H.D is effected by power supply stability. (2) Master Clock Master clock (MCK) synchronizes the Audio signal inputs (IN1 and IN2). The setup time and the hold time should be kept in the AC characteristics because IN1 and IN2 are fetched with the rising edge of MCK. MCK requires jitter-free or jitter as small as possible because the jitter downs S/N ratio. Therefore, OUT1 and OUT2 occur the pop noise when MCK is stopped in operation without standby mode. the standby mode should be set before MCK stop. (3) Output Control Output circuit is selected by the conditions of EN1 and EN2 terminals. EN2 0 0 1 1 EN1 0 1 0 1 Output State of OUT1 & OUT2 Standby(High impedance) Audio Signal Output BPZ Output Beep Signal Output
(4) Beep Function The beep signal must be input before the rising edge of EN2 signal and must be stopped after the falling edge of EN2 signal. EN1 EN2 MCK BEEP
Audio Signal Output Beep Signal Output Audio Signal Output
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NJU8713
(5) BPZ Function BPZ Function operates to charge the external AC coupling capacitor for the BPZ level which is a point of the analog signal common. Be sure to input sound-less data to IN1 and IN2 in busy of the BPZ function. At this time, the sound-less signal must be input before the rising edge of EN2 signal and must be continue after the falling edge of EN2 signal. The charging time is in proportion to the capacity value of the external AC coupling capacitor.
EN1 EN2 MCK IN1, IN2
Standby Sound-less Data BPZ Output Audio Data Audio Signal Output Standby
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NJU8713 NJU3555
! ABSOLUTE MAXIMUM RATINGS
PARAMETER Operation Supply Voltage Driving Supply Voltage Input Voltage Operating Temperature Storage Temperature Power Dissipation SSOP14 Power Supply Voltage Condition SYMBOL VDD VDDO Vin Ta Tstg PD RATING -0.3 to +4.0 -0.3 to +2.7 -0.3 to VDD+0.3 -40 to +85 -40 to +125 300 VDD VDDO (Ta=25C) UNIT V V V C C mW V
Note 1) All voltage values are specified as VSS=VSSO=0V. Note 2) If the LSI is used on condition beyond the absolute maximum rating, the LSI may be destroyed. Using LSI within electrical characteristics is strongly recommended for normal operation. Use beyond the electrical characteristics conditions will cause malfunction and poor reliability. Note 3) Decoupling capacitors should be connected between VDD-VSS and VDDO-VSSO due to the stabilized operation.
! ELECTRICAL CHARACTERISTICS
(Ta=25C, VDD=VDDO=2.0V, VSS=VSSO=0.0V, Load Impedance=32, fS=44.1kHz, unless otherwise noted) PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX. UNIT VDD Supply Voltage VDDO Supply Voltage BPZ Driving Voltage Output Driver High side Resistance Output Driver Low side Resistance Beep High side Current Beep Low side Current Operating Current At Standby Operating Current At no input signal VDD VDDO VBPZ RH RL IBH IBL IST IDD IDDO VIH Input Voltage VIL Input Leakage Current ILK 0 0.3VDD 1 V uA load operating MCK=256fS IN1, IN2=32fS Duty50% VOUT=VDDO-0.1V VOUT=0.1V VOUT=VDDO-1V VOUT=1V Stopping MCK, IN1, IN2, BEEP No-load operating IN1, IN2=32fS MCK=256fS 1.7 1.7 VDDO /2-0.2 20 20 0.7VDD 2.0 2.0 VDDO /2 1.5 1.5 50 50 0.05 0.6 2.7 VDD VDDO /2+0.2 2 2 150 150 1 0.1 1.2 VDD V V V uA uA uA mA V
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NJU8713
! TIMING CHARACTERISTICS
*
Audio Signal Input tMCKH MCK tMCKI IN1, IN2 tDS PARAMETER MCK Frequency MCK Pulse Width (H) MCK Pulse Width (L) IN1,IN2 Setup Time IN1,IN2 Hold Time BEEP Frequency SYMBOL fMCKI tMCKH tMCKL tDS tDH fBEEP tDH (Ta=25C, VDD=VDDO=2.0V, VSS=VSSO=0.0V, unless otherwise noted) CONDITIONS MIN. TYP. MAX. UNIT 8 12 12 20 20 0.1 25 20 MHz ns ns ns ns kHz tMCKL
Note 4) tMCKI shows the cycle of the MCK signal.
*
Output Control Signal Input EN1
tED
0.1VDD 0.9VDD 0.5VDD
tEr EN2
0.9VDD 0.5VDD 0.1VDD
tEf PARAMETER Rise Time Fall Time Switching Time SYMBOL tEr tEf tED (Ta=25C, VDD=VDDO=2.0V, VSS=VSSO=0.0V, unless otherwise noted) CONDITIONS MIN. TYP. MAX. UNIT 50 50 100 ns ns ns
Note 5) All timings are based on 30% and 70% voltage level of VDD.
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NJU8713 NJU3555
! APPLICATION CIRCUIT
* Stereo
OTL application example
*A914BY-101M is manufactured by TOKO, INC. For further information, please refer to its technical papers.
220uF A914BY-101M 0.22uF
3
Audio Signal
IN1 IN2 BEEP EN1 EN2 MCK VDD VSS
100uH
1k
OUT1 6
12
Beep Signal
32 Headphone
14 4
220uF A914BY-101M
NJU8713
0.22uF
100uH
Output Control
11
Master Clock
VDDO VSSO VDDO VSSO
2.2uF
1
7 5
2.2uF
2.2uF 100uF
Switching Regulator
Logic Power
10uF 2.2uF 13
8 10
2
*1
channel BTL application example
*A914BY-101M is manufactured by TOKO, INC. For further information, please refer to its technical papers.
A914BY-101M
100uH 0.22uF
Audio Signal
3 12 14 4
IN1 IN2
OUT1
6 32 Speaker
100uH
NJU8713
BEEP EN1 EN2 MCK VDD VSS
OUT2
9 A914BY-101M
Output Control
11
Master Clock
VDDO VSSO VDDO VSSO
2.2uF
1
7 5
2.2uF
2.2uF 100uF
0.22uF
Switching Regulator
Logic Power
10uF 2.2uF 13
8 10
2
Note 6) De-coupling capacitors must be connected between each power supply pin and GND pin. Note 7) The power supply for VDDO requires fast driving response performance such as a switching regulator for T.H.D. Note 8) The bigger capacitor value of external AC-coupling capacitors realize better low frequency response characteristics. In addition, ESR(Equivalent Series Resistance) should be low. Note 9) The above circuit shows only application example and does not guarantee the any electrical characteristics. Therefore, please consider and check the circuit carefully to fit your application.
1k
OUT2 9
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NJU8713
[CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.
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