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| HCF4041UB QUAD TRUE/COMPLEMENT BUFFER s s s s s s s s BALANCED SINK AND SOURCE CURRENT: APPROXIMATELY 4 TIMES STANDARD "B" DRIVE EQUALIZED DELAY TO TRUE AND COMPLEMENT OUTPUTS QUIESCENT CURRENT SPECIFIED UP TO 20V STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC JESD13B " STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES" DIP SOP ORDER CODES PACKAGE DIP SOP TUBE HCF4041UBEY HCF4041UBM1 T&R HCF4041UM013TR DESCRIPTION The HCF4041UB is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. The HCF4041UB is a QUAD TRUE/ COMPLEMENT buffer consisting of n and p channel units having low channel resistance and high current (sourcing and sinking) capability. This device is intended for use as a buffer, line driver, or CMOS to TTL driver. It can be used as an ultra-low power resistor network driver for A/D and D/A conversion, as a transmission line driver, and in other applications where high noise immunity and low power dissipation are primary design requirements. PIN CONNECTION September 2001 1/8 HCF4041UB INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 3, 6, 10, 13 1, 4, 8, 11 2, 5, 9, 12 7 14 SYMBOL A, B, C, D E, G, K, M F, H, L, N VSS VDD NAME AND FUNCTION Data Inputs Data Outputs (TRUE) Data Outputs (COMPLEMENT) Negative Supply Voltage Positive Supply Voltage TRUTH TABLE INPUTS A, B, C, D H L OUTPUTS (TRUE) E, G, K, M H L OUTPUTS (COMPLEMENT) F, H, L, N L H FUNCTIONAL DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol VDD VI II PD Top Tstg Supply Voltage DC Input Voltage DC Input Current Power Dissipation per Package Power Dissipation per Output Transistor Operating Temperature Storage Temperature Parameter Value -0.5 to +22 -0.5 to VDD + 0.5 10 200 100 -55 to +125 -65 to +150 Unit V V mA mW mW C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage values are referred to VSS pin voltage. 2/8 HCF4041UB RECOMMENDED OPERATING CONDITIONS Symbol VDD VI Top Supply Voltage Input Voltage Operating Temperature Parameter Value 3 to 20 0 to VDD -55 to 125 Unit V V C DC SPECIFICATIONS Test Condition Symbol Parameter VI (V) 0/5 0/10 0/15 0/20 0/5 0/10 0/15 5/0 10/0 15/0 0.5/4.5 1/9 1.5/13.5 4.5/0.5 9/1 13.5/1.5 2.5 4.6 9.5 13.5 0.4 0.5 1.5 VO (V) |IO| VDD (A) (V) 5 10 15 20 5 10 15 5 10 15 5 10 15 5 10 15 5 5 10 15 5 10 15 18 TA = 25C Min. Typ. 0.02 0.02 0.02 0.04 4.95 9.95 14.95 0.05 0.05 0.05 4 8 12.5 1 2 2.5 -5.44 -12.8 -1.36 -3.2 -4.25 -10 -16.1 -38 1.36 3.2 4.25 10 16.1 38 10-5 15 0.1 22.5 -4.08 -1.02 -3.18 -12.1 1.02 3.18 12.11 1 4 8 12.5 1 2 2.5 -4.08 -1.02 -3.18 -12.1 1.02 3.18 12.11 1 Max. 1 2 4 20 4.95 9.95 14.95 0.05 0.05 0.05 4 8 12.5 1 2 2.5 Value -40 to 85C Min. Max. 30 60 120 600 4.95 9.95 14.95 0.05 0.05 0.05 -55 to 125C Min. Max. 30 60 120 600 Unit IL Quiescent Current A VOH High Level Output Voltage Low Level Output Voltage High Level Input Voltage Low Level Input Voltage Output Drive Current VOL VIH VIL IOH IOL Output Sink Current Input Leakage Current Input Capacitance 0/5 0/5 0/10 0/15 0/5 0/10 0/15 0/18 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 V V V V mA mA A pF II CI Any Input Any Input The Noise Margin for both "1" and "0" level is: 1V min. with VDD =5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V 3/8 HCF4041UB DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25C, CL = 50pF, RL = 200K, tr = tf = 20 ns) Test Condition Symbol Parameter VDD (V) 5 10 15 5 10 15 Min. Value (*) Typ. 60 35 25 40 20 15 Max. 120 70 50 80 40 30 ns Unit tPLH tPHL Propagation Delay Time tTLH tTHL Output Transition Time ns (*) Typical temperature coefficient for all VDD value is 0.3 %/C. TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance) RL = 200K RT = ZOUT of pulse generator (typically 50) 4/8 HCF4041UB WAVEFORM 1 : PROPAGATION DELAY TIMES FOR NON INVERTING CONDITIONS (f=1MHz; 50% duty cycle) WAVEFORM 2 : PROPAGATION DELAY TIMES FOR INVERTING CONDITIONS (f=1MHz; 50% duty cycle) 5/8 HCF4041UB Plastic DIP-14 MECHANICAL DATA mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 1.27 3.3 2.54 0.050 8.5 2.54 15.24 7.1 5.1 0.130 0.100 0.51 1.39 0.5 0.25 20 0.335 0.100 0.600 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.055 0.020 0.010 0.787 0.065 TYP. MAX. inch P001A 6/8 HCF4041UB SO-14 MECHANICAL DATA DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 8.55 5.8 1.27 7.62 4.0 5.3 1.27 0.68 8 (max.) 0.149 0.181 0.019 8.75 6.2 0.35 0.19 0.5 45 (typ.) 0.336 0.228 0.050 0.300 0.157 0.208 0.050 0.026 0.344 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 PO13G 7/8 HCF4041UB Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom (c) http://www.st.com 8/8 |
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