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 8M x 32-Bit Dynamic RAM Module SMALL OUTLINE MEMORY MODULE
HYM 328020GD-50/-60
Preliminary Information
* *
8 388 608 words by 32-bit organization Fast access and cycle time 50 ns access time 95 ns cycle time (-50 version) 60 ns access time 110 ns cycle time (-60 version) Fast page mode capability with 35 ns cycle time (-50 version) 40 ns cycle time (-60 version) Single + 3.3 V ( 0.3 V) supply Low power dissipation max. 2016 mW active (-50 version) max. 1728 mW active (-60 version) LVCMOS- 3.6 mW standby LVTTL - 28.8 mW standby
*
* *
* * * * * * *
CAS-before-RAS refresh, RAS-only-refresh, Self Refresh 4 decoupling capacitors mounted on substrate All inputs, outputs and clock fully TTL compatible 72 pin, dual read-out, two bank, Small Outline DIMM Module Utilizes four 4M x 16 -DRAMs (HYB 3165160T) 4096 refresh cycles / 64 ms Gold contact pad
Semiconductor Group
195
11.94
HYM328020GD-50/-60 8M x 32 SO-DIMM
The HYM 328020GD -50/-60 is a 32 MByte DRAM module organized as 8 388 608 words by 32-bit in a 72-pin, dual read-out, small outline package comprising four HYB 3165160T 4M x 16 DRAMs in 500 mil wide TSOPII-54 - packages mounted together with four 0.2 F ceramic decoupling capacitors on a PC board. Each HYB 3165800T is described in the data sheet and is fully electrically tested and processed according to Siemens standard quality procedure prior to module assembly. After assembly onto the board, a further set of electrical tests is performed. The density and speed of the module can be detected by the use of presence detect pins. These modules are ideal for portable systems applications where high memory capacity is needed. Ordering Information Type HYM 328020GD -50 HYM 328020GD -60 Pin Names A0-A11 A0-A9 DQ0 - DQ31 RAS0 - RAS3 CAS0 - CAS3 WE Vcc Vss PD1 - PD7 N.C. Row Address Input Column Address Inputs Data Input/Output Row Address Strobe Column Address Strobe Read / Write Input Power (+3.3 Volt) Ground Presence Detect Pins No Connection Ordering Code on request on request Package L-DIM-72-2 L-DIM-72-2 Descriptions 50 ns DRAM module 60 ns DRAM module
Presence-Detect and ID-pin Thruth Table *): Module HYM 328020GD -50 HYM 328020GD -60 PD1 NC NC PD2 NC NC PD3 VSS VSS PD4 VSS VSS PD5 VSS NC PD6 VSS NC PD7 NC NC
note: PD1 .. PD4 : configuration PD5 .. PD6 : speed PD7 : refresh mode (NC = normal refresh) *) according to JEDEC letter ballot JC-42.5-95 Item #646/651
Semiconductor Group
196
HYM328020GD-50/-60 8M x 32 SO-DIMM
Pin Configuration
PIN 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35
Name VSS DQ1 DQ3 DQ5 DQ7 PD1 A1 A3 A5 A10 DQ8 DQ10 DQ12 DQ14 A11 A8 RAS3 DQ15
PIN 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71
NAME DQ16 VSS CAS2 CAS1 RAS1 WRITE DQ18 DQ20 DQ22 NC DQ25 DQ28 VCC DQ30 NC PD3 PD5 PD7
PIN 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36
NAME DQ0 DQ2 DQ4 DQ6 VCC A0 A2 A4 A6 NC DQ9 DQ11 DQ13 A7 VCC A9 RAS2 NC
PIN 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
NAME DQ17 CAS0 CAS3 RAS0 NC NC DQ19 DQ21 DQ23 DQ24 DQ26 DQ27 DQ29 DQ31 PD2 PD4 PD6 VSS Pin2 Pin1
Pin72
Pin71
Front Side
Back Side DQ0-DQ7 I/O1-I/O8 I/O9-I/O16 DQ8-DQ15 I/O9-I/O16 I/O1-I/O8
RAS0 CAS0 CAS1
RAS UCAS LCAS OE
RAS UCAS LCAS
RAS1 CAS0 CAS1
D1 DQ16-DQ23 I/O1-I/O8 I/O9-I/O16 DQ24-DQ31
D3
OE RAS UCAS LCAS RAS3 CAS2 CAS3
RAS2 CAS2 CAS3
RAS UCAS LCAS OE
I/O1-I/O8 I/O9-I/O16
D2
D4
OE
WE A0-A11 VCC VSS
D1 - D4 D1 - D4 C1 - C4 D1 - D4 Block Diagram
Semiconductor Group
197
HYM328020GD-50/-60 8M x 32 SO-DIMM
Absolute Maximum Ratings 1) Operating temperature range..............................................................................................0 to 70 C Storage temperature range.........................................................................................- 55 to 150 C Soldering temperature.............................................................................................................260 C Soldering time..............................................................................................................................10 s Input/output voltage..................................................................................-0.5 to min (Vcc+0.5,4.6) V Power supply voltage....................................................................................................-0.5V to 4.6 V Power dissipation......................................................................................................................1.0 W Data out current (short circuit)..................................................................................................50 mA
DC Characteristics TA = 0 to 70 C, VSS = 0 V, VCC = 3 V 0.3 V Parameter Input high voltage Input low voltage Output high voltage (LVTTL) Output H" level voltage (Iout = -2mA) Output low voltage (LVTTL) Output L"level voltage (Iout = +2mA) Output high voltage (LVCMOS) Output H" level voltage (Iout = -100uA) Ouput low voltage (LVCMOS) Output L" level voltage (Iout = +100uA) Input leakage current,any input
(0 V < Vin < Vcc , all other pins = 0 V
Symbol
Limit Values min. max. Vcc+0.3 0.8 - 0.4 2.0 - 0.3 2.4 -
Unit Note V V V V V V A A 6) 6) 2) 2)
VIH VIL VOH VOL VOH VOL II(L) IO(L) ICC1
-50 ns version -60 ns version
Vcc-0.2 - 10 - 10 0.2 10 10
Output leakage current
(DO is disabled, 0 V < Vout < Vcc )
Average Vcc supply current:
- -
560 480 8
mA mA mA
3) 4) 5)
(RAS, CAS, address cycling: tRC = tRC min.)
Standby Vcc supply current
(RAS=CAS= Vih)
ICC2
-
-
ICC3 Average Vcc supply current, during RAS-only refresh cycles: -50 ns version -60 ns version
(RAS cycling: CAS = VIH: tRC = tRC min.)
- -
560 480
mA mA
3) 5)
Semiconductor Group
198
HYM328020GD-50/-60 8M x 32 SO-DIMM
DC Characteristics (cont'd) TA = 0 to 70 C, VSS = 0 V, VCC = 3 V 0.3 V Parameter Symbol Limit Values min. max. 340 300 800 mA mA A 3) 4) 5) Unit Note
Average Vcc supply current,
during fast page mode: -50 ns version -60 ns version
ICC4
- -
(RAS = VIL, CAS, address cycling: tPC=tPC min.)
Standby Vcc supply current
(RAS=CAS= Vcc-0.2V)
ICC5
-
-
Average Vcc supply current, during CAS-before- ICC6 RAS refresh mode: -50 ns version -60 ns version
(RAS, CAS cycling: tRC = tRC min.)
- - -
560 480 800
mA mA A
3) 4)
Self Refresh Current
Average Power Supply Current during Self Refresh. (CBR cycle with tRAS>TRASSmin, CAS held low, WE = Vcc-0.2V, Address and Din=Vcc-0.2V or 0.2V)
ICC7
Semiconductor Group
199
HYM328020GD-50/-60 8M x 32 SO-DIMM
SO-DIMM PACKAGE OUTLINES
56.69 FRONT SIDE
3.81
17.78
1 E 44.45 R 2.0 7.62 8.255
71
25.40
1.0 +/- 0.1
2 R 2.0
72
BACK SIDE
1.0 note: mechanical key for supply voltage 5 V E = 6.35 3.3V E = 3.175
1.27
Preliminary Drawing
Semiconductor Group
200


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