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PD -9.1676A
PRELIMINARY
l l l l l
IRL3502S
HEXFET(R) Power MOSFET
D
Advanced Process Technology Surface Mount Optimized for 4.5V-7.0V Gate Drive Ideal for CPU Core DC-DC Converters Fast Switching
VDSS = 20V
G S
RDS(on) = 0.007W ID = 110A
Description
These HEXFET Power MOSFETs were designed specifically to meet the demands of CPU core DC-DC converters in the PC environment. Advanced processing techniques combined with an optimized gate oxide design results in a die sized specifically to offer maximum efficiency at minimum cost. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application.
D 2 P ak
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS VGSM EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 4.5V Continuous Drain Current, VGS @ 4.5V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Gate-to-Source Voltage (Start Up Transient, tp = 100s) Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
110 67 420 140 1.1 10 14 390 64 14 5.0 -55 to + 150 300 (1.6mm from case )
Units
A W W/C V V mJ A mJ V/ns C
Thermal Resistance
Parameter
RqJC RqJA Junction-to-Case Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
--- ---
Max.
0.89 40
Units
C/W
11/18/97
IRL3502S
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage DV(BR)DSS/DTJ Breakdown Voltage Temp. Coefficient V(BR)DSS RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LS Ciss Coss Crss Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. 20 --- --- --- 0.70 77 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- 0.019 --- --- --- --- --- --- --- --- --- --- --- 10 140 96 130 Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1.0mA 0.008 VGS = 4.5V, ID = 64A W 0.007 VGS = 7.0V, ID = 64A --- V VDS = VGS, ID = 250A --- S VDS = 10V, ID = 64A 25 VDS = 20V, VGS = 0V A 250 VDS = 10V, VGS = 0V, TJ = 150C 100 VGS = 10V nA -100 VGS = -10V 110 ID = 64A 27 nC VDS = 16V 39 VGS = 4.5V, See Fig. 6 --- VDD = 10V --- ID = 64A ns --- RG = 3.8W VGS = 4.5V , --- RD = 0.15W , Between lead, nH 7.5 --- and center of die contact 4700 --- VGS = 0V 1900 --- pF VDS = 15V 640 --- = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
I SM
V SD t rr Qrr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 110 showing the A G integral reverse --- --- 420 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 64A, VGS = 0V --- 87 130 ns TJ = 25C, IF = 64A --- 200 310 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature. Starting TJ = 25C, L = 190H RG = 25W , IAS = 64A.
Pulse width 300s; duty cycle 2%. Uses IRL3502 data and test conditions Calculated continuous current based on maximum allowable
junction temperature; for recommended current-handling of the package refer to Design Tip # 93-4
I 64A, di/dt 86A/s, VDD V(BR)DSS, SD
TJ 150C
** When mounted on FR-4 board using minimum recommended footprint. For recommended footprint and soldering techniques refer to application note #AN-994.
IRL3502S
1000
VGS 7.00V 5.00V 4.50V 3.50V 3.00V 2.70V 2.50V BOTTOM 2.25V TOP
1000
100
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
VGS 7.00V 5.00V 4.50V 3.50V 3.00V 2.70V 2.50V BOTTOM 2.25V TOP
100
2.25V
2.25V
10 0.1
20s PULSE WIDTH TJ = 25 C
1 10 100
10 0.1
20s PULSE WIDTH TJ = 150 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.0
TJ = 25 C
R DS(on) , Drain-to-Source On Resistance (Normalized)
ID = 110A
I D , Drain-to-Source Current (A)
1.5
TJ = 150 C
100
1.0
0.5
10 2 3 4
V DS = 15V 20s PULSE WIDTH 5 6
0.0 -60 -40 -20
VGS = 4.5V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
IRL3502S
8000
VGS , Gate-to-Source Voltage (V)
VGS = Ciss = Crss = Coss =
0V, f = 1MHz Cgs + Cgd , Cds SHORTED Cgd Cds + Cgd
15
ID = 64A VDS = 16V
12
C, Capacitance (pF)
6000
Ciss
9
4000
Coss
2000
6
Crss
0 1 10 100
3
0 0 40 80 120 160
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
10us
TJ = 150 C
I D , Drain Current (A)
100us
100
100
TJ = 25 C
1ms
10 0.5
V GS = 0 V
1.0 1.5 2.0 2.5
10 1
TC = 25 C TJ = 150 C Single Pulse
10
10ms 100
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
IRL3502S
120
800
LIMITED BY PACKAGE
100
EAS , Single Pulse Avalanche Energy (mJ)
TOP BOTTOM
600
ID 29A 40A 64A
I D , Drain Current (A)
80
60
400
40
200
20
0 25 50 75 100 125 150
0 25 50 75 100 125 150
TC , Case Temperature ( C)
Starting TJ , Junction Temperature( C)
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10. Maximum Avalanche Energy Vs. Drain Current
1
Thermal Response (Z thJC )
D = 0.50
0.20
0.1
0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) P DM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
IRL3502S
RDS (on) Drain-to-Source On Resistance (W) RDS (on) Drain-to-Source On Resistance (W)
0.014 0.010
0.012
0.008
0.010
0.008
I D = 64A
0.006
VG S = 4.5V
0.006
VG S = 7.0V
0.004 0 100 200 300 400
A
0.004 2.0 3.0 4.0 5.0 6.0 7.0 8.0
A
I D , D rain C urrent (A)
V G S , Gate-to-Source Voltage (V )
Fig 12. On-Resistance Vs. Drain Current
Fig 13. On-Resistance Vs. Gate Voltage
IRL3502S
D2Pak Package Outline
10.54 (.415) 10.29 (.405) 1.40 (.055) M A X. -A2 4.69 (.185) 4.20 (.165) -B1.32 (.052) 1.22 (.048) 6.47 (.255) 6.18 (.243) 15.4 9 (.610) 14.7 3 (.580) 5.28 (.208) 4.78 (.188) 1.40 (.055) 1.14 (.045) 3X 5.08 (.200) 1.39 (.055) 1.14 (.045) 2.79 (.110) 2.29 (.090) 2.61 (.103) 2.32 (.091) 8.8 9 (.350) REF. 10.16 (.400) REF.
1.78 (.070) 1.27 (.050)
1
3
3X
0.93 (.037) 0.69 (.027) 0.25 (.010) M BAM
0.55 (.022) 0.46 (.018)
M IN IM U M R E C O M M E N D E D F O O TP R IN T 11.43 (.450)
N O TE S : 1 D IM E N S IO N S A F T E R S O LD E R D IP . 2 D IM E N S IO N IN G & TO LE R A N C IN G P E R A N S I Y 14.5M , 1982. 3 C O N T R O LLIN G D IM E N S IO N : IN C H . 4 H E A TS IN K & LE A D D IM E N S IO N S D O N O T IN C LU D E B U R R S .
LE A D A S S IG N M E N TS 1 - G A TE 2 - D R A IN 3 - SOURCE
8.89 (.350) 17.78 (.700)
3.81 (.150) 2.08 (.082) 2X 2.54 (.100) 2X
Part Marking Information
D2Pak
IN TE R N A T IO N A L R E C TIF IE R LOGO ASSEMBLY LOT CODE
PART NUMBER F530S 9246 9B 1M
A
D A TE C O D E (Y Y W W ) YY = YEAR W W = W EEK
IRL3502S
Tape & Reel Information
D2Pak
TR R
1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 (.1 6 1 ) 3 .9 0 (.1 5 3 )
1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 0 .3 6 8 (.0 1 4 5 ) 0 .3 4 2 (.0 1 3 5 )
F E E D D IR E C TIO N 1 .8 5 (.0 7 3 )
1 .6 5 (.0 6 5 )
1 1 .6 0 (.4 5 7 ) 1 1 .4 0 (.4 4 9 )
1 5 .4 2 (.6 0 9 ) 1 5 .2 2 (.6 0 1 )
2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 )
TR L
1 0 .9 0 (.4 2 9 ) 1 0 .7 0 (.4 2 1 ) 1 .7 5 (.0 6 9 ) 1 .2 5 (.0 4 9 ) 1 6 .1 0 (.6 3 4 ) 1 5 .9 0 (.6 2 6 ) 4 .7 2 (.1 3 6 ) 4 .5 2 (.1 7 8 )
F E E D D IR E C T IO N
1 3.5 0 (.5 32 ) 1 2.8 0 (.5 04 )
2 7.4 0 (1 .07 9) 2 3.9 0 (.9 41 ) 4
330.00 (14.173) M A X.
6 0.0 0 (2 .3 6 2) M IN .
N O TES : 1. C O M F O R M S T O E IA -41 8 . 2. C O N T R O L LIN G D IM E N S IO N : M ILL IM E T E R . 3. D IM E N S IO N M E A S U R E D @ H U B . 4. IN C L U D E S F L A N G E D IS T O R T IO N @ O U T E R E D G E .
26 .40 (1.039) 24 .40 (.961) 3
3 0.4 0 (1 .1 97 ) MAX. 4
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 11/97

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