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For Video Equipment
MN676011NPS
NTSC Color Camera Synchronizing Signal Generator LSI
Overview
The MN676011NPS is a CMOS LSI that generates NTSC color camera synchronizing signals as defined by the EIA RS-170A standard. It features a built-in 4fSC (14.31818 MHz) crystal oscillator circuit and divides that frequency to generate the horizontal synchronizing signal fH (15.7 kHz), the vertical synchronizing signal f V (60 Hz), and the composite synchronizing signal. It also divides the 4fSC clock signal frequency by four to generate the color subcarrier frequency signals SC1 and SC2 and the burst signal gated with the burst flag (BF) pulse. It includes a vertical reset (VR) input pin for resetting the leading edge of the vertical synchronizing pulse (VP) with the falling edge of the input signal. It also includes separate clock input pins for the color subcarrier frequency signal circuits and the synchronizing signal circuits to permit synchronization with such external synchronizing LSIs as the MN6761S.
Pin Assignment
VDD1 VSS1 EX4fSCI 4fSCOSCI 4fSCOSCO SC1 SC3 BSC VPCO EXT/INT CP1 TEST VR EX910fHI
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
VDD2 VSS2 SYNC VP WHD BLK CP1V CP2 WBLK BF SW1 SW3 SW3 SW4
(TOP VIEW)
Features
Power-saving CMOS synchronizing signal generator (conformed to EIA RS-170A standard) Built-in 14.31818 MHz clock generator 12 signal outputs including horizontal and vertical synchronizing signals and color subcarrier frequency signals (The vertical synchronizing signal is available as the VP signal output.) Pins for switching BLK signal pulse widths
SOP028-P-0375
Applications
Color video cameras
MN676011NPS
Block Diagram
For Video Equipment
13
VR
EXT/INT 4fSCOSCI 4fSCOSCO 4 5 4fSC OSC HV-CLK SELECT 14 EX910fHI
EX4fSCI
3
SC-CLK SELECT
V-Reset
PHASE COMP.
9
VPCO
EXT/INT
10 1/4 1 2 28 27 D DFF CK D DFF
SC-Reset
1/4
1/525 1/2
1/455
18 17 16
SW1 SW2 SW3 SW4
VDD1 VSS1 VDD2 VSS2
Burst Gate D CK DFF
fV V-Decoder
fH
2fH H-Decoder
910fH
15
12 Composite Decoder
TEST
25
22
19
20
23
26
24
11 CP1
CP1V
BF
WBLK
BLK
SYNC
SC1
SC2
BSC
WHD
Pin Descriptions
Pin No. 1 2 28 Symbol VDD1 VSS1 VDD2 Pin Name Power supply Power supply Power supply Function Description "H" level power supply (Connect this pin to +5.0 0.5 V.) Power supply for color subcarrier frequency signal circuits "L" level power supply (Connect this pin to 0 V.) Power supply for color subcarrier frequency signal circuits "H" level power supply (Connect this pin to +5.0 0.5 V.) Power supply for horizontal and vertical synchronizing signals 27 VSS2 Power supply "L" level power supply signals (Connect this pin to 0 V.) Power supply for horizontal and vertical synchronizing
CP2
VP
21
6
7
8
For Video Equipment
Pin Descriptions (continued)
Pin No. 4 Symbol 4fSCOSCI Pin Name Crystal oscillator input 5 4fSCOSCO Crystal oscillator output 3 EX4f SCI External clock input
MN676011NPS
Function Description Connect these pins to a 14.31818-MHz crystal oscillator through capacitors appropriate for VSS1 . "L" level input to the EXT/INT pin (which includes a builtin feedback resistor) produces oscillation; "H" level input stops it. Color subcarrier frequency (4fSC) input "H" level input to the EXT/INT pin enables external clock input. If this pin is not used, keep it at "L" level.
14
EX910fHI
External clock input
External 910fH (14.31818 MHz) input for horizontal and vertical synchronizing signals "H" level input to the EXT/INT pin enables external clock input. If this pin is not used, keep it at "L" level. This pin switches the chip between external and internal synchronization modes. "H" level input produces external synchronization; "L" level, internal synchronization. Incorporating pull-down resistor.
10
EXT/INT
External/internal synchronization switch input
13
VR
Vertical reset input
Falling edge input resets the leading edge of the vertical synchronizing signal (VP). The pin includes a built-in pull-up resistor.
12 9
TEST VPCO
Test input Phase comparator output
Test input
Keep this pin at "H" level.
The pin includes a built-in pull-up resistor. This pin gives the results of comparing the phases of the falling edge of the VR input and rising edge of the VP output. The output is at "H" level when the VR leads the VP and is at "L" level when the VR trails the VP. 18 SW1 These pins control the widths of H-BLK and V-BLK pulses. H-BLK pulse width 17 SW2 selection SW1 L H L H 16 SW3 SW3 V-BLK pulse width 15 SW4 selection L H L H SW4 L L H H V-BLK (H) 19 20 21 21 SW2 L L H H H-BLK (s) 10.69 10.82 10.97 11.10
MN676011NPS
Pin Descriptions (continued)
Pin No. 6 7 Symbol SC1 SC2 Pin Name fSC (R-Y) output fSC (B-Y) output
For Video Equipment
Function Description Color subcarrier frequency signal (3.58 MHz) formed by dividing the crystal oscillator signal (4f SC) by four. Color subcarrier frequency signal (3.58 MHz) formed by dividing the crystal oscillator signal (4f SC) by four. This signal lags SC1 by 90.
8 26 25 24 23 22 21 20
BSC SYNC VP WHD BLK CP1V CP2 WBLK
Burst output Composite synchronizing signal output Vertical synchronizing signal output Wide HD output Composite blanking signal output Composite clamp pulse output Clamp pulse output Composite wide blanking output
Burst output signal If SC1 is the 180 signal, BSC is the 0 signal. Composite synchronizing signal Vertical synchronizing signal output (width: 3H) Wide HD signal Preblanking signal with pulse width of 9.71 s Composite blanking signal See the entries for SW1- SW4 for the pulse width. Composite pulse for black level playback Clamp pulses for luminance and color difference signals Horizontal deflection start pulses Composite wide blanking signal This signal provides a horizontal blanking interval of 26.89 s and a vertical blanking interval of 134.5H Gate signal for color subcarrier frequencies The pulse width is 2.51 s with the vertical interval (9H) dropped out.
19
BF
Burst flag output
11
CP1
Clamp pulse output
Pulse for black level playback
For Video Equipment
H Decoder Pulse Timing Diagram
MN676011NPS
26.89 WBLK H.Sync Sync EQ V.SER BF CP1, CP1V CP2 1.05 2.79 2.51 2.23 4.68 4.75
Unit: s
9.71 WHD BLK F.Porch Sync to BF 1.47 0.56
-9.15 -1.47
-4.68
0 2.23 4.75 4.89 5.31 7.82 8.24
17.74
- 0.91 0.14 2.10
SW1 L H L H
SW2 L L H H
H-BLK (s) 10.69 10.82 10.97 11.10
MN676011NPS
For Video Equipment
Pulse Timing Diagram for Composite and Vertical Synchronizing Signals
Sync
{
{ { {
HS
EQ
VS 3H 9H
EQ
VP
BF
BLK
CP1V
WBLK
{ { { {
{
HS
101 362
{
525 1
2
(Field) ODD
262
EVEN
ODD EVEN
524
ODD
262
EVEN
524
ODD
262
EVEN
489
134.5H+19.3s
227
ODD EVEN
134.5H+7.6s
SW3 L H L H
SW4 L L H H
V-BLK (H) 19 20 21 21
For Video Equipment
Application Circuit Example
MN676011NPS
5V 10000pF 10F + 1 VDD1 2 VSS1 3 EX4fSCI 4 4fSCOSCI 20pF 10pF 18pF 1k 5 4fSCOSCO 6 SC1 7 SC2 8 BSC 9 VPCO 10 EXT/INT 11 CP1 12 TEST 13 VR 14 EX910fHI VDD2 28 VSS2 27 SYNC 26 VP 25 WHD 24 BLK 23 CP1V 22 CP2 21 WBLK 20 BF 19 SW1 18 SW2 17 SW3 16 SW4 15
5V
14.31818MHz
5V
MN676011NPS
Package Dimensions (Unit: mm)
SOP028-P-0375
For Video Equipment
17.800.20 28 15 1.100.20
0.15 -0.05
+0.10
7.200.20
9.400.30
0 to 10 0.30min.
1
14 2.40max. 2.000.20
(0.65)
1.27
0.400.10
SEATING PLANE
0.100.10
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2001 MAR

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