 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| Real time clock module SERIAL-INTERFACE REAL TIME CLOCK MODULE RTC-4543SA/SB * * * * * * Builtin crystal unit allows adjustment-free efficient operation. Automatic leap year correction. Output selectable between 32.768 KHz/1 Hz. Operating voltage range: 2.5V to 5.5V. Supply voltage detection voltage: 1.70.3V. Low current consumption: 1.0 A/2.0V (Max.) Actual size Specifications (characteristics) Absolute Max. rating Item Symbol VDD VIN VOUT TSTG Condition VDD-GND -0.3 VDD+0.3 Output voltage Storage temperature Min. Max. 7.0 V Unit Terminal connection RTC-4543SA 14 13 12 11 10 9 8 Power source voltage Input voltage -- -55 +125 C Operating range Item Operating voltage Date holding voltage Symbol VDD VCLK TOPR Condition Min. 2.5 Max. 5.5 +85 Unit V C 1 23 45 6 7 -- 1.4 -40 RTC-4543SB 18 17 16 15 14 13 12 11 10 Operating temperature Frequency characteristics Item Frequency tolerance Frequency temperature characteristics Frequency voltage characteristics Symbol f/fo Top fV tOSC fa Condition Ta=25C, VDD=5V -10 to +70C Range 523 Unit 1 23 45 6 7 8 9 No. 4543SA 1 GND 2 N.C 3 CE 4 FSEL WR 5 FOE 6 N.C 7 N.C 8 VDD 9 CLK 10 DATA 11 N.C 12 N.C 13 FOUT 14 -- 15 -- 16 -- 17 -- 18 4543SB N.C N.C N.C N.C FOE WR FSEL CE GND FOUT DATA CLK N.C VDD N.C N.C N.C N.C ppm +10/-120 2 3 5 ppm/V s ppm/year Ta=25C, VDD=2.0 to 5.5V Ta=25C, VDD=2.5V First year Ta=25C, VDD=5V External dimensions RTC-4543SA (SOP 14-pin) R4543 B E 607 6A 7.40.2 (Unit: mm) Oscillation start time Aging Item "H" input voltage "L" input voltage Input off-leak current Symbol Condition Min. Typ. Max. Unit -- WR, DATA, CE, CLK, VIH FOE,FSEL pins 0.2VDD VIL -- 0.5 IOFF WR, CE, CLK, FOE,FSEL pins 4.5 VOH1 VDD=5.0V IOH=-1.0 mA -- "H" output voltage -- 2.5 VOH2 VDD=3.0V DATA, FOUT pins 0.5 VOL1 VDD=5.0V IOH=1.0 mA -- "L" output voltage 0.8 VOL2 VDD=3.0V DATA, FOUT pins IOZH VOUT=5.5V Output leak current 1.0 DATA, FOUT pins -1.0 IOZL VOUT=0V Supply detection voltage VDT 2.0 1.4 1.7 -- CL 30 pF(max.) Output load conditions FOUT pin N 2LS-TTL 1 IDD1 VDD=5.0V 1.5 3.0 CE="L", FOE="L" 2 IDD2 VDD=3.0V 1.0 2.0 FSEL="H" 3 IDD3 VDD=2.0V 0.5 1.0 Current -- 4 IDD4 VDD=5.0V CE="L", FOE="H" 4.0 consumption 10.0 5 IDD5 VDD=3.0V 2.5 6.5 FSEL="L" 6 IDD6 VDD=2.0V No load on the FOUT pin 1.5 4.0 0.8VDD V 3.1 3.20.1 A V 10.10.2 0 to 10 0.6 5.0 DC characteristics (VDD=5V0.5V, Ta=-40 to 85C) 0.05 min. 0.15 RTC-4543SB A (SOP 18-pin) V E 607 6A 11.40.2 1.8 7.80.2 5.4 R4543 B A 1.27 0.4 2.0 max. 0 to 10 0.05 min. 0.6 0.15 49 Real time clock module Register table MSB Seconds (0 to 59) Minutes (0 to 59) Hour (0 to 23) Day of the week (1 to 7) Day (1 to 31) Month (1 to 12) year (0 to 99) TM y 80 y 40 d 20 y 20 d 10 mo 10 y 10 FDT s 40 mi 40 s 20 mi 20 h 20 s 10 mi 10 h 10 s8 mi 8 h8 d8 mo 8 y8 s4 mi 4 h4 w4 d4 mo 4 y4 s2 mi 2 h2 w2 d2 mo 2 y2 s1 mi 1 h1 w1 d1 mo 1 y1 FDT bit: Supply voltage detection bit. TM bit: Test bit always set this bit to "0". Switching characteristics (Ta=-40 to +85C, CL=30 pF) VDD= 5V 10% Item CLK clock cycle CLK high pulse width CLK low pulse width CE setup time CE hold time CE enable time Write data setup time Write data hold time VDD= 3V 10% Min. 1.5 Max. 7800 s Timing chart Unit Data read tCE Symbol Min. t CLK t CLKH t CLKL 0.375 t CES t CEH t CE t SD t HD t WRS t WRH t DATA t DZ t r1 t f1 t r2 t f2 -- 100 -- 0.1 0.75 Max. 7800 WR CE tWRS tCES tWRH tCLK tr1 tf1 3900 0.75 3900 tCEH tCLKH tCLKL tRCV CLK -- 0.9 -- 0.2 -- 0.1 -- 100 0.2 0.1 50 -- ns 100 200 0.4 0.2 100 ns -- 0.9 s s tOZ DATA tDATA WR setup time WR hold time DATA output delay time DATA output floating time Clock input rise time Clock input fall time FOUT rise time FOUT fall time Disable time Enable time FOUT duty ratio Wait time CL= 30pF Data write tCE s WR CE CLK DATA tWRS tCLK tCES tr1 tf1 tWRH tCEH tCLKH tCLKL tRCV t XZ t ZX Duty t rcv 40 0.95 60 -- 40 1.9 60 -- % s tSD tHD FOUT tf 2 tH Block diagram FOUT 32.768 kHz tr2 Oscillator Divider Clock and calendar t Duty= t x 100 [%] FOUT FSEL FOE Output controller Shift register tH Disabled and Enabled FOE Disabled VIH VIL Enabled DATA CLK WR CE I/O controller Voltage detecter tXZ tZX Control circuit FOUT High impedance 50 |
Price & Availability of RTC4543
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |