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TDA7376PD
2 X 35W POWER AMPLIFIER FOR CAR RADIO
HIGH OUTPUT POWER CAPABILITY 2 x 40W max./4 2 x 35W/4 EIAJ 2 x 25W/4 @14.4V, 1KHz, 10% 2 x 25W/2 @14.4V, 1KHz, 10% 2 DRIVING DIFFERENTIAL INPUTS MINIMUM EXTERNAL COMPONENTS COUNT INTERNALLY FIXED GAIN (26dB) MUTE FUNCTION (CMOS COMPATIBLE) AUTOMUTE AT MINIMUM SUPPLY VOLTAGE DETECTION STAND-BY FUNCTION NO AUDIBLE POP DURING MUTE AND SYBY OPERATIONS CLIPPING DETECTOR WITH PROGRAMMABLE DISTORTION THRESHOLD Protections:

PowerSO36 (Slug up) ORDERING NUMBER: TDA7376PD

SOFT THERMAL LIMITER LOAD DUMP VOLTAGE FORTUITOUS OPEN GROUND LOUDSPEAKER DC CURRENT ESD
DESCRIPTION The TDA7376PD is a new technology dual bridge Audio Amplifier in PowerSO36 package designed for car radio applications. Thanks to the fully complementary PNP/NPN output stage configuration the TDA7376PD delivers a rail-to-rail voltage swing with no need of bootstrap capacitors.
SHORT CIRCUIT (OUT TO GROUND, OUT TO SUPPLY VOLTAGE, ACROSS THE LOAD) OVERRATING CHIP TEMPERATURE WITH
BLOCK DIAGRAM
April 2004
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TDA7376PD
DESCRIPTION (Continued) Differential input pairs, that will accept either single ended or differential input signals, guarantee high noise immunity making the device suitable for both car radio and car boosters applications. The audio mute control, that attenuates the output signal of the audio amplifiers, suppresses pop on - off transients and cuts any noises coming from previous stages. The St-By control, that de-biases the amplifiers, reduces the cost of the power switch. The on-board programmable distortion detector allows compression facility whenever the ampifier is overdriven, so limiting the distortion at any levels inside the presettable range. PIN CONNECTION (Top view)
NC PWGND PWGND NC OUT2+ OUT2+ NC OUT2OUT2VCC VCC IN2+ IN2NC NC CD-OUT THDSET NC
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
D02AU1348
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
TAB PWGND PWGND NC OUT1+ OUT1+ NC OUT1OUT1VCC VCC IN1+ IN1NC NC MUTE ST-BY SGND
ABSOLUTE MAXIMUM RATINGS
Symbol VOP Operating Supply Voltage DC Supply Voltage Peak Supply Voltage (t = 50ms) Output Peak Current (not repetitive t = 100s) Output Peak Current (repetitive f > 10Hz) Ptot Tstg, Tj Power Dissipation Tcase = 85C Storage and Junction Temperature Parameter Value 18 28 50 8 6 36 -40 to 150 Unit V V V A A W C
Vs
Vpeak IO
THERMAL DATA
Symbol Rth j-case Parameter Thermal Resistance Junction to case Max Value 2 Unit C/W
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TDA7376PD
Figure 1. Differential Inputs Test and Application Circuit
Figure 2. Single Ended Inputs Test and Application Circuit
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TDA7376PD
Figure 3. Application Board Reference Circuit
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ELECTRICAL CHARACTERISTCS (Refer to the test circuits figgs 1 and 2, VS = 14.4V; RL = 4; f = 1KHz; Tamb = 25C, unless otherwise specified).
Symbol VS Id VOS PO PO max PO EIAJ THD CT RIN GV GV EIN SVR BW CMRR ASB VSB IN VSB OUT Isb AM VM IN VM OUT I6 DDL DDOUT Parameter Supply Voltage Range Total Quiescent Drain Current Output Offset Voltage Output Power Max. Output Power (*) EIAJ Outout Power (*) Distortion Cross Talk Input Impedance Voltage Gain Channel Gain Balance Input Noise Voltage Supply Voltage Rejection Power Bandwidth Common Mode Rejection Ratio Stand-by Attenuation Stand-by In Threshold Stand-by Out Threshold Stand-by Current Consumption Mute Attenuation Mute in Threshold Mute out Threshold Mute pin Current Distortion Detection Level (**) Distortion Detector Output DC Current Output low, sinked current V6 = 0 to VS, ; VS max. = 18V 3.5 1 10 3.5 100 VSB = 0V VM = 1.5V; POref = 1W 85 1.5 3.5 20 Rg = 600; "A" weighted Rg = 600; 22Hz to 33KHz f = 100Hz; Vr = 1Vrms; Rg = 0; f = 10Hz; Vr = 1Vrms; Rg = 0; (-3dB) VCM = 1Vrms input referred VSB = 1.5V; PO ref = 1W 45 55 75 60 80 90 1.5 3 4 VS = 13.7V PO = 0.5 to 10W PO = 0.5 to 15W f = 1KHz; Rg f = 10KHz; Rg differential input Single Ended input differential input Single Ended input 45 40 25 25 26 26 27 27 1 6 THD = 10%; THD = 10%; RL = 2 23 33 36 32 25 37 40 35 0.03 0.08 80 70 RL = Test Condition Min. 8 Typ. Max. 18 200 120 Unit V mA mV W W W W % % dB dB K K dB dB dB V V dB dB kHz dB dB V V A dB V V A % mA A
(Vpin10 = 1.5V)
Output high, leakage current (Vpin10 = VS, @ VSmax = 18V)
(*) Saturated square wave output (**) see figure 5 for THD setting.
The TDA7376PD is equipped with a programmable clipping distortion detector circuitry that allows to signal out the output stage saturation by providing a current sinking into an open collector output (DDout) when the total harmonic distortion of the output signal reaches the preset level. The desired threshold is fixed through an external divider that produces a proper voltage level across the THD set pin. Fig. 4 shows the THD detection threshold versus the THD set voltage. Since it is essential that the THD set voltage be proportional to the supply voltage, fig. 5 shows its value as a fraction of VCC. The actual voltage can be computed by multiplying the fraction corresponding to the desired THD threshold by the application's supply voltage.
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Figure 4. Clip Detector Threshold vs. THD set. Voltage.
VS = 14.4V RL = 4 f = 1KHz
Figure 7. Ouput Power vs. Supply Voltage
Po (W) f= 1 KHz THD= 10 % RL= 2
55 50 45 40 35 30 25 20 15 10 5
RL= 4
8
9
10
11
12
13 14 Vs (V)
15
16
17
18
Figure 5. Quiescent Current vs. Supply Voltage
Figure 8. EIAJ Power vs. Supply Voltage
RL = 4 f = 1KHz Vi = 2.5Vrms RL = 3.2 RL = 4
Figure 6. Ouput Power vs. Supply Voltage
Po (W) f= 1 KHz THD= 1 % RL= 2
Figure 9. THD vs. Frequency
45 40 35 30 25 20 15 10 5 8
VS = 14.4V RL = 4 PO = 12W
RL= 4
9
10
11
12
13 14 Vs (V)
15
16
17
18
f (Hz)
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Figure 10. THD vs. Output Power (RL = 4)
THD(%) Vs = 14.4 V RL = 4 1 f= 10 KHz 0.1 f = 1 KHz
VS = 14.4V RL = 4 Vr = 1Vrms Ri = 600 Ri = 0
Figure 13. SVR vs. Frequency
10
0.01 0.1
1
Po (W)
10
f (Hz)
Figure 11. THD vs. Output Power (RL = 24)
THD (%) Vs= 14.4 V RL=2 1 f = 10 KHz 0.1
Figure 14. CMRR vs. Frequency
10
f= 1 KHz
VS = 14.4V RL = 4 Vi = 1Vrms
0.01 0.1
1
Po (W)
10
f (Hz)
Figure 12. Dissipated Power & Efficiency vs. Output Power
VS = 14.4V RL = 4 f = 1KHz
Figure 15. Crosstalk vs. Frequency
VS = 14.4V RL = 4 PO = 1W RL = 0
f (Hz)
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TDA7376PD
mm TYP. inch TYP.
DIM. A A2 A4 A5 a1 b c D D1 D2 E E1 E2 E3 E4 e e3 G H h L N s
MIN. 3.25 3.1 0.8 0.030 0.22 0.23 15.8 9.4
MAX. 3.43 3.2 1 -0.040 0.38 0.32 16 9.8
MIN. 0.128 0.122 0.031 0.0011 0.008 0.009 0.622 0.37
MAX. 0.135 0.126 0.039 -0.0015 0.015 0.012 0.630 0.38
OUTLINE AND MECHANICAL DATA
0.2
0.008
1 13.9 10.9 5.8 2.9 0.65 11.05 0 15.5 0.8 0.075 0 15.9 0.61 1.1 1.1 0.031 10 (max) 8 (max) 14.5 11.1 2.9 6.2 3.2 0.547 0.429 0.228 0.114
0.039 0.57 0.437 0.114 0.244 1.259 0.026 0.435 0.003 0.625 0.043 0.043
(1) "D and E1" do not include mold flash or protusions. Mold flash or protusions shall not exceed 0.15mm (0.006") (2) No intrusion allowed inwards the leads.
PowerSO36 (SLUG UP)
7183931 C
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2004 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States www.st.com
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