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CY7C171A CY7C172A
4K x 4 Static RAM with Separate I/O
Features
* Automatic power-down when deselected * CMOS for optimum speed/power * High speed -- tAA = 15 ns * Transparent write (7C171A) * Low active power -- 375 mW * Low standby power -- 93 mW * TTL-compatible inputs and outputs * Capable of withstanding greater than 2001V electrostatic discharge
Functional Description
The CY7C171A and CY7C172A are high-performance CMOS static RAMs organized as 4096 by 4 bits with separate I/O. Easy memory expansion is provided by an active LOW chip enable (CE) and three-state drivers. They have an automatic power-down feature, reducing the power consumption by 77% when deselected. Writing to the device is accomplished when the chip enable (CE) and write enable (WE) inputs are both LOW. Data on the four input/output pins (I 0 through I3) is written into the memory location specified on the address pins (A0 through A11). Reading the device is accomplished by taking chip enable (CE) LOW, while write enable (WE) remains HIGH. Under these conditions the contents of the memory location specified on the address pins will appear on the four data output pins. The output pins remain in a high-impedance state when write enable (WE) is LOW (7C172A only), or chip enable is HIGH. A die coat is used to insure alpha immunity.
Logic Block Diagram
I0 I1
Pin Configurations
DIP/SOJ Top View
A4 1 2 3 4 24 23 22 21 20 A5 A6 A7 A8 A9 A10 A11 VCC A3 A2 A1 A0 I0 I1 O0 O1 O2 O3 WE C171A-2
I2 I3
INPUT BUFFER
5 6 7C171A 19 7C172A 18 7 8 9 10 11 12 16
ROW DECODER
A0 A1 A2 A3 A4 A5 A6
17 15 14 13
O0
SENSE AMPS 128 x 128 ARRAY
I3 I2 CE GND
O1 O2 O3
COLUMN DECODER
POWER DOWN
A9 A10
A11
A7
A8
CE WE
7C172A
7C171A
C171A-1
Selection Guide
Maximum Access Time (ns) Maximum Operating Commercial Current (mA) Military 7C171A-15 7C172A-15 15 115 7C171A-20 7C172A-20 20 80 90 7C171A-25 7C172A-25 25 70 80 7C171A-35 7C172A-35 35 70 70 7C171A-45 7C172A-45 45 70
Cypress Semiconductor Corporation
*
3901 North First Street
*
San Jose
* CA 95134 * 408-943-2600 November 1988 - Revised April 1995
CY7C171A CY7C172A
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ..................................... -65C to +150C Ambient Temperature with Power Applied .................................................. -55C to +125C Supply Voltage to Ground Potential..................-0.5V to +7.0V DC Voltage Applied to Outputs in High Z State .....................................................-0.5V to +7.0V DC Input Voltage .................................................-3.0V to +7.0V Output Current into Outputs (LOW) ............................. 20 mA Static Discharge Voltage .......................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current.................................................... >200 mA
Operating Range
Range Commercial Military[1] Ambient Temperature 0C to +70C -55C to +125C VCC 5V 10% 5V 10%
Note: 1. TA is the "instant on" case temperature.
Electrical Characteristics Over the Operating Range[2]
7C171A-15 7C172A-15 Parameter VOH VOL VIH VIL IIX IOZ IOS ICC ISB1 ISB2 Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Load Current Output Leakage Current Output Short Circuit Current[3] VCC Operating Supply Current Automatic CE Power-Down Current Automatic CE Power-Down Current GND < V I < V CC GND < VO < VCC, Output Disabled VCC = Max., VOUT = GND VCC = Max. IOUT = 0 mA Max. VCC, CE > VIH Min. Duty Cycle = 100% Max. VCC, CE > VIH - 0.3V, VIN > VCC - 0.3V or VIN < 0.3V Com'l Mil Com'l Mil Com'l Mil 20 40 Test Conditions VCC = Min., IOH = -4.0 mA VCC = Min., IOL = 8.0 mA 2.2 -3.0 -10 -10 Min. 2.4 0.4 VCC 0.8 +10 +10 -350 115 2.2 -3.0 -10 -10 Max. 7C171A-20 7C172A-20 Min. 2.4 0.4 VCC 0.8 +10 +10 -350 80 90 40 40 20 20 2.2 -3.0 -10 -10 Max. 7C171A-25 7C172A-25 Min. 2.4 0.4 VCC 0.8 +10 +10 -350 70 80 20 20 20 20 mA mA Max. Unit V V V V A A mA mA
2
CY7C171A CY7C172A
3
CY7C171A CY7C172A
Electrical Characteristics Over the Operating Range[2] (continued)
7C171A-35 7C172A-35 Parameter VOH VOL VIH VIL IIX IOZ IOS ICC ISB1 ISB2 Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Load Current Output Leakage Current Output Short Circuit Current[3] VCC Operating Supply Current Automatic CE Power-Down Current Automatic CE Power-Down Current GND < VI < VCC GND < VO < VCC, Output Disabled VCC = Max., VOUT = GND VCC = Max. IOUT = 0 mA Max. VCC, CE > VIH Min. Duty Cycle = 100% Max. VCC, CE > V IH - 0.3V, VIN > VCC - 0.3V or VIN < 0.3V Com'l Mil Com'l Mil Com'l Mil Test Conditions VCC = Min., IOH = -4.0 mA VCC = Min., IOL = 8.0 mA Min. 2.4 0.4 2.2 -3.0 -10 -10 VCC 0.8 +10 +10 -350 70 70 20 20 20 20 20 20 mA 70 2.2 -3.0 -10 -10 Max. 7C171A-45 7C172A-45 Min. 2.4 0.4 VCC 0.8 +10 +10 -350 Max. Unit V V V V A A mA mA mA mA
Capacitance[4]
Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25C, f = 1 MHz, VCC = 5.0V Max. 10 10 Unit pF pF
Notes: 2. See the last page of this specification for Group A subgroup testing information. 3. Not more than 1 output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds. 4. Tested initially and after any design or process changes that may affect these parameters
AC Test Loads and Waveform
5V OUTPUT 30 pF INCLUDING JIG AND SCOPE Equivalent to: R2 255 R1 481 5V OUTPUT 5 pF INCLUDING JIG AND SCOPE R2 255 R1 481 ALL INPUT PULSES 3.0V GND < 5 ns 90% 10% 90% 10% < 5 ns
C171A-4
(a)
(b)
C171A-3
THEVENIN EQUIVALENT 167 OUTPUT 1.73V
4
CY7C171A CY7C172A
Switching Characteristics Over the Operating Range[2,5]
7C171A-15 7C172A-15 Parameter READ CYCLE tRC tAA tOHA tACE tLZCE tHZCE tPU tPD tRCS tRCH tWC tSCE tAW tHA tSA tPWE tSD tHD tLZWE tHZWE tAWE tADV Read Cycle Time Address to Data Valid Output Hold from Address Change CE LOW to Data Valid CE LOW to LOW Z[6] CE HIGH to HIGH Z
[6, 7]
7C171A-20 7C172A-20 Min. 20 Max.
7C171A-25 7C172A-25 Min. 25 Max.
7C171A-35 7C172A-35 Min. 35 Max.
7C171A-45 7C172A-45 Min. 45 Max. Unit ns 45 5 45 5 15 0 25 0 0 40 30 30 0 0 20 15 0 5 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 15 35 35 ns ns ns
Description
Min. 15
Max.
15 5 15 5 8 0 15 0 0 15 12 12 0 0 12 10 0 5 7 15 15 0 0 20 15 15 0 0 15 10 0 5 0 5 5
20 5 20 5 8 0 20 0 0 20 20 20 0 0 15 10 0 5 7 20 20
25 5 25 5 10 0 20 0 0 25 25 25 0 0 20 15 0 5 7 25 25
35 35 15 20
CE LOW to Power Up CE HIGH to Power Down Read Command Set-Up Read Command Hold
[8]
WRITE CYCLE
Write Cycle Time CE LOW to Write End Address Set-Up to Write End Address Hold from Write End Address Set-Up to Write Start WE Pulse Width Data Set-Up to Write End Data Hold from Write End WE HIGH to Low Z
[6]
(7C172A)
WE LOW to High Z[6,7] (7C172A) WE LOW to Data Valid (7C171A) Data Valid to Output Valid (7C171A)
10 30 30
Switching Waveforms
Read Cycle No. 1[9,10]
tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID
C171A-5
Notes: 5. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading of the specified IOI/I OH and 30-pF load capacitance. 6. At any given temperature and voltage condition, t HZ is less than tLZ for any given device. 7. tHZCE and tHZWE are tested with CL = 5pF as in part (b) of AC Test Loads. Transition is measured 500 mV from steady state voltage. 8. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input setup and hold timing should be referenced to the rising edge of the signal that terminates the write. 9. WE is HIGH for read cycle. 10. Device is continuously selected, CE = VIL.
5
CY7C171A CY7C172A
Switching Waveforms (continued)
Read Cycle No. 2[9,11]
CE tACE tLZ HIGH IMPEDANCE tACE tHZ DATA VALID tPD 50% 50% ICC ISB tRCS tRCH
[8]
C171A-6
HIGH IMPEDANCE
DATA OUT VCC SUPPLY CURRENT WE
tPU
Write Cycle No. 1 (WE Controlled)
tWC ADDRESS tSCE CE tSA WE tSD DATA IN DATAIN VALID tHZWE DATAOUT (7C172A) DATAOUT (7C171A) DATA UNDEFINED tADV DATA UNDEFINED DATA VALID
C171A-7
tAW
tPWE
tHA
tHD
tLZWE HIGH IMPEDANCE
Write Cycle No. 2 (CE Controlled)[8,12]
tWC ADDRESS tSA CE tAW WE tSD DATA IN tHZWE DATAOUT (7C172A) DATAOUT (7C171A) HIGH IMPEDANCE DATA UNDEFINED tAWE DATA UNDEFINED DATA VALID
C171A-8
tSCE
tPWE tHD
tHA
DATAIN VALID
Notes: 11. Address valid prior to or coincident with CE transition LOW. 12. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state (7C172A).
6
CY7C171A CY7C172A
Typical DC and AC Characteristics
OUTPUT SOURCE CURRENT (mA) NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.4 NORMALIZED ICC , ISB 1.2 1.0 0.8 0.6 0.4 0.2 0.0 4.0 4.5 5.0 ISB 5.5 6.0 ICC NORMALIZED ICC , ISB 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -55 25 VCC =5.0V VIN =5.0V ICC NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 80 60 40 20 0 0.0 1.0 2.0 3.0 4.0 VCC =5.0V TA =25C
125
SUPPLY VOLTAGE (V)
AMBIENT TEMPERATURE (C)
OUTPUT VOLTAGE (V)
OUTPUT SINK CURRENT (mA)
NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE 1.4 NORMALIZED t AA NORMALIZED tAA 1.3 1.2 1.1 TA =25C) 1.0 0.9 0.8 4.0 4.5 5.0 5.5 6.0 1.6 1.4 1.2 1.0
NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE
OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 140 120 100 80 60 40 20 0 0.0 1.0 2.0 3.0 4.0 VCC =5.0V TA =25C
VCC =5.0V 0.8 0.6 -55
25
125
SUPPLY VOLTAGE (V)
AMBIENT TEMPERATURE (C)
OUTPUT VOLTAGE (V)
TYPICAL POWER-ON CURRENT vs. SUPPLY VOLTAGE 3.0 NORMALIZED I PO 2.5 DELTA t AA (ns) 2.0 1.5 1.0 0.5 0.0 0.0 1.0 2.0 3.0 4.0 5.0 30.0
TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 1.1 NORMALIZED I CC
NORMALIZED I CC vs.CYCLE TIME VCC =5.0V TA =25C VIN =0.5V 1.0
25.0 20.0 15.0 10.0 5.0 0.0 0 200 400 VCC =4.5V TA =25C
0.9
600
800 1000
0.8 10
20
30
40
SUPPLY VOLTAGE (V)
CAPACITANCE (pF)
CYCLE FREQUENCY (MHz)
7
CY7C171A CY7C172A
Ordering Information
Speed (ns) 15 20 25 35 Speed (ns) 15 20 Ordering Code CY7C171A-15PC CY7C171A-20PC CY7C171A-25PC CY7C171A-35PC Package Name P13 P13 P13 P13 Package Name P13 V13 P13 V13 D14 P13 V13 D14 P13 D14 D14 Package Type 24-Lead (300-Mil) Molded DIP 24-Lead (300-Mil) Molded DIP 24-Lead (300-Mil) Molded DIP 24-Lead (300-Mil) Molded DIP Operating Range Commercial Commercial Commercial Commerical Operating Range Commercial Commercial Military Commercial Military Commercial Military Military
Ordering Code CY7C172A-15PC CY7C172A-15VC CY7C172A-20PC CY7C172A-20VC CY7C172A-20DMB
Package Type 24-Lead (300-Mil) Molded DIP 24-Lead Molded SOJ 24-Lead (300-Mil) Molded DIP 24-Lead Molded SOJ 24-Lead (300-Mil) CerDIP 24-Lead (300-Mil) Molded DIP 24-Lead Molded SOJ 24-Lead (300-Mil) CerDIP 24-Lead (300-Mil) Molded DIP 24-Lead (300-Mil) CerDIP 24-Lead (300-Mil) CerDIP
25
CY7C172A-25PC CY7C172A-25VC CY7C172A-25DMB
35 45
CY7C172A-35PC CY7C172A-35DMB CY7C172A-45DMB
MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics
Parameter VOH VOL VIH VIL Max. IIX IOZ IOS ICC ISB1 ISB1 Document #: 38-00104-D Subgroups 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 tRC tAA tOHA tACE tRCS tRCH WRITE CYCLE tWC tSCE tAW tHA tSA tPWE tSD tHD tAWE[13] tADV[13] 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11
Switching Characteristics
Parameter READ CYCLE 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 Subgroups
(c) Cypress Semiconductor Corporation, 1995. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
CY7C171A CY7C172A
Note: 13. 7C171A only.
Package Diagrams
24-Lead (300-Mil) CerDIP D14
MIL-STD-1835 D-9 Config.A
24-Lead (300-Mil) Molded DIP P13/P13A
24-Lead Molded SOJ V13
9

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