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Final Electrical Specifications
LTC1261L Switched Capacitor Regulated Voltage Inverter
October 1998
FEATURES
s s s s s s s s s
DESCRIPTIO
Regulated Negative Voltage from a Single Positive Supply REG Pin Indicates Output is in Regulation Adjustable or Fixed Output Voltages Output Regulation: 3.5% Supply Current: 650A Typ Shutdown Mode Drops Supply Current to 5A Up to 20mA Output Current Requires Only Three or Four External Capacitors Available in MS8 and SO-8 Packages
The LTC(R)1261L is a switched-capacitor voltage inverter designed to provide a regulated negative voltage from a single positive supply. The LTC1261L operates from a single 2.7V to 5.25V supply and provides an adjustable output voltage from -1.23V to - 5V. The LTC1261L-4/ LTC1261L-4.5 needs a single 4.5V to 5.25V supply and provides a fixed output voltage of - 4V to - 4.5V respectively. Three external capacitors are required: a 0.1F flying capacitor and an input and output bypass capacitors. An optional compensation capacitor at ADJ (COMP) can be used to reduce the output voltage ripple. Each version of the LTC1261L will supply up to 20mA output current with guaranteed output regulation of 3.5%. The LTC1261L includes an open-drain REG output that pulls low when the output is within 5% of the set value. Quiescent current is typically 650A when operating and 5A in shutdown. The LTC1261L is available in an 8-pin MSOP and SO package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATI
s s s s
S
GaAs FET Bias Generators Negative Supply Generators Battery-Powered Systems Single Supply Applications
TYPICAL APPLICATION
Waveforms for - 4V Generator with Power Valid - 4V Generator with Power Valid
0V
5V 5V C1 1F C2 0.1F 1 2 VCC SHDN 8 10k 7 POWER VALID VOUT = -4V AT 10mA
OUT - 4V 5V SHDN 0V 5V POWER VALID 0V
1261L TA01
REG C1 + LTC1261L-4 3 6 - OUT C1 4
C3* 100pF
*OPTIONAL
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
+
GND
COMP
5
C4 3.3F
U
0.2ms/DIV
1261L TAO2
U
UO
1
LTC1261L ABSOLUTE
(Note 1)
AXI U
RATI GS
Output Short-Circuit Duration ......................... Indefinite Commercial Temperature Range ................ 0C to 70C Extended Commercial Operating Temperature Range (Note 4) ................. - 40C to 85C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
Supply Voltage (Note 2)......................................... 5.5V Output Voltage (Note 3) ........................... 0.3V to - 5.3V Total Voltage, VCC to VOUT (Note 2) ..................... 10.8V SHDN Pin .................................. - 0.3V to (VCC + 0.3V) REG Pin ..................................................... - 0.3V to 6V ADJ Pin........................... (VOUT - 0.3V) to (VCC + 0.3V)
PACKAGE/ORDER I FOR ATIO
TOP VIEW VCC C1+ C1- GND 1 2 3 4 8 7 6 5 SHDN REG OUT ADJ (COMP)
ORDER PART NUMBER LTC1261LCMS8 LTC1261LCMS8-4 LTC1261LCMS8-4.5 MS8 PART MARKING LTFM LTFN LTFP
VCC 1 C1+ 2 C1- 3 GND 4
MS8 PACKAGE 8-LEAD PLASTIC MSOP
TJMAX = 150C, JA = 200C/W
Consult factory for Industrial or Military grade parts or additional fixed voltage parts.
ELECTRICAL CHARACTERISTICS
SYMBOL VCC PARAMETER Supply Voltage (LTC1261LCMS8/LTC1261LCS8) (LTC1261LCMS8-4/LTC1261LCS8-4) (LTC1261LCMS8-4.5/LTC1261LCS8-4.5) Reference Voltage Supply Current Internal Oscillator Frequency REG Output Low Voltage REG Sink Current Adjust Pin Current SHDN Input High Voltage SHDN Input Low Voltage SHDN Input Current Turn-On Time
C1 = 0.1F, COUT = 3.3F (Notes 2, 4) unless otherwise specified.
MIN
q q q
CONDITIONS
(Note 5) (Note 5) VCC = 5.25V, No Load, SHDN Floating VCC = 5.25V, No Load, VSHDN = VCC VCC = 5V, VOUT = - 4V IREG = 1mA, VCC = 5V, VOUT = - 4V VREG = 0.8V, VCC = 3.3V VREG = 0.8V, VCC = 5V VADJ = 1.23V VCC = 5V VCC = 5V VSHDN = VCC IOUT = 10mA
VREF ICC fOSC VOL IREG IADJ VIH VIL IIN tON
2
U
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WW U
W
TOP VIEW 8 7 6 5 SHDN REG OUT ADJ (COMP)
ORDER PART NUMBER LTC1261LCS8 LTC1261LCS8-4 LTC1261LCS8-4.5 S8 PART MARKING 1261L 1261L4 261L45
S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150C, JA = 135C/W
TYP
MAX 5.25 5.25 5.25
UNITS V V V V A A kHz V mA mA
2.7 4.35 4.75 1.23 650 5 650 0.1 4 5 2 8 12 0.01
q q
1500 20 0.8
q q q q q q q
1 0.8
A V V A s
2.5 250
25
LTC1261L
ELECTRICAL CHARACTERISTICS
SYMBOL VOUT PARAMETER Output Regulation (LTC1261L)
C1 = 0.1F, COUT = 3.3F (Notes 2, 4) unless otherwise specified.
MIN
q q q q q q q q q q q q q q q q q q q q
CONDITIONS 2.70V VCC 5.25V, 0mA IOUT 10mA 3.25V VCC 5.25V, 0mA IOUT 20mA 2.70V VCC 5.25V, 0mA IOUT 5mA 2.95V VCC 5.25V, 0mA IOUT 10mA 3.50V VCC 5.25V, 0mA IOUT 20mA 2.95V VCC 5.25V, 0mA IOUT 5mA 3.30V VCC 5.25V, 0mA IOUT 10mA 3.85V VCC 5.25V, 0mA IOUT 20mA 3.40V VCC 5.25V, 0mA IOUT 5mA 3.70V VCC 5.25V, 0mA IOUT 10mA 4.25V VCC 5.25V, 0mA IOUT 20mA 3.85V VCC 5.25V, 0mA IOUT 5mA 4.10V VCC 5.25V, 0mA IOUT 10mA 4.60V VCC 5.25V, 0mA IOUT 20mA
TYP - 1.5 - 1.5 - 2.0 - 2.0 - 2.0 - 2.5 - 2.5 - 2.5 - 3.0 - 3.0 - 3.0 - 3.5 - 3.5 - 3.5 - 4.0 - 4.0 - 4.0 - 4.5 - 4.5 100
MAX - 1.448 - 1.448 - 1.930 - 1.930 - 1.930 - 2.413 - 2.413 - 2.413 - 2.895 - 2.895 - 2.895 - 3.378 - 3.378 - 3.378 - 3.860 - 3.860 - 3.860 - 4.343 - 4.343 220
UNITS V V V V V V V V V V V V V V V V V V V mA
- 1.552 - 1.552 - 2.070 - 2.070 - 2.070 - 2.587 - 2.587 - 2.587 - 3.105 - 3.105 - 3.105 - 3.622 - 3.622 - 3.622 - 4.140 - 4.140 - 4.140 - 4.657 - 4.657
Output Regulation (LTC1261L/LTC1261L-4) Output Regulation (LTC1261L/LTC1261L-4.5) ISC Output Short-Circuit Current
4.35V VCC 5.25V, 0mA IOUT 5mA 4.60V VCC 5.25V, 0mA IOUT 10mA 5.10V VCC 5.25V, 0mA IOUT 20mA 4.75V VCC 5.25V, 0mA IOUT 5mA 5.05V VCC 5.25V, 0mA IOUT 10mA VOUT = 0V, VCC = 5.25V
The q denotes specifications which apply over the full operating temperature range. Note 1: The Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified. Note 3: The output should never be set to exceed VCC - 10.8V.
Note 4: The LTC1261L is guaranteed to meet specified performance from 0C to 70C and is designed, characterized and expected to meet these extended commercial temperature limits, but is not tested at - 40C and 85C. Guaranteed I grade parts are available, consult factory. Note 5: The LTC1261L-4 and LTC1261L-4.5 will operate with less than the minimum VCC specified in the electrical characteristics table, but they are not guaranteed to meet the 3.5% VOUT specification.
TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage vs Output Current
0 - 0.25 - 0.50
OUTPUT VOLTAGE (V)
TA = 25C VOUT = - 2V
OUTPUT VOLTAGE (V)
- 0.75 -1.00 -1.25 -1.50 -1.75 VCC = 3V - 2.00 - 2.25 0 5 10 15 25 20 OUTPUT CURRENT (mA) 30 VCC = 2.7V
- 3.4 - 3.5 - 3.6 - 3.7 - 3.8 - 3.9 - 4.0 - 4.1 - 4.2 0 5
VCC = 4.5V
OUTPUT VOLTAGE (V)
UW
(See Test Circuits)
Output Voltage vs Output Current
- 3.0 - 3.1 - 3.2 - 3.3 TA = 25C VOUT = - 4V -1.90
Output Voltage vs Supply Voltage
VOUT = - 2V -1.95 TA = - 40C -2.00 TA = 85C -2.05 TA = 25C
VCC = 5V
10 15 20 25 OUTPUT CURRENT (mA)
30
-2.10 2.5
3.0
3.5 4.0 4.5 SUPPLY VOLTAGE (V)
5.0
1261L G03
1261L G01
1261L G02
3
LTC1261L TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage vs Supply Voltage
- 3.85 - 3.90
OUTPUT VOLTAGE (V)
VOUT = - 4V
MAXIMUM OUTPUT CURRENT (mA)
POSITIVE SUPPLY VOLTAGE (V)
- 3.95 TA = - 40C - 4.00 TA = 85C - 4.05 - 4.10 - 4.15 4.5
TA = 25C
4.6
4.7 4.8 4.9 5.0 5.1 SUPPLY VOLTAGE (V)
Supply Current vs Supply Voltage
3.0 2.5 VOUT = - 2V IOUT = 0
REFERENCE VOLTAGE (V)
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
2.0 1.5 1.0 0.5 0 2.5 TA = 85C TA = - 40C TA = 25C
3.0
3.5 4.0 4.5 SUPPLY VOLTAGE (V)
Oscillator Frequency vs Temperature
725 700 675 650 625 600 575 550 525 -40 -25 -10 5 20 35 50 65 TEMPERATURE (C) 80 95 TA = 25C VOUT = - 4V VCC = 5V
OSCILLATOR FREQUENCY (kHz)
SHORT-CIRCUIT CURRENT (mA)
START-UP TIME (ms)
4
UW
5.2
5.0
1261L G07
(See Test Circuits) Maximum Output Current vs Supply Voltage
80 70 60 VOUT = - 2V 50 40 30 20 10 VOUT = - 3V VOUT = - 4V TA = 25C
Minimum Required VCC vs VOUT and IOUT
5.6 5.2 4.8 4.4 4.0 3.6 3.2 2.8 2.4 2.0 IOUT = 5mA IOUT = 10mA IOUT = 20mA
5.3
-5
-4
-3 -2 -1 OUTPUT VOLTAGE (V)
0
1261L G05
0 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 SUPPLY VOLTAGE (V)
1261L G06
1261L G04
Supply Current vs Supply Voltage
5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 4.5 4.6 TA = - 40C 4.7 4.8 4.9 5.0 5.1 SUPPLY VOLTAGE (V) 5.2 5.3 TA = 25C TA = 85C VOUT = - 4.5V IOUT = 0
1.25
Reference Voltage vs Temperature
VCC = 5V ADJ = 0V
1.24
1.23
1.22
1.21 - 55 -35 -15
5 25 45 65 85 105 125 TEMPERATURE (C)
1261L G09
1261L G08
Start-Up Time vs Supply Voltage
0.7 0.6 0.5 VOUT = - 4V 0.4 0.3 VOUT = - 2V 0.2 0.1 0 2.5 3.0 3.5 4.5 4.0 SUPPLY VOLTAGE (V) 5.0
1261L G11
Output Short-Circuit Current vs Temperature
160 140 120 100 VCC = 5V 80 60 VCC = 3V 40 20 VCC = 2.7V 5 20 35 50 65 TEMPERATURE (C) 80 95 VCC = 5.25V
TA = 25C IOUT = 10mA
0 - 40 - 25 -10
1261L G10
1261L G12
LTC1261L
PIN FUNCTIONS
VCC (Pin 1): Power Supply. This requires an input voltage between 2.7V and 5.25V. VCC must be bypassed to ground with at least a 1F capacitor placed in close proximity to the chip. See the Applications Information section for details. C1+ (Pin 2): C1 Positive Input. Connect a 0.1F capacitor between C1+ and C1-. C1- (Pin 3): C1 Negative Input. Connect a 0.1F capacitor from C1+ to C1-. GND (Pin 4): Ground. Connect to a low impedance ground. A ground plane will help to minimize regulation errors. ADJ (COMP for fixed versions) (Pin 5): Output Adjust/ Compensation Pin. For adjustable parts this pin is used to set the output voltage. The output voltage is divided down with an external resistor divider and fed back to this pin to set the regulated output voltage. Typically the resistor string should draw 10A from the output to minimize errors due to the bias current at the adjust pin. Fixed output voltage parts have the internal resistor string connected to this pin inside the package. The pin can be used to trim the output voltage if desired. It can also be used as an optional feedback compensation pin to reduce output ripple on both the adjustable and fixed output voltage parts. See the Applications Information section for more information on compensation and output ripple. OUT (Pin 6): Negative Voltage Output. This pin must be bypassed to ground with a 1F or larger capacitor. The value of the output capacitor and its ESR have a strong effect on output ripple. See the Applications Information section for more details. REG (Pin 7): This is an open-drain output that pulls low when the output voltage is within 5% of the set value. It will sink 5mA to ground with a 5V supply. The external circuitry must provide a pull-up or REG will not swing high. The voltage at REG may exceed VCC and can be pulled up to 6V above ground without damage. SHDN (Pin 8): Shutdown. When this pin is at ground the LTC1261L operates normally. An internal 5A pull-down keeps SHDN low if it is left floating. When SHDN is pulled high, the LTC1261L enters shutdown mode. In shutdown, the charge pump is disabled, the output collapses to 0V and the quiescent current drops to 5A typically.
TEST CIRCUITS
Fixed Output
1 VCC SHDN 8
5V
+
10F 0.1F
2
7 C1 + REG LTC1261L-X 3 6 OUT C1 - 4
1261L TCO1
+
+
GND
U
U
U
Adjustable Output
VCC 1 2
VOUT = - 4V (LTC1261L-4) VOUT = - 4.5V (LTC1261L-4.5) 3.3F
VCC
SHDN
8
0.1F
7 C1 + REG LTC1261L 3 6 OUT C1 - 4 GND ADJ 5 3.3F
1261L TCO2
VOUT
COMP
5
5
LTC1261L
APPLICATIONS INFORMATION
The LTC1261L uses an inverting charge pump to generate a regulated negative output voltage that is either equal to or less than the supply voltage. The LTC1261L needs only three external capacitors and is available in the MSOP and SO-8 packages THEORY OF OPERATION A block diagram of the LTC1261L is shown in Figure 1. The heart of the LTC1261L is the charge pump core shown in the dashed box. It generates a negative output voltage by first charging the flying capacitor (C1) between VCC and ground. It then connects the top of the flying capacitor to ground, forcing the bottom of the flying capacitor to a negative voltage. The charge on the flying capacitor is transferred to the output bypass capacitor, leaving it charged to the negative output voltage. This process is driven by the internal 650kHz clock. Figure 1 shows the charge pump configuration. With the clock low, C1 is charged to VCC by S1 and S3. At the next rising clock edge, S1 and S3 are open and S2 and S4 close. S2 connects C1+ to ground, C1- is connected to the output by S4. The charge in C1 is transferred to COUT, setting it to a negative voltage. The output voltage is monitored by COMP1 which compares a divided replica of the output at ADJ (COMP for fixed output voltage parts) to the internal reference. At the beginning of a cycle the clock is low, forcing the output of the AND gate low and charging the flying capacitor. The next rising clock edge sets the RS latch, setting the charge pump to transfer charge from the flying capacitor to the output capacitor. As long as the output is below the set point, COMP1 stays low, the latch stays set and the charge pump runs at the full 50% duty cycle of the clock gated through the AND gate. As the output approaches the set voltage, COMP1 will trip whenever the divided signal exceeds the internal 1.23V reference relative to OUT. This resets the RS latch and truncates the clock pulses, reducing the amount of charge transferred to the output capacitor and regulating the output voltage. If the output exceeds the set point, COMP1 stays high, inhibiting the RS latch and disabling the charge pump.
CLK 650kHz S1 OUT COUT
R2 S4 R1
S Q R S2 C1 C1-
S3
ADJ (COMP)
+
COMP1
-
60mV VREF = 1.23V 1.17V VOUT
+
COMP2
REG
-
1261L F01
Figure 1. Block Diagram
6
+
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U
VCC
C1+
INTERNALLY CONNECTED FOR FIXED OUTPUT VOLTAGE PARTS
LTC1261L
APPLICATIONS INFORMATION
COMP2 also monitors the divided signal at ADJ but it is connected to a 1.17V reference, 5% below the main reference voltage. When the divided output exceeds this lower reference voltage indicating that the output is within 5% of the set value, COMP2 goes high turning on the REG output transistor. This is an open drain N-channel device capable of sinking 4mA with a 3.3V VCC and 5mA with a 5V VCC. When in the "off" state (divided output is more than 5% below VREF) the drain can be pulled above VCC without damage up to a maximum of 6V above ground. Note that the REG output only indicates if the magnitude of the output is below the magnitude of the set point by 5% (i.e., VOUT > - 4.75V for a - 5V set point). If the magnitude of the output is forced higher than the magnitude of the set point ( i.e., to - 5.25V when the output is set for - 5V) the REG output will stay low. OUTPUT RIPPLE Output ripple in the LTC1261L is present from two sources; voltage droop at the output capacitor between clocks and frequency response of the regulation loop. Voltage droop is easy to calculate. With a typical clock frequency of 650kHz, the charge on the output capacitor is refreshed once every 1.54s. With a 15mA load and a 3.3F output capacitor, the output will droop by:
ILOAD
))
t = 15mA 1.54s = 7mV 3.3F COUT
)
)
This can be a significant ripple component when the output is heavily loaded, especially if the output capacitor is small. If absolute minimum output ripple is required, a 10F or greater output capacitor should be used. Regulation loop frequency response is the other major contributor to output ripple. The LTC1261L regulates the output voltage by limiting the amount of charge transferred to the output capacitor on a cycle-by-cycle basis. The output voltage is sensed at the ADJ pin (COMP for fixed output voltage versions) through an internal or external resistor divider from the OUT pin to ground. As the flying capacitor is first connected to the output, the output voltage begins to change quite rapidly. As soon as it exceeds the set point COMP1 trips, switching the state
U
W
U
U
of the charge pump and stopping the charge transfer. Because the RC time constant of the capacitors and the switches is quite short, the ADJ pin must have a wide AC bandwidth to be able to respond to the output in time. External parasitic capacitance at the ADJ pin can reduce the bandwidth to the point where the comparator cannot respond by the time the clock pulse finishes. When this happens the comparator will allow a few complete pulses through, then overcorrect and disable the charge pump until the output drops below the set point. Under these conditions the output will remain in regulation but the output ripple will increase as the comparator "hunts" for the correct value. To prevent this from happening, an external capacitor can be connected from ADJ (or COMP for fixed output voltage parts) to ground to compensate for external parasitics and increase the regulation loop bandwidth (Figure 2). This sounds counterintuitive until we remember that the internal reference is generated with respect to OUT, not ground. The feedback loop actually sees ground as its "output," thus the compensation capacitor should be connected across the "top" of the resistor divider, from ADJ (or COMP) to ground. By the same token, avoid adding capacitance between ADJ (or COMP) and VOUT. This will slow down the feedback loop and increase output ripple. A 100pF capacitor from ADJ or COMP to ground will compensate the loop properly under most conditions for fixed voltage versions of the LTC1261L. For the adjustable LTC1261L, the capacitor value will be dependent upon the values of the external resistors in the divider network.
TO CHARGE PUMP RESISTORS ARE INTERNAL FOR FIXED OUTPUT VOLTAGE PARTS
COMP1 R1 CC 100pF ADJ/COMP R2 VOUT
1261L F02
REF
+ 1.23V -
Figure 2. Regulator Loop Compensation
7
LTC1261L
APPLICATIONS INFORMATION
OUTPUT FILTERING If extremely low output ripple (< 5mV) is required, additional output filtering is required. Because the LTC1261L uses a high 650kHz switching frequency, fairly low value RC or LC networks can be used at the output to effectively filter the output ripple. A 10 series output resistor and a 3.3F capacitor will cut output ripple to below 3mV (Figure 3). Further reductions can be obtained with larger filter capacitors or by using an LC output filter.
5V 1F VCC 2 0.1F 3 C1
+
OUT
6
10 VOUT = - 4V
LTC1261L-4
GND 4
100pF
1261L F03
Figure 3. Output Filter Cuts Ripple Below 3mV
CAPACITOR SELECTION Capacitor Sizing The performance of the LTC1261L is affected by the capacitors to which it connects. The LTC1261L requires bypass capacitors to ground for both the VCC and OUT pins. The input capacitor provides most of LTC1261L's supply current while it is charging the flying capacitors. This capacitor should be mounted as close to the package as possible and its value should be at least ten times larger than the flying capacitor. Ceramic capacitors generally provide adequate performance. Avoid using a tantalum capacitor as the input bypass unless there is at least a 0.1F ceramic capacitor in parallel with it. The charge pump capacitor is somewhat less critical since its peak current is limited by the switches inside the LTC1261L. Most applications should use a 0.1F as the flying capacitor value. Conveniently, ceramic capacitors are the most common type of 0.1F capacitor and they work well here. Usually the easiest solution is to use the same
8
+
+
C1-
COMP
5
3.3F
3.3F
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W
U
U
capacitor type for both the input bypass capacitor and the flying capacitor. In applications where the maximum load current is welldefined and output ripple is critical or input peak currents need to be minimized, the flying capacitor value can be tailored to the application. Reducing the value of the flying capacitor reduces the amount of charge transferred with each clock cycle. This limits maximum output current, but also cuts the size of the voltage step at the output with each clock cycle. The smaller capacitor draws smaller pulses of current out of VCC as well, limiting peak currents and reducing the demands on the input supply. Table 1 shows recommended values of flying capacitor vs maximum load capacity.
Table 1. Typical Max Load (mA) vs Flying Capacitor Value at TA = 25C, VOUT = - 4V
FLYING CAPACITOR VALUE (F) 0.1 0.047 0.033 0.022 0.01 MAX LOAD (mA) VCC = 5V 20 15 10 5 1
The output capacitor performs two functions: it provides output current to the load during half of the charge pump cycle and its value helps to set the output ripple voltage. For applications that are insensitive to output ripple, the output bypass capacitor can be as small as 1F. Larger output capacitors will reduce output ripple further at the expense of turn-on time. Capacitor ESR Output capacitor Equivalent Series Resistance (ESR) is another factor to consider. Excessive ESR in the output capacitor can fool the regulation loop into keeping the output artificially low by prematurely terminating the charging cycle. As the charge pump switches to recharge the output a brief surge of current flows from the flying capacitors to the output capacitor. This current surge can be as high as 100mA under full load conditions. A typical
LTC1261L
APPLICATIONS INFORMATION
3.3F tantalum capacitor has 1 or 2 of ESR; 100mA x 2 = 200mV. If the output is within 200mV of the set point this additional 200mV surge will trip the feedback comparator and terminate the charging cycle. The pulse dissipates quickly and the comparator returns to the correct state, but the RS latch will not allow the charge pump to respond until the next clock edge. This prevents the charge pump from going into very high frequency oscillation under such conditions but it also creates an output error as the feedback loop regulates based on the top of the spike, not the average value of the output (Figure 4). The resulting output voltage behaves as if a resistor of value CESR x (IPK/IAVE) was placed in series with the output. To avoid this nasty sequence of events, connect a 0.1F ceramic capacitor in parallel with the larger output capacitor. The ceramic capacitor will "eat" the high frequency spike, preventing it from fooling the feedback loop, while the larger but slower tantalum or aluminum output capacitor supplies output current to the load between charge cycles.
CLOCK
LOW ESR OUTPUT CAP
VOUT
HIGH ESR OUTPUT CAP
VOUT
Figure 4. Output Ripple with Low and High ESR Capacitors
Note that ESR in the flying capacitor will not cause the same condition; in fact, it may actually improve the situation by cutting the peak current and lowering the amplitude of the spike. However, more flying capacitor ESR is not necessarily better. As soon as the RC time constant
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approaches half of a clock period (the time the capacitors have to share charge at full duty cycle) the output current capability of the LTC1261L starts to diminish. For a 0.1F flying capacitor, this gives a maximum total series resistance of:
1 1 tCLK = 1 / 0.1F = 7.7 2 CFLY 2 650kHz
)))
)
Most of this resistance is already provided by the internal switches in the LTC1261L. More than 1 or 2 of ESR on the flying capacitors will start to affect the regulation at maximum load. RESISTOR SELECTION Resistor selection is easy with the fixed output voltage versions of the LTC1261L-- no resistors are needed! Selecting the right resistors for the adjustable parts is only a little more difficult. A resistor divider should be used to divide the signal at the output to give 1.23V at the ADJ pin with respect to VOUT (Figure 5). The LTC1261L uses a positive reference with respect to VOUT, not a negative reference with respect to ground (Figure 1 shows the reference connection). Be sure to keep this in mind when connecting the resistors! If the initial output is not what you expected, try swapping the two resistors. The LTC1261L can be internally configured for other fixed output voltages. Contact the Linear Technology Marketing department for details.
4 R1
VSET VOUT AVERAGE COMP1 OUTPUT VSET VOUT AVERAGE
COMP1 OUTPUT
1261L F04
GND LTC1261L ADJ
5
R2 OUT 6 VOUT = -1.23V
(
R1 + R2 R2
)
1261L F05
Figure 5. External Resistor Connections
9
LTC1261L
TYPICAL APPLICATIONS N
5V Input, - 4V Output GaAs FET Bias Generator
P-CHANNEL POWER SWITCH VBAT SHUTDOWN 5V 1 2 1F 0.1F VCC SHDN 8 10k
100pF
1mV Ripple, 5V Input, - 4V Output GaAs FET Bias Generator
P-CHANNEL POWER SWITCH VBAT SHUTDOWN 5V 1 2 1F 0.1F VCC SHDN 8 10k
7 C1+ REG LTC1261L-4 6 3 OUT C2- 4
100pF
5V Input, - 0.5V Output GaAs FET Bias Generator
P-CHANNEL POWER SWITCH VBAT SHUTDOWN 5V 1 2 1F 0.1F VCC SHDN 8 43.2k 1% 10k
7 C1+ REG LTC1261L 6 3 OUT C2- 4 GND ADJ 5 100pF 12.4k 1%
10
+
+
+
GND
COMP
5
+
U
7 C1+ REG LTC1261L-4 6 3 OUT C2 - 4 GND COMP 5
- 4V BIAS 3.3F GaAs TRANSMITTER
1261 TA03
100H
- 4V BIAS 10F GaAs TRANSMITTER
10F
1261 TA04
-0.5V BIAS GaAs TRANSMITTER
3.3F
1261 TA05
LTC1261L
PACKAGE DESCRIPTION
0.007 (0.18) 0.021 0.006 (0.53 0.015)
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0- 8 TYP
0.016 - 0.050 0.406 - 1.270
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
U
Dimensions in inches (millimeters) unless otherwise noted. MS8 Package 8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 0.004* (3.00 0.102) 8 76 5
0.192 0.004 (4.88 0.10)
0.118 0.004** (3.00 0.102)
1 0.040 0.006 (1.02 0.15) 0 - 6 TYP SEATING PLANE 0.012 (0.30) 0.0256 REF (0.65) TYP
23
4 0.034 0.004 (0.86 0.102)
0.006 0.004 (0.15 0.102)
MSOP (MS8) 1197
S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 - 0.197* (4.801 - 5.004) 8 7 6 5
0.228 - 0.244 (5.791 - 6.197)
0.150 - 0.157** (3.810 - 3.988)
1 0.053 - 0.069 (1.346 - 1.752)
2
3
4
0.004 - 0.010 (0.101 - 0.254)
0.014 - 0.019 (0.355 - 0.483)
0.050 (1.270) TYP
SO8 0996
11
LTC1261L
TYPICAL APPLICATIONS N
Low Output Voltage Generator
5V 1F 1 VCC ADJ 2 0.1F C1+ LTC1261L 3 C1- OUT GND 4 6 5
Minimum Parts Count - 4.5V Generator
1 2 1F 0.1F 8
5V
VCC
SHDN
7 C1 + REG LTC1261L-4.5 3 6 OUT C1 - 4
RELATED PARTS
PART NUMBER
LTC1550L/LTC1551L LTC1429 LT1121
DESCRIPTION
Low Noise Switched Capacitor Regulated Voltage Inverter Clock Synchronized Switched Capacitor Regulated Voltage Inverter Micropower Low Dropout Regulator with Shutdown
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
+
GND
COMP
+
U
100pF
RS
124k VOUT = VCC - 9.92A (RS + 124k) = - 0.5V (RS = 432k) = -1V (RS = 487k)
1261L TA06
1N5817
3.3F
VOUT = - 4.5V at 5mA 3.3F
1261L TA07
5
COMMENTS
GaAs FET Bias with Linear Regulator, < 1mV Ripple, MSOP GaAs FET Bias 0.4V Dropout Voltage at 150mA, Low Noise, Switched Capacitor Regulated Voltage Inverter
1261li LT/TP 1098 4K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1998

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