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RF2115L 2 Typical Applications * Analog Communication Systems * Analog Cellular Systems (AMPS & TACS) * 900MHz Spread-Spectrum Systems * 400MHz Industrial Radios * Driver Stage for Higher Power Applications * Portable Battery-Powered Equipment HIGH POWER UHF AMPLIFIER 2 POWER AMPLIFIERS Product Description The RF2115L is a high power amplifier IC. The device is manufactured on an advanced Gallium Arsenide Heterojunction Bipolar Transistor (HBT) process, and has been designed for use as the final RF amplifier in analog cellular phone transmitters or ISM applications operating at 915MHz. The device is packaged in a 16-lead ceramic quad leadless chip carrier with a backside ground. The device is self-contained with the exception of the output matching network and power supply feed line. A two-bit digital control provides 4 levels of power control, in 10dB steps. 1 .258 .242 .075 .065 .150 .050 .258 .242 7 .098 R.008 .033 .017 .050 .025 R F2 11 Features * 48% Efficiency Ordering Information RF2115L RF2115L PCBA RF Micro Devices, Inc. 7625 Thorndike Road Greensboro, NC 27409, USA .022 .018 .098 Optimum Technology Matching(R) Applied Si BJT Si Bi-CMOS ro du ct u Package Style: QLCC-16 GaAs HBT SiGe HBT GaAs MESFET Si CMOS P ad ed RF OUT NC 15 14 13 RF OUT 12 GND 11 RF OUT 10 RF OUT 9 NC 8 G10 VCC2 NC 1 VCC3 2 VCC1 3 GND 4 PD 5 16 * Single 5V to 6.5V Supply * Up to 1.0W CW Output Power * 33dB Small Signal Gain * Digitally Controlled Output Power * Small Package Outline (0.25" x 0.25") S ee U pg r BIAS CIRCUIT GAIN CONTROL 7 G20 6 Functional Block Diagram RF IN High Power UHF Amplifier Fully Assembled Evaluation Board Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com Rev B1 010329 2-39 RF2115L Absolute Maximum Ratings Parameter Supply Voltage (VCC) Power Down Voltage (VPD) Control Voltage (G10, G20) DC Supply Current Input RF Power Output Load Operating Case Temperature Operating Ambient Temperature Storage Temperature Rating -0.5 to +8.5 -0.5 to +5.0 -0.5 to +5.5 700 +12 20:1 -40 to +100 -40 to +85 -40 to +150 Unit VDC V V mA dBm C C C Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). 2 POWER AMPLIFIERS Parameter Overall Frequency Range Maximum CW Output Power Specification Min. Typ. Max. Unit Condition T=25 C, VCC =5.8V, VPD =5.0V, ZLOAD =9, PIN =0dBm, Freq=840MHz ro du ct +36 +23 +13 +6 600 175 90 50 80 0.2 0.2 10 Total CW Efficiency at Maximum Output Small-signal Gain Second Harmonic Third Harmonic Fourth Harmonic Input VSWR Input Impedance 40 +30 +29.5 +28.5 48 33 -23 -36 -35 <2:1 50 Power Control Output Power +30 +17 +7 -4 350 75 35 21 30 0 Power Supply Current Idle Current Power Down "ON" Power Down "OFF" Power Down Control S ee Power Down "ON" Power Down "OFF" Current Drain U pg r +30.5 +20 +11 +2.5 415 125 56 38 55 5.0 ad ed P 5.0 1 0 2-40 R F2 11 dBm dBm dBm % dB dBc dBc dBc dBm dBm dBm dBm mA mA mA mA mA V V V V A Without external second harmonic trap G20 G10 1 1 1 0 0 1 0 0 1 1 1 0 0 1 0 0 1 1 Voltage supplied to the input; Part is "ON" Voltage supplied to the input; Part is "OFF" Voltage supplied to the input; Part is "ON" Voltage supplied to the input; Part is "OFF" VPD < 0.1 VDC 7 430 to 930 +30.5 MHz dBm Note that increasing VCC does not result in higher output power; power may actually decrease. VCC =5.8V, ZLOAD=12 VCC =5.0V, ZLOAD=9 VCC =5.0V, ZLOAD=12 Rev B1 010329 RF2115L Pin 1 Function VCC2 Description Positive supply for the second stage (driver) amplifier. This is an unmatched transistor collector output. This pin should see an inductive path to AC ground (VCC with a UHF bypassing capacitor). This inductance can be achieved with a short, thin microstrip line or with a low value chip inductor (approximately 2.7nH). At lower frequencies, the inductance value should be larger (longer microstrip line) and VCC should be bypassed with a larger bypass capacitor (see the application schematic for 430MHz operation). This inductance forms a matching network with the internal series capacitor between the second and third stages, setting the amplifier's frequency of maximum gain. An additional 1F bypass capacitor in parallel with the UHF bypass capacitor is also recommended, but placement of this component is not as critical. In most applications, pins 1, 2, and 3 can share a single 1F bypass capacitor. Positive supply for the active bias circuits. This pin can be externally combined with pin 3 (VCC1) and the pair bypassed with a single UHF capacitor, placed as close as possible to the package. Additional bypassing of 1F is also recommended, but proximity to the package is not as critical. In most applications, pins 1, 2, and 3 can share a single 1F bypass capacitor. Positive supply for the first stage (input) amplifier. This pin can be externally combined with pin 2 (VCC3) and the pair bypassed with a single UHF capacitor, placed as close as possible to the package. Additional bypassing of 1F is also recommended, but proximity to the package is not as critical. In most applications, pins 1, 2, and 3 can share a single 1F bypass capacitor. This pin can also be used for coarse analog gain control, even though it is not optimized for this function. Ground connection. Keep traces physically short and connect immediately to ground plane for best performance. In addition, for specified performance, the package's backside metal should be soldered to ground plane. Power down control voltage. When this pin is at 0V, the device will be in power down mode, dissipating minimum DC power. When this pin is at 5V the device will be in full power mode delivering maximum available gain and output power capability. This pin may also be used to perform some degree of gain control or power control when set to voltages between 0V and 5V. It is not optimized for this function so the transfer function is not linear over a wide range as with other devices specifically designed for analog gain control; however, it may be usable for coarse adjustment or in some closed loop AGC systems. This pin should not, in any circumstance, be higher in voltage than VCC, nor should it ever be higher than 6.5V. This pin should also have an external UHF bypassing capacitor. Amplifier RF input. This is a 50 RF input port to the amplifier. It does not contain internal DC blocking and therefore should be externally DC blocked before connecting to any device which has DC present or which contains a DC path to ground. A series UHF capacitor is recommended for the DC blocking. RF output power gain control MSB (see specification table for logic). The control voltage at this pin should never exceed VCC. This pin should also have an external UHF bypassing capacitor. RF output power gain control LSB (see specification table for logic). The control voltage at this pin should never exceed VCC. This pin should also have an external UHF bypassing capacitor. Not internally connected. Interface Schematic 2 POWER AMPLIFIERS 2 VCC3 3 VCC1 4 GND 5 PD 6 RF IN 7 8 9 G20 G10 NC Rev B1 010329 S ee U pg r ad ed P ro du ct R F2 11 7 2-41 RF2115L Pin 10 Function RF OUT Description Amplifier RF output. This is an unmatched collector output of the final amplifier transistor. It is internally connected to pins 10, 11, 13, and 14 to provide low series inductance and flexibility in output matching. Bias for the final power amplifier output transistor must also be provided through two of these four pins. Typically, pins 10 and 11 are connected to a network that creates a second harmonic trap. For 830MHz operation, this network is simply a single 2.4pF capacitor from both pins to ground. This capacitor series resonates with internal bond wires at two times the operating frequency, effectively shorting out the second harmonic. Shorting out this harmonic serves to increase the amplifier's maximum output power and efficiency, as well as to lower the level of the second harmonic output. Typically, pins 13 and 14 are externally connected very close to the package and used as the RF output with a matching network that presents the optimum load impedance to the PA for maximum power and efficiency, as well as providing DC blocking at the output. An additional network of a bias inductor and parallel resistor provides DC bias and helps to protect the output from high voltage swings due to severe load mismatches. Shunt protection diodes are included to clip peak voltage excursions above approximately 15V to prevent voltage breakdown in worst case conditions. Same as pin 10. Interface Schematic 2 POWER AMPLIFIERS 2-42 S ee U pg r ad ed P ro du ct 11 12 13 14 15 16 Pkg Base Same as pin 10. Not internally connected. Not internally connected. This contact is the main ground contact for the entire device. Care should be taken to ensure that this contact is well soldered in order to prevent performance from being degraded from that indicated in the specifications. R F2 11 Rev B1 010329 RF OUT GND RF OUT RF OUT NC NC GND Same as pin 10. 7 Same as pin 4. RF2115L Application Schematic 430MHz 16 nH 4.7 nH 33 pF RF OUT 1 2 3 100 pF 4 PD 0/5 VDC 5 100 pF 6 RF IN 100 pF VCC 1 F 22 pF 16 15 14 16 pF 15 pF 13 12 11 15 nH 2 POWER AMPLIFIERS 6.8 pF RF OUT 4.7 pF BIAS CIRCUIT GAIN CONTROL 7 8 9 10 13 pF 100 pF Ground Back of Package BIT 1 0V / V CC BIT 2 0V / V CC VCC 1 F ro du ct 100 pF 1 2 3 16 15 BIAS CIRCUIT 4 5 6 7 8 100 pF BIT 1 0V / V CC Application Schematic 840MHz 47 nH 180 ad ed 0.01" x 0.2" (PCB material: FR-4, Thickness: 0.031") 100 pF 14 13 12 11 GAIN CONTROL 9 10 P U pg r 100 pF 2.4 pF S ee PD 0/5 VDC 100 pF RF IN 100 pF 100 pF BIT 2 0V / V CC Rev B1 010329 R F2 11 1.8 nH Ground Back of Package 7 22 pF 2-43 RF2115L Evaluation Board Schematic 840MHz Operation (Download Bill of Materials from www.rfmd.com.) P1 P2 VCC GND PD P2-3 P2-1 1 2 3 B2 GND B1 R3 180 2115400 Rev - 2 POWER AMPLIFIERS P1-1 C14 100 nF P1-3 1 2 3 P1-1 C10 1 F C9 1nF C8 100 nF C7 330 pF C6 100 pF 0.01" x 0.2" (PCB mat'l: FR-4, Thickness: 0.031") 1 2 C5 100 pF C4 100 pF 3 4 P1-3 C3 330 pF SMA J1 50 strip RF IN C1 100 pF 5 6 16 C11 100 nF L1 47 nH L2 1.8 nH C2 6.8 pF C12 4.7 pF 50 strip SMA J2 RF OUT BIAS CIRCUIT GAIN CONTROL 7 8 2-44 S ee U pg r ad ed P ro du ct 9 R1 1 k R2 1 k P2-3 P2-1 R F2 11 13 12 11 10 C13 2.4 pF 7 15 14 Rev B1 010329 RF2115L Evaluation Board Layout 2" x 3" 2 POWER AMPLIFIERS Rev B1 010329 S ee U pg r ad ed P ro du ct R F2 11 7 2-45 2 POWER AMPLIFIERS 2-46 RF2115L S ee U pg r ad ed P ro du ct R F2 11 7 Rev B1 010329 |
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